X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=README;h=c73f6dd57402db9c3e3cdc14fa71e4cbea2504ee;hb=db7cd4ed33d6724937c747a7339810b77d6989da;hp=30d7ee3970cd096d5e713084eb3b3bc4ef69b779;hpb=c98b171e1098f94b2ff7720c45a25a602882f876;p=u-boot diff --git a/README b/README index 30d7ee3970..c73f6dd574 100644 --- a/README +++ b/README @@ -127,7 +127,7 @@ releases in "stable" maintenance trees. Examples: U-Boot v2009.11 - Release November 2009 U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree - U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release + U-Boot v2010.09-rc1 - Release candidate 1 for September 2010 release Directory Hierarchy: @@ -136,8 +136,6 @@ Directory Hierarchy: /arch Architecture specific files /arc Files generic to ARC architecture /arm Files generic to ARM architecture - /avr32 Files generic to AVR32 architecture - /blackfin Files generic to Analog Devices Blackfin architecture /m68k Files generic to m68k architecture /microblaze Files generic to microblaze architecture /mips Files generic to MIPS architecture @@ -147,10 +145,10 @@ Directory Hierarchy: /powerpc Files generic to PowerPC architecture /sandbox Files generic to HW-independent "sandbox" /sh Files generic to SH architecture - /sparc Files generic to SPARC architecture /x86 Files generic to x86 architecture /api Machine/arch independent API for external apps /board Board dependent files +/cmd U-Boot commands functions /common Misc architecture independent functions /configs Board default configuration files /disk Code for disk drive partition handling @@ -293,7 +291,7 @@ board_init_r(): - stack is optionally in SDRAM, if CONFIG_SPL_STACK_R is defined and CONFIG_SPL_STACK_R_ADDR points into SDRAM - preloader_console_init() can be called here - typically this is - done by defining CONFIG_SPL_BOARD_INIT and then supplying a + done by selecting CONFIG_SPL_BOARD_INIT and then supplying a spl_board_init() function containing this call - loads U-Boot or (in falcon mode) Linux @@ -321,63 +319,11 @@ The following options need to be configured: - Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS. -- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined) - Define exactly one, e.g. CONFIG_ATSTK1002 - -- CPU Module Type: (if CONFIG_COGENT is defined) - Define exactly one of - CONFIG_CMA286_60_OLD ---- FIXME --- not tested yet: - CONFIG_CMA286_60, CONFIG_CMA286_21, CONFIG_CMA286_60P, - CONFIG_CMA287_23, CONFIG_CMA287_50 - -- Motherboard Type: (if CONFIG_COGENT is defined) - Define exactly one of - CONFIG_CMA101, CONFIG_CMA102 - -- Motherboard I/O Modules: (if CONFIG_COGENT is defined) - Define one or more of - CONFIG_CMA302 - -- Motherboard Options: (if CONFIG_CMA101 or CONFIG_CMA102 are defined) - Define one or more of - CONFIG_LCD_HEARTBEAT - update a character position on - the LCD display every second with - a "rotator" |\-/|\-/ - - Marvell Family Member CONFIG_SYS_MVFS - define it if you want to enable multiple fs option at one time for marvell soc family -- 8xx CPU Options: (if using an MPC8xx CPU) - CONFIG_8xx_GCLK_FREQ - deprecated: CPU clock if - get_gclk_freq() cannot work - e.g. if there is no 32KHz - reference PIT/RTC clock - CONFIG_8xx_OSCLK - PLL input clock (either EXTCLK - or XTAL/EXTAL) - -- 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU): - CONFIG_SYS_8xx_CPUCLK_MIN - CONFIG_SYS_8xx_CPUCLK_MAX - CONFIG_8xx_CPUCLK_DEFAULT - See doc/README.MPC866 - - CONFIG_SYS_MEASURE_CPUCLK - - Define this to measure the actual CPU clock instead - of relying on the correctness of the configured - values. Mostly useful for board bringup to make sure - the PLL is locked at the intended frequency. Note - that this requires a (stable) reference clock (32 kHz - RTC clock or CONFIG_SYS_8XX_XIN) - - CONFIG_SYS_DELAYED_ICACHE - - Define this option if you want to enable the - ICache only when Code runs from RAM. - - 85xx CPU Options: CONFIG_SYS_PPC64 @@ -396,15 +342,6 @@ The following options need to be configured: Defines the string to utilize when trying to match PCIe device tree nodes for the given platform. - CONFIG_SYS_PPC_E500_DEBUG_TLB - - Enables a temporary TLB entry to be used during boot to work - around limitations in e500v1 and e500v2 external debugger - support. This reduces the portions of the boot code where - breakpoints and single stepping do not work. The value of this - symbol should be set to the TLB1 entry to be used for this - purpose. - CONFIG_SYS_FSL_ERRATUM_A004510 Enables a workaround for erratum A004510. If set, @@ -533,6 +470,12 @@ The following options need to be configured: CONFIG_SYS_FSL_IFC_LE Defines the IFC controller register space as Little Endian + CONFIG_SYS_FSL_IFC_CLK_DIV + Defines divider of platform clock(clock input to IFC controller). + + CONFIG_SYS_FSL_LBC_CLK_DIV + Defines divider of platform clock(clock input to eLBC controller). + CONFIG_SYS_FSL_PBL_PBI It enables addition of RCW (Power on reset configuration) in built image. Please refer doc/README.pblimage for more details @@ -577,20 +520,6 @@ The following options need to be configured: CONFIG_SYS_FSL_SEC_LE Defines the SEC controller register space as Little Endian -- Intel Monahans options: - CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO - - Defines the Monahans run mode to oscillator - ratio. Valid values are 8, 16, 24, 31. The core - frequency is this value multiplied by 13 MHz. - - CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO - - Defines the Monahans turbo mode to oscillator - ratio. Valid values are 1 (default if undefined) and - 2. The core frequency as calculated above is multiplied - by this value. - - MIPS CPU options: CONFIG_SYS_INIT_SP_OFFSET @@ -629,29 +558,6 @@ The following options need to be configured: Select high exception vectors of the ARM core, e.g., do not clear the V bit of the c1 register of CP15. - CONFIG_SYS_THUMB_BUILD - - Use this flag to build U-Boot using the Thumb instruction - set for ARM architectures. Thumb instruction set provides - better code density. For ARM architectures that support - Thumb2 this flag will result in Thumb2 code generated by - GCC. - - CONFIG_ARM_ERRATA_716044 - CONFIG_ARM_ERRATA_742230 - CONFIG_ARM_ERRATA_743622 - CONFIG_ARM_ERRATA_751472 - CONFIG_ARM_ERRATA_761320 - CONFIG_ARM_ERRATA_773022 - CONFIG_ARM_ERRATA_774769 - CONFIG_ARM_ERRATA_794072 - - If set, the workarounds for these ARM errata are applied early - during U-Boot startup. Note that these options force the - workarounds to be applied; no CPU-type/version detection - exists, unlike the similar options in the Linux kernel. Do not - set these options unless they apply! - COUNTER_FREQUENCY Generic timer clock source frequency. @@ -660,15 +566,6 @@ The following options need to be configured: different from COUNTER_FREQUENCY, and can only be determined at run time. - NOTE: The following can be machine specific errata. These - do have ability to provide rudimentary version and machine - specific checks, but expect no product checks. - CONFIG_ARM_ERRATA_430973 - CONFIG_ARM_ERRATA_454179 - CONFIG_ARM_ERRATA_621766 - CONFIG_ARM_ERRATA_798870 - CONFIG_ARM_ERRATA_801819 - - Tegra SoC options: CONFIG_TEGRA_SUPPORT_NON_SECURE @@ -707,10 +604,6 @@ The following options need to be configured: * Adds the "fdt" command * The bootm command automatically updates the fdt - OF_CPU - The proper name of the cpus node (only required for - MPC512X and MPC5xxx based boards). - OF_SOC - The proper name of the soc node (only required for - MPC512X and MPC5xxx based boards). OF_TBCLK - The timebase frequency. OF_STDOUT_PATH - The path to the console device @@ -729,11 +622,6 @@ The following options need to be configured: This causes ft_system_setup() to be called before booting the kernel. - CONFIG_OF_BOOT_CPU - - This define fills in the correct boot CPU in the boot - param header, the default value is zero if undefined. - CONFIG_OF_IDE_FIXUP U-Boot can detect if an IDE device is present or not. @@ -799,99 +687,10 @@ The following options need to be configured: Define this variable to enable hw flow control in serial driver. Current user of this option is drivers/serial/nsl16550.c driver -- Console Interface: - Depending on board, define exactly one serial port - (like CONFIG_8xx_CONS_SMC1, CONFIG_8xx_CONS_SMC2, - CONFIG_8xx_CONS_SCC1, ...), or switch off the serial - console by defining CONFIG_8xx_CONS_NONE - - Note: if CONFIG_8xx_CONS_NONE is defined, the serial - port routines must be defined elsewhere - (i.e. serial_init(), serial_getc(), ...) - - CONFIG_CFB_CONSOLE - Enables console device for a color framebuffer. Needs following - defines (cf. smiLynxEM, i8042) - VIDEO_FB_LITTLE_ENDIAN graphic memory organisation - (default big endian) - VIDEO_HW_RECTFILL graphic chip supports - rectangle fill - (cf. smiLynxEM) - VIDEO_HW_BITBLT graphic chip supports - bit-blit (cf. smiLynxEM) - VIDEO_VISIBLE_COLS visible pixel columns - (cols=pitch) - VIDEO_VISIBLE_ROWS visible pixel rows - VIDEO_PIXEL_SIZE bytes per pixel - VIDEO_DATA_FORMAT graphic data format - (0-5, cf. cfb_console.c) - VIDEO_FB_ADRS framebuffer address - VIDEO_KBD_INIT_FCT keyboard int fct - (i.e. rx51_kp_init()) - VIDEO_TSTC_FCT test char fct - (i.e. rx51_kp_tstc) - VIDEO_GETC_FCT get char fct - (i.e. rx51_kp_getc) - CONFIG_VIDEO_LOGO display Linux logo in - upper left corner - CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of - linux_logo.h for logo. - Requires CONFIG_VIDEO_LOGO - CONFIG_CONSOLE_EXTRA_INFO - additional board info beside - the logo - CONFIG_HIDE_LOGO_VERSION - do not display bootloader - version string - - When CONFIG_CFB_CONSOLE_ANSI is defined, console will support - a limited number of ANSI escape sequences (cursor control, - erase functions and limited graphics rendition control). - - When CONFIG_CFB_CONSOLE is defined, video console is - default i/o. Serial console can be forced with - environment 'console=serial'. - - When CONFIG_SILENT_CONSOLE is defined, all console - messages (by U-Boot and Linux!) can be silenced with - the "silent" environment variable. See - doc/README.silent for more information. - - CONFIG_SYS_CONSOLE_BG_COL: define the backgroundcolor, default - is 0x00. - CONFIG_SYS_CONSOLE_FG_COL: define the foregroundcolor, default - is 0xa0. - - Console Baudrate: CONFIG_BAUDRATE - in bps Select one of the baudrates listed in CONFIG_SYS_BAUDRATE_TABLE, see below. - CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale - -- Console Rx buffer length - With CONFIG_SYS_SMC_RXBUFLEN it is possible to define - the maximum receive buffer length for the SMC. - This option is actual only for 82xx and 8xx possible. - If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE - must be defined, to setup the maximum idle timeout for - the SMC. - -- Pre-Console Buffer: - Prior to the console being initialised (i.e. serial UART - initialised etc) all console output is silently discarded. - Defining CONFIG_PRE_CONSOLE_BUFFER will cause U-Boot to - buffer any console messages prior to the console being - initialised to a buffer of size CONFIG_PRE_CON_BUF_SZ - bytes located at CONFIG_PRE_CON_BUF_ADDR. The buffer is - a circular buffer, so if more than CONFIG_PRE_CON_BUF_SZ - bytes are output before the console is initialised, the - earlier bytes are discarded. - - Note that when printing the buffer a copy is made on the - stack so CONFIG_PRE_CON_BUF_SZ must fit on the stack. - - 'Sane' compilers will generate smaller code if - CONFIG_PRE_CON_BUF_SZ is a power of 2 - Autoboot Command: CONFIG_BOOTCOMMAND @@ -969,30 +768,15 @@ The following options need to be configured: CONFIG_CMD_AES AES 128 CBC encrypt/decrypt CONFIG_CMD_ASKENV * ask for env variable CONFIG_CMD_BDI bdinfo - CONFIG_CMD_BEDBUG * Include BedBug Debugger - CONFIG_CMD_BMP * BMP support - CONFIG_CMD_BSP * Board specific commands CONFIG_CMD_BOOTD bootd CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support CONFIG_CMD_CACHE * icache, dcache - CONFIG_CMD_CLK * clock command support CONFIG_CMD_CONSOLE coninfo - CONFIG_CMD_CRC32 * crc32 - CONFIG_CMD_DATE * support for RTC, date/time... CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics - CONFIG_CMD_DS4510 * ds4510 I2C gpio commands - CONFIG_CMD_DS4510_INFO * ds4510 I2C info command - CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd - CONFIG_CMD_DS4510_RST * ds4510 I2C rst command - CONFIG_CMD_DTT * Digital Therm and Thermostat CONFIG_CMD_ECHO echo arguments CONFIG_CMD_EDITENV edit env variable - CONFIG_CMD_EEPROM * EEPROM read/write support - CONFIG_CMD_EEPROM_LAYOUT* EEPROM layout aware commands CONFIG_CMD_ELF * bootelf, bootvx - CONFIG_CMD_ENV_CALLBACK * display details about env callbacks - CONFIG_CMD_ENV_FLAGS * display details about env flags CONFIG_CMD_ENV_EXISTS * check existence of env variable CONFIG_CMD_EXPORTENV * export the environment CONFIG_CMD_EXT2 * ext2 command support @@ -1001,28 +785,17 @@ The following options need to be configured: that work for multiple fs types CONFIG_CMD_FS_UUID * Look up a filesystem UUID CONFIG_CMD_SAVEENV saveenv - CONFIG_CMD_FDC * Floppy Disk Support - CONFIG_CMD_FAT * FAT command support CONFIG_CMD_FLASH flinfo, erase, protect CONFIG_CMD_FPGA FPGA device initialization support - CONFIG_CMD_FUSE * Device fuse support - CONFIG_CMD_GETTIME * Get time since boot CONFIG_CMD_GO * the 'go' command (exec code) CONFIG_CMD_GREPENV * search environment - CONFIG_CMD_HASH * calculate hash / digest CONFIG_CMD_I2C * I2C serial bus support - CONFIG_CMD_IDE * IDE harddisk support CONFIG_CMD_IMI iminfo CONFIG_CMD_IMLS List all images found in NOR flash CONFIG_CMD_IMLS_NAND * List all images found in NAND flash - CONFIG_CMD_IMMAP * IMMR dump support - CONFIG_CMD_IOTRACE * I/O tracing for debugging CONFIG_CMD_IMPORTENV * import an environment CONFIG_CMD_INI * import data from an ini file into the env - CONFIG_CMD_IRQ * irqinfo CONFIG_CMD_ITEST Integer/string test of 2 values - CONFIG_CMD_JFFS2 * JFFS2 Support - CONFIG_CMD_KGDB * kgdb CONFIG_CMD_LDRINFO * ldrinfo (display Blackfin loader) CONFIG_CMD_LINK_LOCAL * link-local IP address auto-configuration (169.254.*.*) @@ -1053,14 +826,9 @@ The following options need to be configured: CONFIG_CMD_RUN run command in env variable CONFIG_CMD_SANDBOX * sb command to access sandbox features CONFIG_CMD_SAVES * save S record dump - CONFIG_SCSI * SCSI Support CONFIG_CMD_SDRAM * print SDRAM configuration information (requires CONFIG_CMD_I2C) - CONFIG_CMD_SETGETDCR Support for DCR Register access - (4xx only) CONFIG_CMD_SF * Read/write/erase SPI NOR flash - CONFIG_CMD_SHA1SUM * print sha1 memory digest - (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support @@ -1086,8 +854,8 @@ The following options need to be configured: Note: Don't enable the "icache" and "dcache" commands (configuration option CONFIG_CMD_CACHE) unless you know what you (and your U-Boot users) are doing. Data - cache cannot be enabled on systems like the 8xx or - 8260 (where accesses to the IMMR region must be + cache cannot be enabled on systems like the + 8xx (where accesses to the IMMR region must be uncached), and it cannot be disabled on all other systems where we (mis-) use the data cache to hold an initial stack and some data. @@ -1119,7 +887,7 @@ The following options need to be configured: tree is available in the global data as gd->fdt_blob. U-Boot needs to get its device tree from somewhere. This can - be done using one of the two options below: + be done using one of the three options below: CONFIG_OF_EMBED If this variable is defined, U-Boot will embed a device tree @@ -1140,11 +908,17 @@ The following options need to be configured: still use the individual files if you need something more exotic. + CONFIG_OF_BOARD + If this variable is defined, U-Boot will use the device tree + provided by the board at runtime instead of embedding one with + the image. Only boards defining board_fdt_blob_setup() support + this option (see include/fdtdec.h file). + - Watchdog: CONFIG_WATCHDOG If this variable is defined, it enables watchdog support for the SoC. There must be support in the SoC - specific code for a watchdog. For the 8xx and 8260 + specific code for a watchdog. For the 8xx CPUs, the SIU Watchdog feature is enabled in the SYPCR register. When supported for a specific SoC is available, then no further board specific code should @@ -1172,7 +946,6 @@ The following options need to be configured: has to be selected, too. Define exactly one of the following options: - CONFIG_RTC_MPC8xx - use internal RTC of MPC8xx CONFIG_RTC_PCF8563 - use Philips PCF8563 RTC CONFIG_RTC_MC13XXX - use MC13783 or MC13892 RTC CONFIG_RTC_MC146818 - use MC146818 RTC @@ -1183,7 +956,7 @@ The following options need to be configured: CONFIG_RTC_DS164x - use Dallas DS164x RTC CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC - CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 + CONFIG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 CONFIG_SYS_RV3029_TCR - enable trickle charger on RV3029 RTC. @@ -1232,15 +1005,13 @@ The following options need to be configured: - Partition Labels (disklabels) Supported: Zero or more of the following: CONFIG_MAC_PARTITION Apple's MacOS partition table. - CONFIG_DOS_PARTITION MS Dos partition table, traditional on the - Intel architecture, USB sticks, etc. CONFIG_ISO_PARTITION ISO partition table, used on CDROM etc. CONFIG_EFI_PARTITION GPT partition table, common when EFI is the bootloader. Note 2TB partition limit; see disk/part_efi.c CONFIG_MTD_PARTITIONS Memory Technology Device partition table. - If IDE or SCSI support is enabled (CONFIG_CMD_IDE or + If IDE or SCSI support is enabled (CONFIG_IDE or CONFIG_SCSI) you must configure support for at least one non-MTD partition type as well. @@ -1271,16 +1042,11 @@ The following options need to be configured: Default is 32bit. - SCSI Support: - At the moment only there is only support for the - SYM53C8XX SCSI controller; define - CONFIG_SCSI_SYM53C8XX to enable it. - CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID * CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the maximum numbers of LUNs, SCSI ID's and target devices. - CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz) The environment variable 'scsidevs' is set to the number of SCSI devices found during the last scan. @@ -1336,10 +1102,6 @@ The following options need to be configured: CONFIG_LAN91C96 Support for SMSC's LAN91C96 chips. - CONFIG_LAN91C96_BASE - Define this to hold the physical address - of the LAN91C96's I/O space - CONFIG_LAN91C96_USE_32_BIT Define this to enable 32 bit addressing @@ -1404,7 +1166,7 @@ The following options need to be configured: - PWM Support: CONFIG_PWM_IMX - Support for PWM modul on the imx6. + Support for PWM module on the imx6. - TPM Support: CONFIG_TPM @@ -1456,7 +1218,7 @@ The following options need to be configured: - USB Support: At the moment only the UHCI host controller is - supported (PIP405, MIP405, MPC5200); define + supported (PIP405, MIP405); define CONFIG_USB_UHCI to enable it. define CONFIG_USB_KEYBOARD to enable the USB Keyboard and define CONFIG_USB_STORAGE to enable the USB @@ -1464,19 +1226,6 @@ The following options need to be configured: Note: Supported are USB Keyboards and USB Floppy drives (TEAC FD-05PUB). - MPC5200 USB requires additional defines: - CONFIG_USB_CLOCK - for 528 MHz Clock: 0x0001bbbb - CONFIG_PSC3_USB - for USB on PSC3 - CONFIG_USB_CONFIG - for differential drivers: 0x00001000 - for single ended drivers: 0x00005000 - for differential drivers on PSC3: 0x00000100 - for single ended drivers on PSC3: 0x00004100 - CONFIG_SYS_USB_EVENT_POLL - May be defined to allow interrupt polling - instead of using asynchronous interrupts CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning field in the EHCI controller on reset. @@ -1519,15 +1268,6 @@ The following options need to be configured: Define this if you want stdin, stdout &/or stderr to be set to usbtty. - mpc8xx: - CONFIG_SYS_USB_EXTC_CLK 0xBLAH - Derive USB clock from external clock "blah" - - CONFIG_SYS_USB_EXTC_CLK 0x02 - - CONFIG_SYS_USB_BRG_CLK 0xBLAH - Derive USB clock from brgclk - - CONFIG_SYS_USB_BRG_CLK 0x04 - If you have a USB-IF assigned VendorID then you may wish to define your own vendor specific values either in BoardName.h or directly in usbd_vendor_info.h. If you don't define @@ -1583,9 +1323,6 @@ The following options need to be configured: CONFIG_SH_MMCIF_CLK Define the clock frequency for MMCIF - CONFIG_GENERIC_MMC - Enable the generic MMC driver - CONFIG_SUPPORT_EMMC_BOOT Enable some additional features of the eMMC boot partitions. @@ -1680,48 +1417,23 @@ The following options need to be configured: to generate and write the Backup GUID Partition Table.) This occurs when the specified "partition name" on the "fastboot flash" command line matches this value. - Default is GPT_ENTRY_NAME (currently "gpt") if undefined. + The default is "gpt" if undefined. + + CONFIG_FASTBOOT_MBR_NAME + The fastboot "flash" command supports writing the downloaded + image to DOS MBR. + This occurs when the "partition name" specified on the + "fastboot flash" command line matches this value. + If not defined the default value "mbr" is used. - Journaling Flash filesystem support: - CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, - CONFIG_JFFS2_NAND_DEV + CONFIG_JFFS2_NAND Define these for a default partition on a NAND device CONFIG_SYS_JFFS2_FIRST_SECTOR, CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS Define these for a default partition on a NOR device - CONFIG_SYS_JFFS_CUSTOM_PART - Define this to create an own partition. You have to provide a - function struct part_info* jffs2_part_info(int part_num) - - If you define only one JFFS2 partition you may also want to - #define CONFIG_SYS_JFFS_SINGLE_PART 1 - to disable the command chpart. This is the default when you - have not defined a custom partition - -- FAT(File Allocation Table) filesystem write function support: - CONFIG_FAT_WRITE - - Define this to enable support for saving memory data as a - file in FAT formatted partition. - - This will also enable the command "fatwrite" enabling the - user to write files to FAT. - -CBFS (Coreboot Filesystem) support - CONFIG_CMD_CBFS - - Define this to enable support for reading from a Coreboot - filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls - and cbfsload. - -- FAT(File Allocation Table) filesystem cluster size: - CONFIG_FS_FAT_MAX_CLUSTSIZE - - Define the max cluster size for fat operations else - a default value of 65536 will be defined. - - Keyboard Support: See Kconfig help for available keyboard drivers. @@ -1734,45 +1446,6 @@ CBFS (Coreboot Filesystem) support instead. - Video support: - CONFIG_VIDEO - - Define this to enable video support (for output to - video). - - CONFIG_VIDEO_CT69000 - - Enable Chips & Technologies 69000 Video chip - - CONFIG_VIDEO_SMI_LYNXEM - Enable Silicon Motion SMI 712/710/810 Video chip. The - video output is selected via environment 'videoout' - (1 = LCD and 2 = CRT). If videoout is undefined, CRT is - assumed. - - For the CT69000 and SMI_LYNXEM drivers, videomode is - selected via environment 'videomode'. Two different ways - are possible: - - "videomode=num" 'num' is a standard LiLo mode numbers. - Following standard modes are supported (* is default): - - Colors 640x480 800x600 1024x768 1152x864 1280x1024 - -------------+--------------------------------------------- - 8 bits | 0x301* 0x303 0x305 0x161 0x307 - 15 bits | 0x310 0x313 0x316 0x162 0x319 - 16 bits | 0x311 0x314 0x317 0x163 0x31A - 24 bits | 0x312 0x315 0x318 ? 0x31B - -------------+--------------------------------------------- - (i.e. setenv videomode 317; saveenv; reset;) - - - "videomode=bootargs" all the video parameters are parsed - from the bootargs. (See drivers/video/videomodes.c) - - - CONFIG_VIDEO_SED13806 - Enable Epson SED13806 driver. This driver supports 8bpp - and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP - or CONFIG_VIDEO_SED13806_16BPP - CONFIG_FSL_DIU_FB Enable the Freescale DIU video driver. Reference boards for SOCs that have a DIU should define this macro to enable DIU @@ -1780,7 +1453,6 @@ CBFS (Coreboot Filesystem) support CONFIG_SYS_DIU_ADDR CONFIG_VIDEO - CONFIG_CMD_BMP CONFIG_CFB_CONSOLE CONFIG_VIDEO_SW_CURSOR CONFIG_VGA_AS_SINGLE_DEVICE @@ -1841,9 +1513,6 @@ CBFS (Coreboot Filesystem) support 320x240. Black & white. - Normally display is black on white background; define - CONFIG_SYS_WHITE_ON_BLACK to get it inverted. - CONFIG_LCD_ALIGNMENT Normally the LCD is page-aligned (typically 4KB). If this is @@ -1852,12 +1521,6 @@ CBFS (Coreboot Filesystem) support here, since it is cheaper to change data cache settings on a per-section basis. - CONFIG_CONSOLE_SCROLL_LINES - - When the console need to be scrolled, this is the number of - lines to scroll by. It defaults to 1. Increasing this makes - the console jump but can help speed up operation when scrolling - is slow. CONFIG_LCD_ROTATION @@ -1942,12 +1605,6 @@ CBFS (Coreboot Filesystem) support can be displayed via the splashscreen support or the bmp command. -- Do compressing for memory range: - CONFIG_CMD_ZIP - - If this option is set, it would use zlib deflate method - to compress the specified memory at its best effort. - - Compression support: CONFIG_GZIP @@ -1963,29 +1620,6 @@ CBFS (Coreboot Filesystem) support the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should be at least 4MB. - CONFIG_LZMA - - If this option is set, support for lzma compressed - images is included. - - Note: The LZMA algorithm adds between 2 and 4KB of code and it - requires an amount of dynamic memory that is given by the - formula: - - (1846 + 768 << (lc + lp)) * sizeof(uint16) - - Where lc and lp stand for, respectively, Literal context bits - and Literal pos bits. - - This value is upper-bounded by 14MB in the worst case. Anyway, - for a ~4MB large kernel image, we have lc=3 and lp=0 for a - total amount of (1846 + 768 << (3 + 0)) * 2 = ~41KB... that is - a very small buffer. - - Use the lzmainfo tool to determinate the lc and lp values and - then calculate the amount of needed dynamic memory (ensuring - the appropriate CONFIG_SYS_MALLOC_LEN value). - CONFIG_LZO If this option is set, support for LZO compressed images @@ -2207,7 +1841,7 @@ CBFS (Coreboot Filesystem) support A byte containing the id of the VLAN. -- Status LED: CONFIG_STATUS_LED +- Status LED: CONFIG_LED_STATUS Several configurations allow to display the current status using a LED. For instance, the LED will blink @@ -2215,15 +1849,15 @@ CBFS (Coreboot Filesystem) support soon as a reply to a BOOTP request was received, and start blinking slow once the Linux kernel is running (supported by a status LED driver in the Linux - kernel). Defining CONFIG_STATUS_LED enables this + kernel). Defining CONFIG_LED_STATUS enables this feature in U-Boot. Additional options: - CONFIG_GPIO_LED + CONFIG_LED_STATUS_GPIO The status LED can be connected to a GPIO pin. In such cases, the gpio_led driver can be used as a - status LED backend implementation. Define CONFIG_GPIO_LED + status LED backend implementation. Define CONFIG_LED_STATUS_GPIO to include the gpio_led driver in the U-Boot binary. CONFIG_GPIO_LED_INVERTED_TABLE @@ -2233,12 +1867,6 @@ CBFS (Coreboot Filesystem) support In such cases CONFIG_GPIO_LED_INVERTED_TABLE may be defined with a list of GPIO LEDs that have inverted polarity. -- CAN Support: CONFIG_CAN_DRIVER - - Defining CONFIG_CAN_DRIVER enables CAN driver support - on those systems that support this (optional) - feature, like the TQM8xxL modules. - - I2C Support: CONFIG_SYS_I2C This enable the NEW i2c subsystem, and will allow you to use @@ -2330,8 +1958,6 @@ CBFS (Coreboot Filesystem) support - CONFIG_SYS_I2C_SH_SPEED3 for for the speed channel 3 - CONFIG_SYS_I2C_SH_BASE4 for setting the register channel 4 - CONFIG_SYS_I2C_SH_SPEED4 for for the speed channel 4 - - CONFIG_SYS_I2C_SH_BASE5 for setting the register channel 5 - - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5 - CONFIG_SYS_I2C_SH_NUM_CONTROLLERS for number of i2c buses - drivers/i2c/omap24xx_i2c.c @@ -2385,10 +2011,7 @@ CBFS (Coreboot Filesystem) support additional defines: CONFIG_SYS_NUM_I2C_BUSES - Hold the number of i2c buses you want to use. If you - don't use/have i2c muxes on your i2c bus, this - is equal to CONFIG_SYS_NUM_I2C_ADAPTERS, and you can - omit this define. + Hold the number of i2c buses you want to use. CONFIG_SYS_I2C_DIRECT_BUS define this, if you don't use i2c muxes on your hardware. @@ -2430,52 +2053,7 @@ CBFS (Coreboot Filesystem) support If you do not have i2c muxes on your board, omit this define. -- Legacy I2C Support: CONFIG_HARD_I2C - - NOTE: It is intended to move drivers to CONFIG_SYS_I2C which - provides the following compelling advantages: - - - more than one i2c adapter is usable - - approved multibus support - - better i2c mux support - - ** Please consider updating your I2C driver now. ** - - These enable legacy I2C serial bus commands. Defining - CONFIG_HARD_I2C will include the appropriate I2C driver - for the selected CPU. - - This will allow you to use i2c commands at the u-boot - command line (as long as you set CONFIG_CMD_I2C in - CONFIG_COMMANDS) and communicate with i2c based realtime - clock chips. See common/cmd_i2c.c for a description of the - command line interface. - - CONFIG_HARD_I2C selects a hardware I2C controller. - - There are several other quantities that must also be - defined when you define CONFIG_HARD_I2C. - - In both cases you will need to define CONFIG_SYS_I2C_SPEED - to be the frequency (in Hz) at which you wish your i2c bus - to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie - the CPU's i2c node address). - - Now, the u-boot i2c code for the mpc8xx - (arch/powerpc/cpu/mpc8xx/i2c.c) sets the CPU up as a master node - and so its address should therefore be cleared to 0 (See, - eg, MPC823e User's Manual p.16-473). So, set - CONFIG_SYS_I2C_SLAVE to 0. - - CONFIG_SYS_I2C_INIT_MPC5XXX - - When a board is reset during an i2c bus transfer - chips might think that the current transfer is still - in progress. Reset the slave devices by sending start - commands until the slave device responds. - - That's all that's required for CONFIG_HARD_I2C. - +- Legacy I2C Support: If you use the software i2c interface (CONFIG_SYS_I2C_SOFT) then the following macros need to be defined (examples are from include/configs/lwmon.h): @@ -2487,12 +2065,6 @@ CBFS (Coreboot Filesystem) support eg: #define I2C_INIT (immr->im_cpm.cp_pbdir |= PB_SCL) - I2C_PORT - - (Only for MPC8260 CPU). The I/O port to use (the code - assumes both bits are on the same port). Valid values - are 0..3 for ports A..D. - I2C_ACTIVE The code necessary to make the I2C data line active @@ -2564,23 +2136,6 @@ CBFS (Coreboot Filesystem) support custom i2c_init_board() routine in boards/xxx/board.c is run early in the boot sequence. - CONFIG_SYS_I2C_BOARD_LATE_INIT - - An alternative to CONFIG_SYS_I2C_INIT_BOARD. If this option is - defined a custom i2c_board_late_init() routine in - boards/xxx/board.c is run AFTER the operations in i2c_init() - is completed. This callpoint can be used to unreset i2c bus - using CPU i2c controller register accesses for CPUs whose i2c - controller provide such a method. It is called at the end of - i2c_init() to allow i2c_init operations to setup the i2c bus - controller on the CPU (e.g. setting bus speed & slave address). - - CONFIG_I2CFAST (PPC405GP|PPC405EP only) - - This option enables configuration of bi_iic_fast[] flags - in u-boot bd_info structure based on u-boot environment - variable "i2cfast". (see also i2cfast) - CONFIG_I2C_MULTI_BUS This option allows the use of multiple I2C buses, each of which @@ -2602,7 +2157,7 @@ CBFS (Coreboot Filesystem) support will skip addresses 0x50 and 0x68 on a board with one I2C bus #define CONFIG_I2C_MULTI_BUS - #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} + #define CONFIG_SYS_I2C_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 @@ -2616,17 +2171,6 @@ CBFS (Coreboot Filesystem) support If defined, then this indicates the I2C bus number for the RTC. If not defined, then U-Boot assumes that RTC is on I2C bus 0. - CONFIG_SYS_DTT_BUS_NUM - - If defined, then this indicates the I2C bus number for the DTT. - If not defined, then U-Boot assumes that DTT is on I2C bus 0. - - CONFIG_SYS_I2C_DTT_ADDR: - - If defined, specifies the I2C address of the DTT device. - If not defined, then U-Boot uses predefined value for - specified DTT device. - CONFIG_SOFT_I2C_READ_REPEATED_START defining this will force the i2c_read() function in @@ -2693,19 +2237,6 @@ CBFS (Coreboot Filesystem) support Specify the number of FPGA devices to support. - CONFIG_CMD_FPGA_LOADMK - - Enable support for fpga loadmk command - - CONFIG_CMD_FPGA_LOADP - - Enable support for fpga loadp command - load partial bitstream - - CONFIG_CMD_FPGA_LOADBP - - Enable support for fpga loadbp command - load partial bitstream - (Xilinx only) - CONFIG_SYS_FPGA_PROG_FEEDBACK Enable printing of hash marks during FPGA configuration. @@ -2820,9 +2351,9 @@ CBFS (Coreboot Filesystem) support following board configurations are known to be "pRAM-clean": - IVMS8, IVML24, SPD8xx, TQM8xxL, + IVMS8, IVML24, SPD8xx, HERMES, IP860, RPXlite, LWMON, - FLAGADM, TQM8260 + FLAGADM - Access to physical memory region (> 4GB) Some basic support is provided for operations on memory not @@ -2962,19 +2493,6 @@ CBFS (Coreboot Filesystem) support this is instead controlled by the value of /config/load-environment. -- Parallel Flash support: - CONFIG_SYS_NO_FLASH - - Traditionally U-Boot was run on systems with parallel NOR - flash. This option is used to disable support for parallel NOR - flash. This option should be defined if the board does not have - parallel flash. - - If this option is not defined one of the generic flash drivers - (e.g. CONFIG_FLASH_CFI_DRIVER or CONFIG_ST_SMI) must be - selected or the board must provide an implementation of the - flash API (see include/flash.h). - - DataFlash Support: CONFIG_HAS_DATAFLASH @@ -3006,12 +2524,6 @@ CBFS (Coreboot Filesystem) support Define this option to include a destructive SPI flash test ('sf test'). - CONFIG_SF_DUAL_FLASH Dual flash memories - - Define this option to use dual flash support where two flash - memories can be connected with a given cs line. - Currently Xilinx Zynq qspi supports these type of connections. - - SystemACE Support: CONFIG_SYSTEMACE @@ -3046,48 +2558,6 @@ CBFS (Coreboot Filesystem) support A better solution is to properly configure the firewall, but sometimes that is not allowed. -- Hashing support: - CONFIG_CMD_HASH - - This enables a generic 'hash' command which can produce - hashes / digests from a few algorithms (e.g. SHA1, SHA256). - - CONFIG_HASH_VERIFY - - Enable the hash verify command (hash -v). This adds to code - size a little. - - CONFIG_SHA1 - This option enables support of hashing using SHA1 - algorithm. The hash is calculated in software. - CONFIG_SHA256 - This option enables support of hashing using - SHA256 algorithm. The hash is calculated in software. - CONFIG_SHA_HW_ACCEL - This option enables hardware acceleration - for SHA1/SHA256 hashing. - This affects the 'hash' command and also the - hash_lookup_algo() function. - CONFIG_SHA_PROG_HW_ACCEL - This option enables - hardware-acceleration for SHA1/SHA256 progressive hashing. - Data can be streamed in a block at a time and the hashing - is performed in hardware. - - Note: There is also a sha1sum command, which should perhaps - be deprecated in favour of 'hash sha1'. - -- Freescale i.MX specific commands: - CONFIG_CMD_HDMIDETECT - This enables 'hdmidet' command which returns true if an - HDMI monitor is detected. This command is i.MX 6 specific. - - CONFIG_CMD_BMODE - This enables the 'bmode' (bootmode) command for forcing - a boot from specific media. - - This is useful for forcing the ROM's usb downloader to - activate upon a watchdog reset which is nice when iterating - on U-Boot. Using the reset button or running bmode normal - will set it back to normal. This command currently - supports i.MX53 and i.MX6. - - bootcount support: CONFIG_BOOTCOUNT_LIMIT @@ -3096,8 +2566,6 @@ CBFS (Coreboot Filesystem) support CONFIG_AT91SAM9XE enable special bootcounter support on at91sam9xe based boards. - CONFIG_BLACKFIN - enable special bootcounter support on blackfin based boards. CONFIG_SOC_DA8XX enable special bootcounter support on da850 based boards. CONFIG_BOOTCOUNT_RAM @@ -3286,15 +2754,6 @@ FIT uImage format: This define is introduced, as the legacy image format is enabled per default for backward compatibility. -- FIT image support: - CONFIG_FIT_DISABLE_SHA256 - Supporting SHA256 hashes has quite an impact on binary size. - For constrained systems sha256 hash support can be disabled - with this option. - - TODO(sjg@chromium.org): Adjust this option to be positive, - and move it to Kconfig - - Standalone program support: CONFIG_STANDALONE_LOAD_ADDR @@ -3474,10 +2933,6 @@ FIT uImage format: consider that a completely unreadable NAND block is bad, and thus should be skipped silently. - CONFIG_SPL_ABORT_ON_RAW_IMAGE - When defined, SPL will proceed to another boot method - if the image it has loaded does not have a signature. - CONFIG_SPL_RELOC_STACK Adress of the start of the stack SPL will use after relocation. If unspecified, this is equal to @@ -3508,26 +2963,6 @@ FIT uImage format: CONFIG_SPL_INIT_MINIMAL Arch init code should be built for a very small image - CONFIG_SPL_LIBCOMMON_SUPPORT - Support for common/libcommon.o in SPL binary - - CONFIG_SPL_LIBDISK_SUPPORT - Support for disk/libdisk.o in SPL binary - - CONFIG_SPL_I2C_SUPPORT - Support for drivers/i2c/libi2c.o in SPL binary - - CONFIG_SPL_GPIO_SUPPORT - Support for drivers/gpio/libgpio.o in SPL binary - - CONFIG_SPL_MMC_SUPPORT - Support for drivers/mmc/libmmc.o in SPL binary - - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, - CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS, - Address and partition on the MMC to load U-Boot from - when the MMC is being used in raw mode. - CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION Partition on the MMC to load U-Boot from when the MMC is being used in raw mode @@ -3546,12 +2981,6 @@ FIT uImage format: Partition on the MMC to load U-Boot from when the MMC is being used in fs mode - CONFIG_SPL_FAT_SUPPORT - Support for fs/fat/libfat.o in SPL binary - - CONFIG_SPL_EXT_SUPPORT - Support for EXT filesystem in SPL binary - CONFIG_SPL_FS_LOAD_PAYLOAD_NAME Filename to read to load U-Boot when reading from filesystem @@ -3590,18 +3019,10 @@ FIT uImage format: Support for a lightweight UBI (fastmap) scanner and loader - CONFIG_SPL_MTD_SUPPORT - Support for the MTD subsystem within SPL. Useful for - environment on NAND support within SPL. - CONFIG_SPL_NAND_RAW_ONLY Support to boot only raw u-boot.bin images. Use this only if you need to save space. - CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT - Set for the SPL on PPC mpc8xxx targets, support for - drivers/ddr/fsl/libddr.o in SPL binary. - CONFIG_SPL_COMMON_INIT_DDR Set for common ddr init with serial presence detect in SPL binary. @@ -3637,29 +3058,9 @@ FIT uImage format: Support for an OMAP3-specific set of functions to return the ID and MFR of the first attached NAND chip, if present. - CONFIG_SPL_SERIAL_SUPPORT - Support for drivers/serial/libserial.o in SPL binary - - CONFIG_SPL_SPI_FLASH_SUPPORT - Support for drivers/mtd/spi/libspi_flash.o in SPL binary - - CONFIG_SPL_SPI_SUPPORT - Support for drivers/spi/libspi.o in SPL binary - CONFIG_SPL_RAM_DEVICE Support for running image already present in ram, in SPL binary - CONFIG_SPL_LIBGENERIC_SUPPORT - Support for lib/libgeneric.o in SPL binary - - CONFIG_SPL_ENV_SUPPORT - Support for the environment operating in SPL binary - - CONFIG_SPL_NET_SUPPORT - Support for the net/libnet.o in SPL binary. - It conflicts with SPL env from storage medium specified by - CONFIG_ENV_IS_xxx but CONFIG_ENV_IS_NOWHERE - CONFIG_SPL_PAD_TO Image offset to which the SPL should be padded before appending the SPL payload. By default, this is defined as @@ -3746,21 +3147,6 @@ Configuration Settings: - CONFIG_SYS_BAUDRATE_TABLE: List of legal baudrate settings for this board. -- CONFIG_SYS_CONSOLE_INFO_QUIET - Suppress display of console information at boot. - -- CONFIG_SYS_CONSOLE_IS_IN_ENV - If the board specific function - extern int overwrite_console (void); - returns 1, the stdin, stderr and stdout are switched to the - serial port, else the settings in the environment are used. - -- CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE - Enable the call to overwrite_console(). - -- CONFIG_SYS_CONSOLE_ENV_OVERWRITE - Enable overwrite of previous console environment settings. - - CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END: Begin and End addresses of the area used by the simple memory test. @@ -3808,10 +3194,6 @@ Configuration Settings: - CONFIG_SYS_SDRAM_BASE: Physical start address of SDRAM. _Must_ be 0 here. -- CONFIG_SYS_MBIO_BASE: - Physical start address of Motherboard I/O (if using a - Cogent motherboard) - - CONFIG_SYS_FLASH_BASE: Physical start address of Flash memory. @@ -4036,11 +3418,6 @@ Configuration Settings: If defined, don't allow the -f switch to env set override variable access flags. -- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only) - This is set by OMAP boards for the max time that reset should - be asserted. See doc/README.omap-reset-time for details on how - the value can be calculated on a given board. - - CONFIG_USE_STDINT If stdint.h is available with your toolchain you can define this option to enable it. You can provide option 'USE_STDINT=1' when @@ -4243,7 +3620,7 @@ to save the current settings. This setting describes a second storage area of CONFIG_ENV_SIZE size used to hold a redundant copy of the environment data, so that there is a valid backup copy in case there is a power failure - during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be + during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be aligned to an erase sector boundary. - CONFIG_ENV_SPI_BUS (optional): @@ -4294,7 +3671,7 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. This setting describes a second storage area of CONFIG_ENV_SIZE size used to hold a redundant copy of the environment data, so that there is a valid backup copy in case there is a power failure - during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be + during a "saveenv" operation. CONFIG_ENV_OFFSET_REDUND must be aligned to an erase block boundary. - CONFIG_ENV_RANGE (optional): @@ -4353,7 +3730,7 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. Define this to a string that is the name of the block device. - - FAT_ENV_DEV_AND_PART: + - FAT_ENV_DEVICE_AND_PART: Define this to a string to specify the partition of the device. It can be as following: @@ -4375,7 +3752,7 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. environment. - CONFIG_FAT_WRITE: - This should be defined. Otherwise it cannot save the environment file. + This must be enabled. Otherwise it cannot save the environment file. - CONFIG_ENV_IS_IN_MMC: @@ -4428,16 +3805,6 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. set. If this value is set, it must be set to the same value as CONFIG_ENV_SIZE. -- CONFIG_SYS_SPI_INIT_OFFSET - - Defines offset to the initial SPI buffer area in DPRAM. The - area is used at an early stage (ROM part) if the environment - is configured to reside in the SPI EEPROM: We need a 520 byte - scratch DPRAM area. It is used between the two initialization - calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems - to be a good choice since it makes it far enough from the - start of the data area as well as from the stack pointer. - Please note that the environment is read-only until the monitor has been relocated to RAM and a RAM copy of the environment has been created; also, when using EEPROM you will have to use getenv_f() @@ -4491,13 +3858,6 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_CACHELINE_SIZE: Cache Line Size of the CPU. -- CONFIG_SYS_DEFAULT_IMMR: - Default address of the IMMR after system reset. - - Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU, - and RPXsuper) to be able to adjust the position of - the IMMR register after a reset. - - CONFIG_SYS_CCSRBAR_DEFAULT: Default (power-on reset) physical address of CCSR on Freescale PowerPC SOCs. @@ -4506,9 +3866,6 @@ Low Level (hardware related) configuration options: Virtual address of CCSR. On a 32-bit build, this is typically the same value as CONFIG_SYS_CCSRBAR_DEFAULT. - CONFIG_SYS_DEFAULT_IMMR must also be set to this value, - for cross-platform code that uses that macro instead. - - CONFIG_SYS_CCSRBAR_PHYS: Physical address of CCSR. CCSR can be relocated to a new physical address, if desired. In this case, this macro should @@ -4571,7 +3928,7 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_IMMR: Physical address of the Internal Memory. DO NOT CHANGE unless you know exactly what you're - doing! (11-4) [MPC8xx/82xx systems only] + doing! (11-4) [MPC8xx systems only] - CONFIG_SYS_INIT_RAM_ADDR: @@ -4584,9 +3941,7 @@ Low Level (hardware related) configuration options: sequences. U-Boot uses the following memory types: - - MPC8xx and MPC8260: IMMR (internal memory of the CPU) - - MPC824X: data cache - - PPC4xx: data cache + - MPC8xx: IMMR (internal memory of the CPU) - CONFIG_SYS_GBL_DATA_OFFSET: @@ -4595,7 +3950,7 @@ Low Level (hardware related) configuration options: CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial data is located at the end of the available space (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - - CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just + GENERATED_GBL_DATA_SIZE), and the initial stack is just below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) downward. @@ -4606,16 +3961,6 @@ Low Level (hardware related) configuration options: point to an otherwise UNUSED address space between the top of RAM and the start of the PCI space. -- CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6) - -- CONFIG_SYS_SYPCR: System Protection Control (11-9) - -- CONFIG_SYS_TBSCR: Time Base Status and Control (11-26) - -- CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31) - -- CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30) - - CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) - CONFIG_SYS_OR_TIMING_SDRAM: @@ -4624,8 +3969,6 @@ Low Level (hardware related) configuration options: - CONFIG_SYS_MAMR_PTA: periodic timer for refresh -- CONFIG_SYS_DER: Debug Event Register (37-47) - - FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM, CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP, CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM, @@ -4637,48 +3980,6 @@ Low Level (hardware related) configuration options: CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM: Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM) -- CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K, - CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL: - Machine Mode Register and Memory Periodic Timer - Prescaler definitions (SDRAM timing) - -- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]: - enable I2C microcode relocation patch (MPC8xx); - define relocation offset in DPRAM [DSP2] - -- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]: - enable SMC microcode relocation patch (MPC8xx); - define relocation offset in DPRAM [SMC1] - -- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]: - enable SPI microcode relocation patch (MPC8xx); - define relocation offset in DPRAM [SCC4] - -- CONFIG_SYS_USE_OSCCLK: - Use OSCM clock mode on MBX8xx board. Be careful, - wrong setting might damage your board. Read - doc/README.MBX before setting this variable! - -- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only) - Offset of the bootmode word in DPRAM used by post - (Power On Self Tests). This definition overrides - #define'd default value in commproc.h resp. - cpm_8260.h. - -- CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB, - CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL, - CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS, - CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB, - CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START, - CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL, - CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE, - CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only) - Overrides the default PCI memory map in arch/powerpc/cpu/mpc8260/pci.c if set. - -- CONFIG_PCI_DISABLE_PCIE: - Disable PCI-Express on systems where it is supported but not - required. - - CONFIG_PCI_ENUM_ONLY Only scan through and get the devices on the buses. Don't do any setup work, presumably because someone or @@ -4753,21 +4054,6 @@ Low Level (hardware related) configuration options: Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. -- CONFIG_ETHER_ON_FEC[12] - Define to enable FEC[12] on a 8xx series processor. - -- CONFIG_FEC[12]_PHY - Define to the hardcoded PHY address which corresponds - to the given FEC; i. e. - #define CONFIG_FEC1_PHY 4 - means that the PHY with address 4 is connected to FEC1 - - When set to -1, means to probe for first available. - -- CONFIG_FEC[12]_PHY_NORXERR - The PHY does not have a RXERR line (RMII only). - (so program the FEC to ignore it). - - CONFIG_RMII Enable RMII mode for all FECs. Note that this is a global option, we can't @@ -4841,21 +4127,10 @@ Low Level (hardware related) configuration options: addressable memory. This option causes some memory accesses to be mapped through map_sysmem() / unmap_sysmem(). -- CONFIG_USE_ARCH_MEMCPY - CONFIG_USE_ARCH_MEMSET - If these options are used a optimized version of memcpy/memset will - be used if available. These functions may be faster under some - conditions but may increase the binary size. - - CONFIG_X86_RESET_VECTOR If defined, the x86 reset vector code is included. This is not needed when U-Boot is running from Coreboot. -- CONFIG_SYS_MPUCLK - Defines the MPU clock speed (in MHz). - - NOTE : currently only supported on AM335x platforms. - - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC: Enables the RTC32K OSC on AM33xx based plattforms @@ -4902,10 +4177,6 @@ within that device. Specifies that QE/FMAN firmware is located on the primary SD/MMC device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. -- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH - Specifies that QE/FMAN firmware is located on the primary SPI - device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. - - CONFIG_SYS_QE_FMAN_FW_IN_REMOTE Specifies that QE/FMAN firmware is located in the remote (master) memory space. CONFIG_SYS_FMAN_FW_ADDR is a virtual address which @@ -4924,34 +4195,12 @@ within that device. - CONFIG_FSL_MC_ENET Enable the MC driver for Layerscape SoCs. -- CONFIG_SYS_LS_MC_FW_ADDR - The address in the storage device where the firmware is located. The - meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx macro - is also specified. - -- CONFIG_SYS_LS_MC_FW_LENGTH - The maximum possible size of the firmware. The firmware binary format - has a field that specifies the actual size of the firmware, but it - might not be possible to read any part of the firmware unless some - local storage is allocated to hold the entire firmware first. - -- CONFIG_SYS_LS_MC_FW_IN_NOR - Specifies that MC firmware is located in NOR flash, mapped as - normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the - virtual address in NOR flash. - Freescale Layerscape Debug Server Support: ------------------------------------------- The Freescale Layerscape Debug Server Support supports the loading of "Debug Server firmware" and triggering SP boot-rom. This firmware often needs to be loaded during U-Boot booting. -- CONFIG_FSL_DEBUG_SERVER - Enable the Debug Server for Layerscape SoCs. - -- CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE - Define minimum DDR size required for debug server image - - CONFIG_SYS_MC_RSV_MEM_ALIGN Define alignment of reserved memory MC requires @@ -5554,9 +4803,9 @@ details; basically, the header defines the following image properties: LynxOS, pSOS, QNX, RTEMS, INTEGRITY; Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, LynxOS, INTEGRITY). -* Target CPU Architecture (Provisions for Alpha, ARM, AVR32, Intel x86, +* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86, IA64, MIPS, NDS32, Nios II, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit; - Currently supported: ARM, AVR32, Intel x86, MIPS, NDS32, Nios II, PowerPC). + Currently supported: ARM, Intel x86, MIPS, NDS32, Nios II, PowerPC). * Compression Type (uncompressed, gzip, bzip2) * Load Address * Entry Point @@ -6252,11 +5501,6 @@ For PowerPC, the following registers have specific use: average for all boards 752 bytes for the whole U-Boot image, 624 text + 127 data). -On Blackfin, the normal C ABI (except for P3) is followed as documented here: - http://docs.blackfin.uclinux.org/doku.php?id=application_binary_interface - - ==> U-Boot will use P3 to hold a pointer to the global data - On ARM, the following registers are used: R0: function argument word/integer result @@ -6352,9 +5596,9 @@ configuration for CS0# this is a mirror of the on board Flash memory. To be able to re-map memory U-Boot then jumps to its link address. To be able to implement the initialization code in C, a (small!) initial stack is set up in the internal Dual Ported RAM (in case CPUs -which provide such a feature like MPC8xx or MPC8260), or in a locked -part of the data cache. After that, U-Boot initializes the CPU core, -the caches and the SIU. +which provide such a feature like), or in a locked part of the data +cache. After that, U-Boot initializes the CPU core, the caches and +the SIU. Next, all (potentially) available memory banks are mapped using a preliminary mapping. For example, we put them on 512 MB boundaries