X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=arch%2Farm%2Fcpu%2Farm1176%2Fstart.S;h=7c00201dd0ab7689604797922141045ae3235838;hb=399e2bb60cb76131c49446baf350697142af7c07;hp=4c0ab4d0eebce58458ab52a8e10567891b65a761;hpb=1d2f74690cace803844bce198a6d5fa1b6cd11f9;p=u-boot

diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 4c0ab4d0ee..7c00201dd0 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -16,6 +16,7 @@
 
 #include <asm-offsets.h>
 #include <config.h>
+#include <linux/linkage.h>
 
 #ifndef CONFIG_SYS_PHY_UBOOT_BASE
 #define CONFIG_SYS_PHY_UBOOT_BASE	CONFIG_SYS_UBOOT_BASE
@@ -37,6 +38,11 @@
 	.globl reset
 
 reset:
+	/* Allow the board to save important registers */
+	b	save_boot_params
+.globl	save_boot_params_ret
+save_boot_params_ret:
+
 	/*
 	 * set the cpu to SVC32 mode
 	 */
@@ -78,7 +84,7 @@ cpu_init_crit:
 	mrc	p15, 0, r0, c1, c0, 0
 	bic	r0, r0, #0x00002300	@ clear bits 13, 9:8 (--V- --RS)
 	bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
-	orr	r0, r0, #0x00000002	@ set bit 2 (A) Align
+	orr	r0, r0, #0x00000002	@ set bit 1 (A) Align
 	orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
 
 	/* Prepare to disable the MMU */
@@ -110,3 +116,7 @@ mmu_disable_phys:
 c_runtime_cpu_setup:
 
 	mov	pc, lr
+
+WEAK(save_boot_params)
+	b	save_boot_params_ret	/* back to my caller */
+ENDPROC(save_boot_params)