X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=arch%2Farm%2Fdts%2Fzynq-zybo.dts;h=dcfc00e0967bb301525870a14f3261ce127f52e4;hb=2610b1362b7a6b7bb880d1aa4f7c960997305bc3;hp=20e03867773a0d86b66877a056a861ecc2924569;hpb=9757b65befff800303f053d95d49b167a0d159a2;p=u-boot

diff --git a/arch/arm/dts/zynq-zybo.dts b/arch/arm/dts/zynq-zybo.dts
index 20e0386777..dcfc00e096 100644
--- a/arch/arm/dts/zynq-zybo.dts
+++ b/arch/arm/dts/zynq-zybo.dts
@@ -1,7 +1,8 @@
 /*
  * Digilent ZYBO board DTS
  *
- * Copyright (C) 2013 Xilinx, Inc.
+ *  Copyright (C) 2011 - 2015 Xilinx
+ *  Copyright (C) 2012 National Instruments Corp.
  *
  * SPDX-License-Identifier:	GPL-2.0+
  */
@@ -9,15 +10,45 @@
 #include "zynq-7000.dtsi"
 
 / {
-	model = "Zynq ZYBO Board";
-	compatible = "xlnx,zynq-zybo", "xlnx,zynq-7000";
+	model = "Zynq ZYBO Development Board";
+	compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
 
 	aliases {
+		ethernet0 = &gem0;
 		serial0 = &uart1;
 	};
 
 	memory {
 		device_type = "memory";
-		reg = <0 0x20000000>;
+		reg = <0x0 0x20000000>;
 	};
+
+	chosen {
+		bootargs = "earlyprintk";
+		stdout-path = "serial0:115200n8";
+	};
+
+};
+
+&clkc {
+	ps-clk-frequency = <50000000>;
+};
+
+&gem0 {
+	status = "okay";
+	phy-mode = "rgmii-id";
+	phy-handle = <&ethernet_phy>;
+
+	ethernet_phy: ethernet-phy@0 {
+		reg = <0>;
+	};
+};
+
+&sdhci0 {
+	status = "okay";
+};
+
+&uart1 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
 };