X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=arch%2Fpowerpc%2Fcpu%2Fmpc824x%2Fstart.S;h=076df70a9f128e7cdc94a7bf540877005ba9e0f4;hb=c68436fa427a69ea308d74c410067507d6c7103b;hp=fc4e922d633d15d2f09626223265189fe62cbc24;hpb=44c6e6591cb451ae606f8bde71dd5fb7b4002544;p=u-boot

diff --git a/arch/powerpc/cpu/mpc824x/start.S b/arch/powerpc/cpu/mpc824x/start.S
index fc4e922d63..076df70a9f 100644
--- a/arch/powerpc/cpu/mpc824x/start.S
+++ b/arch/powerpc/cpu/mpc824x/start.S
@@ -40,7 +40,6 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <mpc824x.h>
-#include <timestamp.h>
 #include <version.h>
 
 #define _LINUX_CONFIG_H 1	/* avoid reading Linux autoconf.h file	*/
@@ -52,10 +51,6 @@
 #include <asm/mmu.h>
 #include <asm/u-boot.h>
 
-#ifndef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING ""
-#endif
-
 /* We don't want the MMU yet.
 */
 #undef	MSR_KERNEL
@@ -92,9 +87,7 @@
 	.long	0x27051956		/* U-Boot Magic Number			*/
 	.globl	version_string
 version_string:
-	.ascii U_BOOT_VERSION
-	.ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
-	.ascii CONFIG_IDENT_STRING, "\0"
+	.ascii U_BOOT_VERSION_STRING, "\0"
 
 	. = EXC_OFF_SYS_RESET
 	.globl	_start
@@ -120,9 +113,6 @@ _start:
 
 
 in_flash:
-#if defined(CONFIG_BMW)
-	bl early_init_f /* Must be ASM: no stack yet! */
-#endif
 	/*
 	 * Setup BATs - cannot be done in C since we don't have a stack yet
 	 */
@@ -133,7 +123,7 @@ in_flash:
 	mfmsr	r3
 	ori	r3, r3, (MSR_IR | MSR_DR)
 	mtmsr	r3
-#if !defined(CONFIG_BMW)
+
 	/* Enable and invalidate data cache.
 	 */
 	mfspr	r3, HID0
@@ -165,7 +155,7 @@ in_flash:
 	ori	r3, r3, 0x0080
 	sync
 	mtspr	1011, r3
-#endif /* !CONFIG_BMW */
+
 	/*
 	 * Thisk the stack pointer *somewhere* sensible. Doesnt
 	 * matter much where as we'll move it when we relocate
@@ -505,7 +495,6 @@ relocate_code:
 	bdnz	3b
 
 4:
-#if !defined(CONFIG_BMW)
 /* Unlock the data cache and invalidate locked area */
 	xor	r0, r0, r0
 	mtspr	1011, r0
@@ -517,7 +506,6 @@ relocate_code:
 	dcbi	r0, r4
 	addi	r4, r4, 32
 	bdnz	41b
-#endif
 
 /*
  * Now flush the cache: note that we must start from a cache aligned