X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=board%2Fcm-bf548%2Fcm-bf548.c;h=90ce4c3eb766f7b128fecb24b171ee6382490639;hb=d2eaec600617346a143a07bb073466add7a68e97;hp=796263d62b39b66a5f700be7563baefc0c64a351;hpb=4fb799aeafa71c4e6caacd3acdc4a4547cfbd5d4;p=u-boot

diff --git a/board/cm-bf548/cm-bf548.c b/board/cm-bf548/cm-bf548.c
index 796263d62b..90ce4c3eb7 100644
--- a/board/cm-bf548/cm-bf548.c
+++ b/board/cm-bf548/cm-bf548.c
@@ -11,6 +11,7 @@
 #include <command.h>
 #include <netdev.h>
 #include <asm/blackfin.h>
+#include <asm/portmux.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -21,62 +22,15 @@ int checkboard(void)
 	return 0;
 }
 
-phys_size_t initdram(int board_type)
-{
-	gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
-	gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE;
-	return gd->bd->bi_memsize;
-}
-
 int board_early_init_f(void)
 {
-	/* Port H: PH8 - PH13 == A4 - A9
-	 * address lines of the parallel asynchronous memory interface
-	 */
-
-	/************************************************
-	* configure GPIO 				*
-	* set port H function enable register		*
-	*  configure PH8-PH13 as peripheral (not GPIO) 	*
-	*************************************************/
-	bfin_write_PORTH_FER(0x3F03);
-
-	/************************************************
-	* set port H MUX to configure PH8-PH13		*
-	*  1st Function (MUX = 00) (bits 16-27 == 0)	*
-	*  Set to address signals A4-A9 		*
-	*************************************************/
-	bfin_write_PORTH_MUX(0);
-
-	/************************************************
-	* set port H direction register			*
-	*  enable PH8-PH13 as outputs			*
-	*************************************************/
-	bfin_write_PORTH_DIR_SET(0x3F00);
-
-	/* Port I: PI0 - PH14 == A10 - A24
-	 * address lines of the parallel asynchronous memory interface
-	 */
-
-	/************************************************
-	* set port I function enable register		*
-	*  configure PI0-PI14 as peripheral (not GPIO) 	*
-	*************************************************/
-	bfin_write_PORTI_FER(0x7fff);
-
-	/**************************************************
-	* set PORT I MUX to configure PI14-PI0 as	  *
-	* 1st Function (MUX=00) - address signals A10-A24 *
-	***************************************************/
-	bfin_write_PORTI_MUX(0);
-
-	/****************************************
-	* set PORT I direction register		*
-	*  enable PI0 - PI14 as outputs		*
-	*****************************************/
-	bfin_write_PORTI_DIR_SET(0x7fff);
-
-	return 0;
+	/* Set async addr lines as peripheral */
+	const unsigned short pins[] = {
+		P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
+		P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20,
+		P_A21, P_A22, P_A23, P_A24, 0
+	};
+	return peripheral_request_list(pins, "async");
 }
 
 int board_eth_init(bd_t *bis)