X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=board%2Fcogent%2Fserial.c;h=95c81207225e815205d91bb955a36eb7bafee6d0;hb=cd2bf4846c36a225bfffdedda50e5e80c8b2857f;hp=4c200170d0db13daed80ac597d9ab49941f45974;hpb=c609719b8d1b2dca590e0ed499016d041203e403;p=u-boot diff --git a/board/cogent/serial.c b/board/cogent/serial.c index 4c200170d0..95c8120722 100644 --- a/board/cogent/serial.c +++ b/board/cogent/serial.c @@ -4,12 +4,16 @@ */ #include -#include +#include "serial.h" +#include +#include + +DECLARE_GLOBAL_DATA_PTR; #if (CMA_MB_CAPS & CMA_MB_CAP_SERPAR) #if (defined(CONFIG_8xx) && defined(CONFIG_8xx_CONS_NONE)) || \ - (defined(CONFIG_8260) && defined(CONFIG_CONS_NONE)) + (defined(CONFIG_MPC8260) && defined(CONFIG_CONS_NONE)) #if CONFIG_CONS_INDEX == 1 #define CMA_MB_SERIAL_BASE CMA_MB_SERIALA_BASE @@ -23,83 +27,86 @@ #error CONFIG_CONS_INDEX must be configured for Cogent motherboard serial #endif -int serial_init (void) +static int cogent_serial_init(void) { -/* DECLARE_GLOBAL_DATA_PTR; */ + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; + cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */ + serial_setbrg (); + cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ + cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */ + cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ - cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ - serial_setbrg (); - cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ - cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ - cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ + return (0); +} - return (0); +static void cogent_serial_setbrg(void) +{ + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; + unsigned int divisor; + unsigned char lcr; + + if ((divisor = br_to_div (gd->baudrate)) == 0) + divisor = DEFDIV; + + lcr = cma_mb_reg_read (&mbsp->ser_lcr); + cma_mb_reg_write (&mbsp->ser_lcr, lcr | 0x80); /* Access baud rate(set DLAB) */ + cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff); + cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff); + cma_mb_reg_write (&mbsp->ser_lcr, lcr); /* unset DLAB */ } -void -serial_setbrg (void) +static void cogent_serial_putc(const char c) { - DECLARE_GLOBAL_DATA_PTR; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; - unsigned int divisor; - unsigned char lcr; + if (c == '\n') + serial_putc ('\r'); - if ((divisor = br_to_div(gd->baudrate)) == 0) - divisor = DEFDIV; + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0); - lcr = cma_mb_reg_read(&mbsp->ser_lcr); - cma_mb_reg_write(&mbsp->ser_lcr, lcr|0x80);/* Access baud rate(set DLAB)*/ - cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff); - cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); - cma_mb_reg_write(&mbsp->ser_lcr, lcr); /* unset DLAB */ + cma_mb_reg_write (&mbsp->ser_thr, c); } -void -serial_putc(const char c) +static int cogent_serial_getc(void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; - if (c == '\n') - serial_putc('\r'); + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0); - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) - ; - - cma_mb_reg_write(&mbsp->ser_thr, c); + return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f); } -void -serial_puts(const char *s) +static int cogent_serial_tstc(void) { - while (*s != '\0') - serial_putc(*s++); + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_SERIAL_BASE; + + return ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) != 0); } -int -serial_getc(void) +static struct serial_device cogent_serial_drv = { + .name = "cogent_serial", + .start = cogent_serial_init, + .stop = NULL, + .setbrg = cogent_serial_setbrg, + .putc = cogent_serial_putc, + .puts = default_serial_puts, + .getc = cogent_serial_getc, + .tstc = cogent_serial_tstc, +}; + +void cogent_serial_initialize(void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; - - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) - ; - - return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f); + serial_register(&cogent_serial_drv); } -int -serial_tstc(void) +__weak struct serial_device *default_serial_console(void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_SERIAL_BASE; - - return ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) != 0); + return &cogent_serial_drv; } - #endif /* CONS_NONE */ -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) && \ +#if defined(CONFIG_CMD_KGDB) && \ defined(CONFIG_KGDB_NONE) #if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX @@ -118,71 +125,63 @@ serial_tstc(void) #error CONFIG_KGDB_INDEX must be configured for Cogent motherboard serial #endif -void -kgdb_serial_init(void) +void kgdb_serial_init (void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; - unsigned int divisor; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; + unsigned int divisor; - if ((divisor = br_to_div(CONFIG_KGDB_BAUDRATE)) == 0) - divisor = DEFDIV; + if ((divisor = br_to_div (CONFIG_KGDB_BAUDRATE)) == 0) + divisor = DEFDIV; - cma_mb_reg_write(&mbsp->ser_ier, 0x00); /* turn off interrupts */ - cma_mb_reg_write(&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB)*/ - cma_mb_reg_write(&mbsp->ser_brl, divisor & 0xff); - cma_mb_reg_write(&mbsp->ser_brh, (divisor >> 8) & 0xff); - cma_mb_reg_write(&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ - cma_mb_reg_write(&mbsp->ser_mcr, 0x03); /* RTS/DTR */ - cma_mb_reg_write(&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ + cma_mb_reg_write (&mbsp->ser_ier, 0x00); /* turn off interrupts */ + cma_mb_reg_write (&mbsp->ser_lcr, 0x80); /* Access baud rate(set DLAB) */ + cma_mb_reg_write (&mbsp->ser_brl, divisor & 0xff); + cma_mb_reg_write (&mbsp->ser_brh, (divisor >> 8) & 0xff); + cma_mb_reg_write (&mbsp->ser_lcr, 0x03); /* 8 data, 1 stop, no parity */ + cma_mb_reg_write (&mbsp->ser_mcr, 0x03); /* RTS/DTR */ + cma_mb_reg_write (&mbsp->ser_fcr, 0x07); /* Clear & enable FIFOs */ - printf("[on cma10x serial port B] "); + printf ("[on cma10x serial port B] "); } -void -putDebugChar(int c) +void putDebugChar (int c) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_THRE) == 0) - ; + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_THRE) == 0); - cma_mb_reg_write(&mbsp->ser_thr, c & 0xff); + cma_mb_reg_write (&mbsp->ser_thr, c & 0xff); } -void -putDebugStr(const char *str) +void putDebugStr (const char *str) { - while (*str != '\0') { - if (*str == '\n') - putDebugChar('\r'); - putDebugChar(*str++); - } + while (*str != '\0') { + if (*str == '\n') + putDebugChar ('\r'); + putDebugChar (*str++); + } } -int -getDebugChar(void) +int getDebugChar (void) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; - while ((cma_mb_reg_read(&mbsp->ser_lsr) & LSR_DR) == 0) - ; + while ((cma_mb_reg_read (&mbsp->ser_lsr) & LSR_DR) == 0); - return ((int)cma_mb_reg_read(&mbsp->ser_rhr) & 0x7f); + return ((int) cma_mb_reg_read (&mbsp->ser_rhr) & 0x7f); } -void -kgdb_interruptible(int yes) +void kgdb_interruptible (int yes) { - cma_mb_serial *mbsp = (cma_mb_serial *)CMA_MB_KGDB_SER_BASE; - - if (yes == 1) { - printf("kgdb: turning serial ints on\n"); - cma_mb_reg_write(&mbsp->ser_ier, 0xf); - } - else { - printf("kgdb: turning serial ints off\n"); - cma_mb_reg_write(&mbsp->ser_ier, 0x0); - } + cma_mb_serial *mbsp = (cma_mb_serial *) CMA_MB_KGDB_SER_BASE; + + if (yes == 1) { + printf ("kgdb: turning serial ints on\n"); + cma_mb_reg_write (&mbsp->ser_ier, 0xf); + } else { + printf ("kgdb: turning serial ints off\n"); + cma_mb_reg_write (&mbsp->ser_ier, 0x0); + } } #endif /* KGDB && KGDB_NONE */