X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=board%2Ffreescale%2Fls1043aqds%2Fddr.c;h=d4540d0a9a0e4b2be5bed3e97e70a170f4f22fc3;hb=8e1d92fdbc09a6a31bd2a6571d915b1c38307320;hp=0fd835d74fb3712467719cb79b718740d06bf1ef;hpb=fc15b9beed05dec6cc092c265042381a0eadb0e9;p=u-boot

diff --git a/board/freescale/ls1043aqds/ddr.c b/board/freescale/ls1043aqds/ddr.c
index 0fd835d74f..d4540d0a9a 100644
--- a/board/freescale/ls1043aqds/ddr.c
+++ b/board/freescale/ls1043aqds/ddr.c
@@ -128,7 +128,7 @@ phys_size_t initdram(int board_type)
 void dram_init_banksize(void)
 {
 	/*
-	 * gd->secure_ram tracks the location of secure memory.
+	 * gd->arch.secure_ram tracks the location of secure memory.
 	 * It was set as if the memory starts from 0.
 	 * The address needs to add the offset of its bank.
 	 */
@@ -139,16 +139,17 @@ void dram_init_banksize(void)
 		gd->bd->bi_dram[1].size = gd->ram_size -
 					  CONFIG_SYS_DDR_BLOCK1_SIZE;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[1].start +
-				 gd->secure_ram -
-				 CONFIG_SYS_DDR_BLOCK1_SIZE;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[1].start +
+				      gd->arch.secure_ram -
+				      CONFIG_SYS_DDR_BLOCK1_SIZE;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	} else {
 		gd->bd->bi_dram[0].size = gd->ram_size;
 #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
-		gd->secure_ram = gd->bd->bi_dram[0].start + gd->secure_ram;
-		gd->secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
+		gd->arch.secure_ram = gd->bd->bi_dram[0].start +
+				      gd->arch.secure_ram;
+		gd->arch.secure_ram |= MEM_RESERVE_SECURE_MAINTAINED;
 #endif
 	}
 }