X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=board%2Ffreescale%2Fmpc8641hpcn%2Fmpc8641hpcn.c;h=455569e422b1f702cd332b3bf5ebf4d6f2156003;hb=43b62393da6dfdd7f503d1b37344463a05ea47b5;hp=812111db10070b47098e7364fb446848d568b9ef;hpb=52eb2c79110151b9017a0829c4d44ee7b8e2ca04;p=u-boot

diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 812111db10..455569e422 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2006, 2007, 2010 Freescale Semiconductor.
+ * Copyright 2006, 2007, 2010-2011 Freescale Semiconductor.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -26,6 +26,7 @@
 #include <asm/immap_86xx.h>
 #include <asm/fsl_pci.h>
 #include <asm/fsl_ddr_sdram.h>
+#include <asm/fsl_serdes.h>
 #include <asm/io.h>
 #include <libfdt.h>
 #include <fdt_support.h>
@@ -33,11 +34,6 @@
 
 phys_size_t fixed_sdram(void);
 
-int board_early_init_f(void)
-{
-	return 0;
-}
-
 int checkboard(void)
 {
 	u8 vboot;
@@ -60,9 +56,6 @@ int checkboard(void)
 	return 0;
 }
 
-const char *board_hwconfig = "foo:bar=baz";
-const char *cpu_hwconfig = "foo:bar=baz";
-
 phys_size_t
 initdram(int board_type)
 {
@@ -76,7 +69,7 @@ initdram(int board_type)
 
 	setup_ddr_bat(dram_size);
 
-	puts("    DDR: ");
+	debug("    DDR: ");
 	return dram_size;
 }
 
@@ -129,66 +122,18 @@ fixed_sdram(void)
 }
 #endif	/* !defined(CONFIG_SPD_EEPROM) */
 
-
-#if defined(CONFIG_PCI)
-static struct pci_controller pcie1_hose;
-#endif /* CONFIG_PCI */
-
-#ifdef CONFIG_PCIE2
-static struct pci_controller pcie2_hose;
-#endif	/* CONFIG_PCIE2 */
-
-int first_free_busno = 0;
-
 void pci_init_board(void)
 {
-	struct fsl_pci_info pci_info[2];
-	int pcie_ep;
-	int num = 0;
+	fsl_pcie_init_board(0);
 
 #ifdef CONFIG_PCIE1
-	volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
-	volatile ccsr_gur_t *gur = &immap->im_gur;
-	uint devdisr = in_be32(&gur->devdisr);
-	uint io_sel = (gur->pordevsr & MPC8641_PORDEVSR_IO_SEL)
-		>> MPC8641_PORDEVSR_IO_SEL_SHIFT;
-	int pcie_configured = is_fsl_pci_cfg(LAW_TRGT_IF_PCIE_1, io_sel);
-
-	if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
-		SET_STD_PCIE_INFO(pci_info[num], 1);
-		pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
-		printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
-			pcie_ep ? "Endpoint" : "Root Complex",
-			pci_info[num].regs);
-		first_free_busno = fsl_pci_init_port(&pci_info[num++],
-					&pcie1_hose, first_free_busno);
-
 		/*
 		 * Activate ULI1575 legacy chip by performing a fake
 		 * memory access.  Needed to make ULI RTC work.
 		 */
 		in_be32((unsigned *) ((char *)(CONFIG_SYS_PCIE1_MEM_VIRT
 				       + CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000)));
-
-	} else {
-		puts("PCIE1: disabled\n");
-	}
-#else
-	puts("PCIE1: disabled\n");
 #endif /* CONFIG_PCIE1 */
-
-#ifdef CONFIG_PCIE2
-	SET_STD_PCIE_INFO(pci_info[num], 2);
-	pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
-	printf("PCIE2: connected as %s (base addr %lx)\n",
-		pcie_ep ? "Endpoint" : "Root Complex",
-		pci_info[num].regs);
-	first_free_busno = fsl_pci_init_port(&pci_info[num++],
-				&pcie2_hose, first_free_busno);
-#else
-	puts("PCIE2: disabled\n");
-#endif /* CONFIG_PCIE2 */
-
 }
 
 
@@ -311,12 +256,3 @@ void board_reset(void)
 	while (1)
 		;
 }
-
-#ifdef CONFIG_MP
-extern void cpu_mp_lmb_reserve(struct lmb *lmb);
-
-void board_lmb_reserve(struct lmb *lmb)
-{
-	cpu_mp_lmb_reserve(lmb);
-}
-#endif