X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=board%2Fst%2Fstih410-b2260%2Fboard.c;h=fe639dcc2e38d9f9fca7598b911568acb2d61848;hb=191d8bd509023ccea9cff3129dc8ae76fe297b2d;hp=0c06bcaa6167ca5b20e3cb6d53ce3c7dc6d75b8f;hpb=5cc16d886ee1ec9841a9ec76365d7b841495c075;p=u-boot diff --git a/board/st/stih410-b2260/board.c b/board/st/stih410-b2260/board.c index 0c06bcaa61..fe639dcc2e 100644 --- a/board/st/stih410-b2260/board.c +++ b/board/st/stih410-b2260/board.c @@ -1,12 +1,15 @@ /* - * Board init file for STiH410-B2260 - * - * (C) Copyright 2017 Patrice Chotard + * Copyright (C) 2017, STMicroelectronics - All Rights Reserved + * Author(s): Patrice Chotard, for STMicroelectronics. * * SPDX-License-Identifier: GPL-2.0+ */ #include +#include +#include +#include +#include DECLARE_GLOBAL_DATA_PTR; @@ -16,13 +19,61 @@ int dram_init(void) return 0; } -void dram_init_banksize(void) +int dram_init_banksize(void) { gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +#ifndef CONFIG_SYS_DCACHE_OFF +void enable_caches(void) +{ + /* Enable D-cache. I-cache is already enabled in start.S */ + dcache_enable(); } +#endif int board_init(void) { return 0; } + +#ifdef CONFIG_USB_DWC3 +static struct dwc3_device dwc3_device_data = { + .maximum_speed = USB_SPEED_HIGH, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 0, +}; + +int usb_gadget_handle_interrupts(int index) +{ + dwc3_uboot_handle_interrupt(index); + return 0; +} + +int board_usb_init(int index, enum usb_init_type init) +{ + int node; + const void *blob = gd->fdt_blob; + + /* find the snps,dwc3 node */ + node = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3"); + + dwc3_device_data.base = fdtdec_get_addr(blob, node, "reg"); + + return dwc3_uboot_init(&dwc3_device_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + dwc3_uboot_exit(index); + return 0; +} + +int g_dnl_board_usb_cable_connected(void) +{ + return 1; +} +#endif