X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Farmada100_fec.c;h=89ebf0b517ab9fa55fa874b6d3d3355a662a463a;hb=c4775476d211a4be027e45c14ef961de7312d5f6;hp=52be3a7195d00bbe8d2f356c7abf8405524abaf4;hpb=5c877b1ae0a4219ed6bd8d32cf3f7106b81ecb3b;p=u-boot

diff --git a/drivers/net/armada100_fec.c b/drivers/net/armada100_fec.c
index 52be3a7195..89ebf0b517 100644
--- a/drivers/net/armada100_fec.c
+++ b/drivers/net/armada100_fec.c
@@ -100,7 +100,7 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
 	}
 
 	/* wait for the SMI register to become available */
-	if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, FALSE)) {
+	if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, false)) {
 		printf("ARMD100 FEC: (%s) PHY busy timeout\n",	__func__);
 		return -1;
 	}
@@ -108,7 +108,7 @@ static int smi_reg_read(const char *devname, u8 phy_addr, u8 phy_reg,
 	writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_R, &regs->smi);
 
 	/* now wait for the data to be valid */
-	if (armdfec_phy_timeout(&regs->smi, SMI_R_VALID, TRUE)) {
+	if (armdfec_phy_timeout(&regs->smi, SMI_R_VALID, true)) {
 		val = readl(&regs->smi);
 		printf("ARMD100 FEC: (%s) PHY Read timeout, val=0x%x\n",
 				__func__, val);
@@ -143,7 +143,7 @@ static int smi_reg_write(const char *devname,
 	}
 
 	/* wait for the SMI register to become available */
-	if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, FALSE)) {
+	if (armdfec_phy_timeout(&regs->smi, SMI_BUSY, false)) {
 		printf("ARMD100 FEC: (%s) PHY busy timeout\n",	__func__);
 		return -1;
 	}
@@ -558,15 +558,14 @@ static void armdfec_halt(struct eth_device *dev)
 	clrbits_le32(&regs->pconf, PCR_EN);
 }
 
-static int armdfec_send(struct eth_device *dev, volatile void *dataptr,
-		    int datasize)
+static int armdfec_send(struct eth_device *dev, void *dataptr, int datasize)
 {
 	struct armdfec_device *darmdfec = to_darmdfec(dev);
 	struct armdfec_reg *regs = darmdfec->regs;
 	struct tx_desc *p_txdesc = darmdfec->p_txdesc;
 	void *p = (void *)dataptr;
 	int retry = PHY_WAIT_ITERATIONS * PHY_WAIT_MICRO_SECONDS;
-	u32 cmd_sts;
+	u32 cmd_sts, temp;
 
 	/* Copy buffer if it's misaligned */
 	if ((u32)dataptr & 0x07) {
@@ -587,7 +586,8 @@ static int armdfec_send(struct eth_device *dev, volatile void *dataptr,
 	p_txdesc->byte_cnt = datasize;
 
 	/* Apply send command using high priority TX queue */
-	writel((u32)p_txdesc, &regs->txcdp[TXQ]);
+	temp = (u32)&regs->txcdp[TXQ];
+	writel((u32)p_txdesc, temp);
 	writel(SDMA_CMD_TXDL | SDMA_CMD_TXDH | SDMA_CMD_ERD, &regs->sdma_cmd);
 
 	/*