X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fdavinci_emac.c;h=bb879d8d4fef1a398a806e7b5486ecebab81dd79;hb=af15946aa081dbcd0bec7d507a2b2db4e6b6cda5;hp=36c33af66209b0c890b2617193e1c20f9459b729;hpb=dc02badab480563b0bf9d3908046ea9d6b22ae63;p=u-boot diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index 36c33af662..bb879d8d4f 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0+ /* * Ethernet driver for TI TMS320DM644x (DaVinci) chips. * @@ -16,37 +17,45 @@ * * ---------------------------------------------------------------------------- * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - * ---------------------------------------------------------------------------- - * Modifications: * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot. * ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors - * */ #include #include #include #include #include +#include +#include #include #include +#include "davinci_emac.h" unsigned int emac_dbg = 0; #define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args) +#ifdef EMAC_HW_RAM_ADDR +static inline unsigned long BD_TO_HW(unsigned long x) +{ + if (x == 0) + return 0; + + return x - EMAC_WRAPPER_RAM_ADDR + EMAC_HW_RAM_ADDR; +} + +static inline unsigned long HW_TO_BD(unsigned long x) +{ + if (x == 0) + return 0; + + return x - EMAC_HW_RAM_ADDR + EMAC_WRAPPER_RAM_ADDR; +} +#else +#define BD_TO_HW(x) (x) +#define HW_TO_BD(x) (x) +#endif + #ifdef DAVINCI_EMAC_GIG_ENABLE #define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr) #else @@ -83,7 +92,8 @@ static volatile emac_desc *emac_rx_active_tail = 0; static int emac_rx_queue_active = 0; /* Receive packet buffers */ -static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; +static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * EMAC_RXBUF_SIZE] + __aligned(ARCH_DMA_MINALIGN); #ifndef CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT #define CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT 3 @@ -176,7 +186,7 @@ static int davinci_eth_phy_detect(void) for (i = 0, j = 0; i < 32; i++) if (phy_act_state & (1 << i)) { count++; - if (count < CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT) { + if (count <= CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT) { active_phy_addr[j++] = i; } else { printf("%s: to many PHYs detected.\n", @@ -212,11 +222,10 @@ int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data) if (tmp & MDIO_USERACCESS0_ACK) { *data = tmp & 0xffff; - return(1); + return 1; } - *data = -1; - return(0); + return 0; } /* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */ @@ -237,7 +246,7 @@ int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) while (readl(&adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) ; - return(1); + return 1; } /* PHY functions for a generic PHY */ @@ -331,6 +340,14 @@ static int gen_auto_negotiate(int phy_addr) if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp)) return(0); +#ifdef DAVINCI_EMAC_GIG_ENABLE + davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val); + val |= PHY_1000BTCR_1000FD; + val &= ~PHY_1000BTCR_1000HD; + davinci_eth_phy_write(phy_addr, MII_CTRL1000, val); + davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val); +#endif + /* Restart Auto_negotiation */ tmp |= BMCR_ANRESTART; davinci_eth_phy_write(phy_addr, MII_BMCR, tmp); @@ -359,14 +376,19 @@ static int gen_auto_negotiate(int phy_addr) #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) -static int davinci_mii_phy_read(const char *devname, unsigned char addr, unsigned char reg, unsigned short *value) +static int davinci_mii_phy_read(struct mii_dev *bus, int addr, int devad, + int reg) { - return(davinci_eth_phy_read(addr, reg, value) ? 0 : 1); + unsigned short value = 0; + int retval = davinci_eth_phy_read(addr, reg, &value); + + return retval ? value : -EIO; } -static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsigned char reg, unsigned short value) +static int davinci_mii_phy_write(struct mii_dev *bus, int addr, int devad, + int reg, u16 value) { - return(davinci_eth_phy_write(addr, reg, value) ? 0 : 1); + return davinci_eth_phy_write(addr, reg, value) ? 0 : 1; } #endif @@ -392,7 +414,8 @@ static void __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr) static int davinci_eth_open(struct eth_device *dev, bd_t *bis) { dv_reg_p addr; - u_int32_t clkdiv, cnt; + u_int32_t clkdiv, cnt, mac_control; + uint16_t __maybe_unused lpa_val; volatile emac_desc *rx_desc; int index; @@ -428,11 +451,11 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) /* Set DMA 8 TX / 8 RX Head pointers to 0 */ addr = &adap_emac->TX0HDP; - for(cnt = 0; cnt < 16; cnt++) + for (cnt = 0; cnt < 8; cnt++) writel(0, addr++); addr = &adap_emac->RX0HDP; - for(cnt = 0; cnt < 16; cnt++) + for (cnt = 0; cnt < 8; cnt++) writel(0, addr++); /* Clear Statistics (do this before setting MacControl register) */ @@ -447,8 +470,8 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) /* Create RX queue and set receive process in place */ emac_rx_active_head = emac_rx_desc; for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) { - rx_desc->next = (u_int32_t)(rx_desc + 1); - rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)]; + rx_desc->next = BD_TO_HW((u_int32_t)(rx_desc + 1)); + rx_desc->buffer = &emac_rx_buffers[cnt * EMAC_RXBUF_SIZE]; rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE; rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT; rx_desc++; @@ -473,18 +496,6 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) /* Enable ch 0 only */ writel(1, &adap_emac->RXUNICASTSET); - /* Enable MII interface and Full duplex mode */ -#ifdef CONFIG_SOC_DA8XX - writel((EMAC_MACCONTROL_MIIEN_ENABLE | - EMAC_MACCONTROL_FULLDUPLEX_ENABLE | - EMAC_MACCONTROL_RMIISPEED_100), - &adap_emac->MACCONTROL); -#else - writel((EMAC_MACCONTROL_MIIEN_ENABLE | - EMAC_MACCONTROL_FULLDUPLEX_ENABLE), - &adap_emac->MACCONTROL); -#endif - /* Init MDIO & get link state */ clkdiv = CONFIG_SYS_EMAC_TI_CLKDIV; writel((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT, @@ -497,10 +508,28 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis) if (index == -1) return(0); - emac_gigabit_enable(active_phy_addr[index]); + /* Enable MII interface */ + mac_control = EMAC_MACCONTROL_MIIEN_ENABLE; +#ifdef DAVINCI_EMAC_GIG_ENABLE + davinci_eth_phy_read(active_phy_addr[index], MII_STAT1000, &lpa_val); + if (lpa_val & PHY_1000BTSR_1000FD) { + debug_emac("eth_open : gigabit negotiated\n"); + mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE; + mac_control |= EMAC_MACCONTROL_GIGABIT_ENABLE; + } +#endif + davinci_eth_phy_read(active_phy_addr[index], MII_LPA, &lpa_val); + if (lpa_val & (LPA_100FULL | LPA_10FULL)) + /* set EMAC for Full Duplex */ + mac_control |= EMAC_MACCONTROL_FULLDUPLEX_ENABLE; +#if defined(CONFIG_SOC_DA8XX) || \ + (defined(CONFIG_OMAP34XX) && defined(CONFIG_DRIVER_TI_EMAC_USE_RMII)) + mac_control |= EMAC_MACCONTROL_RMIISPEED_100; +#endif + writel(mac_control, &adap_emac->MACCONTROL); /* Start receive process */ - writel((u_int32_t)emac_rx_desc, &adap_emac->RX0HDP); + writel(BD_TO_HW((u_int32_t)emac_rx_desc), &adap_emac->RX0HDP); debug_emac("- emac_open\n"); @@ -564,7 +593,8 @@ static void davinci_eth_close(struct eth_device *dev) debug_emac("+ emac_close\n"); davinci_eth_ch_teardown(EMAC_CH_TX); /* TX Channel teardown */ - davinci_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */ + if (readl(&adap_emac->RXCONTROL) & 1) + davinci_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */ /* Reset EMAC module and disable interrupts in wrapper */ writel(1, &adap_emac->SOFTRESET); @@ -590,7 +620,7 @@ static int tx_send_loop = 0; * positive number (number of bytes transmitted) or negative for error */ static int davinci_eth_send_packet (struct eth_device *dev, - volatile void *packet, int length) + void *packet, int length) { int ret_status = -1; int index; @@ -602,8 +632,6 @@ static int davinci_eth_send_packet (struct eth_device *dev, return (ret_status); } - emac_gigabit_enable(active_phy_addr[index]); - /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */ if (length < EMAC_MIN_ETHERNET_PKT_SIZE) { length = EMAC_MIN_ETHERNET_PKT_SIZE; @@ -617,8 +645,12 @@ static int davinci_eth_send_packet (struct eth_device *dev, EMAC_CPPI_SOP_BIT | EMAC_CPPI_OWNERSHIP_BIT | EMAC_CPPI_EOP_BIT); + + flush_dcache_range((unsigned long)packet, + (unsigned long)packet + ALIGN(length, PKTALIGN)); + /* Send the packet */ - writel((unsigned long)emac_tx_desc, &adap_emac->TX0HDP); + writel(BD_TO_HW((unsigned long)emac_tx_desc), &adap_emac->TX0HDP); /* Wait for packet to complete or link down */ while (1) { @@ -627,8 +659,6 @@ static int davinci_eth_send_packet (struct eth_device *dev, return (ret_status); } - emac_gigabit_enable(active_phy_addr[index]); - if (readl(&adap_emac->TXINTSTATRAW) & 0x01) { ret_status = length; break; @@ -650,26 +680,32 @@ static int davinci_eth_rcv_packet (struct eth_device *dev) int status, ret = -1; rx_curr_desc = emac_rx_active_head; + if (!rx_curr_desc) + return 0; status = rx_curr_desc->pkt_flag_len; - if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) { + if ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0) { if (status & EMAC_CPPI_RX_ERROR_FRAME) { /* Error in packet - discard it and requeue desc */ printf ("WARN: emac_rcv_pkt: Error in packet\n"); } else { - NetReceive (rx_curr_desc->buffer, - (rx_curr_desc->buff_off_len & 0xffff)); - ret = rx_curr_desc->buff_off_len & 0xffff; + unsigned long tmp = (unsigned long)rx_curr_desc->buffer; + unsigned short len = + rx_curr_desc->buff_off_len & 0xffff; + + invalidate_dcache_range(tmp, tmp + ALIGN(len, PKTALIGN)); + net_process_received_packet(rx_curr_desc->buffer, len); + ret = len; } /* Ack received packet descriptor */ - writel((unsigned long)rx_curr_desc, &adap_emac->RX0CP); + writel(BD_TO_HW((ulong)rx_curr_desc), &adap_emac->RX0CP); curr_desc = rx_curr_desc; emac_rx_active_head = - (volatile emac_desc *) rx_curr_desc->next; + (volatile emac_desc *) (HW_TO_BD(rx_curr_desc->next)); if (status & EMAC_CPPI_EOQ_BIT) { if (emac_rx_active_head) { - writel((unsigned long)emac_rx_active_head, + writel(BD_TO_HW((ulong)emac_rx_active_head), &adap_emac->RX0HDP); } else { emac_rx_queue_active = 0; @@ -687,7 +723,7 @@ static int davinci_eth_rcv_packet (struct eth_device *dev) emac_rx_active_head = curr_desc; emac_rx_active_tail = curr_desc; if (emac_rx_queue_active != 0) { - writel((unsigned long)emac_rx_active_head, + writel(BD_TO_HW((ulong)emac_rx_active_head), &adap_emac->RX0HDP); printf ("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n"); emac_rx_queue_active = 1; @@ -695,10 +731,10 @@ static int davinci_eth_rcv_packet (struct eth_device *dev) } else { tail_desc = emac_rx_active_tail; emac_rx_active_tail = curr_desc; - tail_desc->next = (unsigned int) curr_desc; + tail_desc->next = BD_TO_HW((ulong) curr_desc); status = tail_desc->pkt_flag_len; if (status & EMAC_CPPI_EOQ_BIT) { - writel((unsigned long)curr_desc, + writel(BD_TO_HW((ulong)curr_desc), &adap_emac->RX0HDP); status &= ~EMAC_CPPI_EOQ_BIT; tail_desc->pkt_flag_len = status; @@ -728,7 +764,7 @@ int davinci_emac_initialize(void) return -1; memset(dev, 0, sizeof *dev); - sprintf(dev->name, "DaVinci-EMAC"); + strcpy(dev->name, "DaVinci-EMAC"); dev->iobase = 0; dev->init = davinci_eth_open; @@ -781,6 +817,7 @@ int davinci_emac_initialize(void) phy_id |= tmp & 0x0000ffff; switch (phy_id) { +#ifdef PHY_KSZ8873 case PHY_KSZ8873: sprintf(phy[i].name, "KSZ8873 @ 0x%02x", active_phy_addr[i]); @@ -789,6 +826,8 @@ int davinci_emac_initialize(void) phy[i].get_link_speed = ksz8873_get_link_speed; phy[i].auto_negotiate = ksz8873_auto_negotiate; break; +#endif +#ifdef PHY_LXT972 case PHY_LXT972: sprintf(phy[i].name, "LXT972 @ 0x%02x", active_phy_addr[i]); @@ -797,6 +836,8 @@ int davinci_emac_initialize(void) phy[i].get_link_speed = lxt972_get_link_speed; phy[i].auto_negotiate = lxt972_auto_negotiate; break; +#endif +#ifdef PHY_DP83848 case PHY_DP83848: sprintf(phy[i].name, "DP83848 @ 0x%02x", active_phy_addr[i]); @@ -805,6 +846,8 @@ int davinci_emac_initialize(void) phy[i].get_link_speed = dp83848_get_link_speed; phy[i].auto_negotiate = dp83848_auto_negotiate; break; +#endif +#ifdef PHY_ET1011C case PHY_ET1011C: sprintf(phy[i].name, "ET1011C @ 0x%02x", active_phy_addr[i]); @@ -813,6 +856,7 @@ int davinci_emac_initialize(void) phy[i].get_link_speed = et1011c_get_link_speed; phy[i].auto_negotiate = gen_auto_negotiate; break; +#endif default: sprintf(phy[i].name, "GENERIC @ 0x%02x", active_phy_addr[i]); @@ -824,8 +868,34 @@ int davinci_emac_initialize(void) debug("Ethernet PHY: %s\n", phy[i].name); - miiphy_register(phy[i].name, davinci_mii_phy_read, - davinci_mii_phy_write); + int retval; + struct mii_dev *mdiodev = mdio_alloc(); + if (!mdiodev) + return -ENOMEM; + strncpy(mdiodev->name, phy[i].name, MDIO_NAME_LEN); + mdiodev->read = davinci_mii_phy_read; + mdiodev->write = davinci_mii_phy_write; + + retval = mdio_register(mdiodev); + if (retval < 0) + return retval; +#ifdef DAVINCI_EMAC_GIG_ENABLE +#define PHY_CONF_REG 22 + /* Enable PHY to clock out TX_CLK */ + davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp); + tmp |= PHY_CONF_TXCLKEN; + davinci_eth_phy_write(active_phy_addr[i], PHY_CONF_REG, tmp); + davinci_eth_phy_read(active_phy_addr[i], PHY_CONF_REG, &tmp); +#endif + } + +#if defined(CONFIG_TI816X) || (defined(CONFIG_DRIVER_TI_EMAC_USE_RMII) && \ + defined(CONFIG_MACH_DAVINCI_DA850_EVM) && \ + !defined(CONFIG_DRIVER_TI_EMAC_RMII_NO_NEGOTIATE)) + for (i = 0; i < num_phy; i++) { + if (phy[i].is_phy_connected(i)) + phy[i].auto_negotiate(i); } +#endif return(1); }