X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=drivers%2Fnet%2Fxilinx_emaclite.c;h=2a5cc445530f9f58fc29abd03858d60f1bd6cb57;hb=e89d623f099c44b0b166ccf46bce2e6a0b99c984;hp=987af39bc9290d27651255ca0183361daf856b08;hpb=8b485ba12b0defa0c4ed3559789250238f8331a8;p=u-boot diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 987af39bc9..2a5cc44553 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -4,7 +4,7 @@ * * Michal SIMEK * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ */ #include @@ -14,8 +14,6 @@ #include #include -DECLARE_GLOBAL_DATA_PTR; - #undef DEBUG #define ENET_ADDR_LENGTH 6 @@ -364,24 +362,27 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, } #ifdef CONFIG_OF_CONTROL -int xilinx_emaclite_init(bd_t *bis) +int xilinx_emaclite_of_init(const void *blob) { int offset = 0; u32 ret = 0; u32 reg; do { - offset = fdt_node_offset_by_compatible(gd->fdt_blob, offset, + offset = fdt_node_offset_by_compatible(blob, offset, "xlnx,xps-ethernetlite-1.00.a"); if (offset != -1) { - reg = fdtdec_get_addr(gd->fdt_blob, offset, "reg"); + reg = fdtdec_get_addr(blob, offset, "reg"); if (reg != FDT_ADDR_T_NONE) { - u32 rxpp = fdtdec_get_int(gd->fdt_blob, offset, + u32 rxpp = fdtdec_get_int(blob, offset, "xlnx,rx-ping-pong", 0); - u32 txpp = fdtdec_get_int(gd->fdt_blob, offset, + u32 txpp = fdtdec_get_int(blob, offset, "xlnx,tx-ping-pong", 0); - ret |= xilinx_emaclite_initialize(bis, reg, + ret |= xilinx_emaclite_initialize(NULL, reg, txpp, rxpp); + } else { + debug("EMACLITE: Can't get base address\n"); + return -1; } } } while (offset != -1);