X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fahci.h;h=c4fb9e79a55f41bb4406a98bcca0510268f7ea4f;hb=b83cf848f0a0c5e353ebb8909624b5f5b6605ee1;hp=b363ee1969fa822bbad4c6536558d94c0854f285;hpb=42fd5f87b1613d3039f57e93c16f760a768d3e84;p=u-boot

diff --git a/include/ahci.h b/include/ahci.h
index b363ee1969..c4fb9e79a5 100644
--- a/include/ahci.h
+++ b/include/ahci.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+ * Copyright (C) Freescale Semiconductor, Inc. 2006.
  * Author: Jason Jin<Jason.jin@freescale.com>
  *         Zhang Wei<wei.zhang@freescale.com>
  *
@@ -25,15 +25,18 @@
 #ifndef _AHCI_H_
 #define _AHCI_H_
 
+#include <pci.h>
+
 #define AHCI_PCI_BAR		0x24
 #define AHCI_MAX_SG		56 /* hardware max is 64K */
 #define AHCI_CMD_SLOT_SZ	32
+#define AHCI_MAX_CMD_SLOT	32
 #define AHCI_RX_FIS_SZ		256
 #define AHCI_CMD_TBL_HDR	0x80
 #define AHCI_CMD_TBL_CDB	0x40
 #define AHCI_CMD_TBL_SZ		AHCI_CMD_TBL_HDR + (AHCI_MAX_SG * 16)
-#define AHCI_PORT_PRIV_DMA_SZ	AHCI_CMD_SLOT_SZ + AHCI_CMD_TBL_SZ	\
-				+ AHCI_RX_FIS_SZ
+#define AHCI_PORT_PRIV_DMA_SZ	(AHCI_CMD_SLOT_SZ * AHCI_MAX_CMD_SLOT + \
+				AHCI_CMD_TBL_SZ	+ AHCI_RX_FIS_SZ)
 #define AHCI_CMD_ATAPI		(1 << 5)
 #define AHCI_CMD_WRITE		(1 << 6)
 #define AHCI_CMD_PREFETCH	(1 << 7)
@@ -187,4 +190,6 @@ struct ahci_probe_ent {
 	u32	link_port_map; /*linkup port map*/
 };
 
+int ahci_init(u32 base);
+
 #endif