X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FMPC8349EMDS.h;h=331f4c93a20354f53fc61d1bbec67b9f0b8e2b1d;hb=10bbb38a402a2faf18858c451bcdc63d45888e6e;hp=1567fcfae32cfca9a1248d38d38fe95ee139611f;hpb=3b3bff4cbf2cb14f9a3e7d03f26ebab900efe4ae;p=u-boot

diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 1567fcfae3..331f4c93a2 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -29,8 +29,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#undef DEBUG
-
 /*
  * High Level Configuration Options
  */
@@ -339,16 +337,9 @@
 #endif
 
 /* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE	1
+#define CONFIG_OF_LIBFDT	1
 #define CONFIG_OF_BOARD_SETUP	1
-
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE	8192
-
-#define OF_CPU			"PowerPC,8349@0"
-#define OF_SOC			"soc8349@e0000000"
-#define OF_TBCLK		(bd->bi_busfreq / 4)
-#define OF_STDOUT_PATH		"/soc8349@e0000000/serial@4500"
+#define CONFIG_OF_STDOUT_VIA_ALIAS	1
 
 /* I2C */
 #define CONFIG_HARD_I2C			/* I2C with hardware support*/
@@ -362,6 +353,16 @@
 #define CFG_I2C_OFFSET		0x3000
 #define CFG_I2C2_OFFSET		0x3100
 
+/* SPI */
+#define CONFIG_MPC8XXX_SPI
+#define CONFIG_HARD_SPI			/* SPI with hardware support */
+#undef CONFIG_SOFT_SPI			/* SPI bit-banged */
+
+/* GPIOs.  Used as SPI chip selects */
+#define CFG_GPIO1_PRELIM
+#define CFG_GPIO1_DIR		0xC0000000  /* SPI CS on 0, LED on 1 */
+#define CFG_GPIO1_DAT		0xC0000000  /* Both are active LOW */
+
 /* TSEC */
 #define CFG_TSEC1_OFFSET 0x24000
 #define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET)
@@ -440,6 +441,8 @@
 #define TSEC2_PHY_ADDR		1
 #define TSEC1_PHYIDX		0
 #define TSEC2_PHYIDX		0
+#define TSEC1_FLAGS		TSEC_GIGABIT
+#define TSEC2_FLAGS		TSEC_GIGABIT
 
 /* Options are: TSEC[0-1] */
 #define CONFIG_ETHPRIME		"TSEC0"
@@ -457,7 +460,7 @@
  */
 #ifndef CFG_RAMBOOT
 	#define CFG_ENV_IS_IN_FLASH	1
-	#define CFG_ENV_ADDR		(CFG_MONITOR_BASE + 0x40000)
+	#define CFG_ENV_ADDR		(CFG_MONITOR_BASE + CFG_MONITOR_LEN)
 	#define CFG_ENV_SECT_SIZE	0x20000	/* 128K(one sector) for env */
 	#define CFG_ENV_SIZE		0x2000
 
@@ -532,13 +535,6 @@
  */
 #define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux*/
 
-/* Cache Configuration */
-#define CFG_DCACHE_SIZE		32768
-#define CFG_CACHELINE_SIZE	32
-#if defined(CONFIG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT	5	/*log base 2 of the above value*/
-#endif
-
 #define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST  */
 
 #if 1 /*528/264*/
@@ -699,6 +695,7 @@
 #if defined(CONFIG_TSEC_ENET)
 #define CONFIG_ETHADDR		00:04:9f:ef:23:33
 #define CONFIG_HAS_ETH1
+#define CONFIG_HAS_ETH0
 #define CONFIG_ETH1ADDR		00:E0:0C:00:7E:21
 #endif