X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FMPC8641HPCN.h;h=246ac7f316fb4e2ad13e3ebbaeb2eeb53b1650ee;hb=8d7e2732221bc2d64df14f700c64c23e0a4c3dce;hp=4453171d45ae2ed2abaac69c6b3a67ba9d9f551f;hpb=fa7db9c377bc2353a17bf1d381d65a6c418728f0;p=u-boot diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 4453171d45..246ac7f316 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -85,7 +85,6 @@ #define CFG_MEMTEST_START 0x00200000 /* memtest region */ #define CFG_MEMTEST_END 0x00400000 - /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) @@ -94,12 +93,12 @@ #define CFG_CCSRBAR 0xf8000000 /* relocated CCSRBAR */ #define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */ - /* * DDR Setup */ #define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE +#define CONFIG_VERY_BIG_RAM #define MPC86xx_DDR_SDRAM_CLK_CNTL @@ -145,6 +144,8 @@ #define CFG_DDR_CS5_BNDS 0x00000FFF /* Not done */ #endif +#define CFG_ID_EEPROM 1 +#define ID_EEPROM_ADDR 0x57 /* * In MPC8641HPCN, allocate 16MB flash spaces at fe000000 and ff000000. @@ -265,7 +266,7 @@ #define OF_CPU "PowerPC,8641@0" #define OF_SOC "soc8641@f8000000" -#define OF_TBCLK (bd->bi_busfreq / 8) +#define OF_TBCLK (bd->bi_busfreq / 4) #define OF_STDOUT_PATH "/soc8641@f8000000/serial@4500" #define CFG_64BIT_VSPRINTF 1 @@ -274,11 +275,13 @@ /* * I2C */ -#define CONFIG_HARD_I2C /* I2C with hardware support*/ +#define CONFIG_FSL_I2C /* Use FSL common I2C driver */ +#define CONFIG_HARD_I2C /* I2C with hardware support*/ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */ #define CFG_I2C_SLAVE 0x7F #define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */ +#define CFG_I2C_OFFSET 0x3100 /* * RapidIO MMU @@ -304,6 +307,7 @@ #define CFG_PCI_MEMORY_SIZE 0x80000000 /* For RTL8139 */ +#define KSEG1ADDR(x) ({u32 _x=le32_to_cpu(*(u32 *)(x)); (&_x);}) #define _IO_BASE 0x00000000 #define CFG_PCI2_MEM_BASE 0xa0000000 @@ -313,7 +317,6 @@ #define CFG_PCI2_IO_PHYS CFG_PCI2_IO_BASE #define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */ - #if defined(CONFIG_PCI) #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ @@ -336,8 +339,18 @@ #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -#endif /* CONFIG_PCI */ +#define CONFIG_DOS_PARTITION +#define CONFIG_SCSI_AHCI +#ifdef CONFIG_SCSI_AHCI +#define CONFIG_SATA_ULI5288 +#define CFG_SCSI_MAX_SCSI_ID 4 +#define CFG_SCSI_MAX_LUN 1 +#define CFG_SCSI_MAX_DEVICE (CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN) +#define CFG_SCSI_MAXDEVICE CFG_SCSI_MAX_DEVICE +#endif + +#endif /* CONFIG_PCI */ #if defined(CONFIG_TSEC_ENET) @@ -369,15 +382,13 @@ #endif /* CONFIG_TSEC_ENET */ - /* * BAT0 2G Cacheable, non-guarded * 0x0000_0000 2G DDR */ -#define CFG_DBAT0L ( BATL_PP_RW | BATL_CACHEINHIBIT \ - | BATL_GUARDEDSTORAGE | BATL_MEMCOHERENCE ) -#define CFG_DBAT0U ( BATU_BL_2G | BATU_VS | BATU_VP ) -#define CFG_IBAT0L ( BATL_PP_RW | BATL_CACHEINHIBIT | BATL_MEMCOHERENCE) +#define CFG_DBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE) +#define CFG_DBAT0U (BATU_BL_2G | BATU_VS | BATU_VP) +#define CFG_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE ) #define CFG_IBAT0U CFG_DBAT0U /* @@ -448,9 +459,6 @@ #define CFG_IBAT7L 0x00000000 #define CFG_IBAT7U 0x00000000 - - - /* * Environment */ @@ -474,7 +482,9 @@ #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ | CFG_CMD_PING \ | CFG_CMD_PCI \ - | CFG_CMD_I2C) \ + | CFG_CMD_I2C \ + | CFG_CMD_SCSI \ + | CFG_CMD_EXT2) \ & \ ~(CFG_CMD_ENV \ | CFG_CMD_IMLS \ @@ -483,7 +493,9 @@ #else #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \ | CFG_CMD_PING \ - | CFG_CMD_I2C) \ + | CFG_CMD_I2C \ + | CFG_CMD_SCSI \ + | CGF_CMD_EXT2) \ & \ ~(CFG_CMD_ENV \ | CFG_CMD_IMLS \ @@ -495,7 +507,9 @@ #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PCI \ | CFG_CMD_PING \ - | CFG_CMD_I2C) + | CFG_CMD_I2C \ + | CFG_CMD_SCSI \ + | CFG_CMD_EXT2) #else #define CONFIG_COMMANDS (CONFIG_CMD_DFL \ | CFG_CMD_PING \ @@ -552,7 +566,6 @@ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif - /* * Environment Configuration */ @@ -590,13 +603,10 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "netdev=eth0\0" \ "consoledev=ttyS0\0" \ - "ramdiskaddr=400000\0" \ + "ramdiskaddr=2000000\0" \ "ramdiskfile=your.ramdisk.u-boot\0" \ - "pex0=echo ---------------------------; echo --------- PCI EXPRESS -----\0"\ - "pexstat=mw f8008000 84000004; echo -expect:- 16000000; md f8008004 1\0" \ - "pex1=pci write 1.0.0 4 146; pci write 1.0.0 10 80000000\0" \ - "pexd=echo -expect:- xxx01002 00100146; pci display 1.0.0 0 2\0" \ - "pex=run pexstat; run pex1; run pexd\0" \ + "dtbaddr=400000\0" \ + "dtbfile=mpc8641_hpcn.dtb\0" \ "en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1\0" \ "dis-wd=mw.b f8100010 0x00; echo -expect:- 00; md.b f8100010 1\0" \ "maxcpus=2" @@ -608,14 +618,16 @@ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $loadaddr $bootfile;" \ - "bootm $loadaddr" + "tftp $dtbaddr $dtbfile;" \ + "bootm $loadaddr - $dtbaddr" #define CONFIG_RAMBOOTCOMMAND \ "setenv bootargs root=/dev/ram rw " \ "console=$consoledev,$baudrate $othbootargs;" \ "tftp $ramdiskaddr $ramdiskfile;" \ "tftp $loadaddr $bootfile;" \ - "bootm $loadaddr $ramdiskaddr" + "tftp $dtbaddr $dtbfile;" \ + "bootm $loadaddr $ramdiskaddr $dtbaddr" #define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND