X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FMPC86xADS.h;h=beada7ee2a4ed704f1bcb85946fff684c85de642;hb=12d7a474204a667a7f94e3904e5d4062e3115894;hp=a6e26067142df1b65d0dbd9faf88dea7bcc40d17;hpb=180d3f74e4738ee107e269cbb949481075dd789a;p=u-boot

diff --git a/include/configs/MPC86xADS.h b/include/configs/MPC86xADS.h
index a6e2606714..beada7ee2a 100644
--- a/include/configs/MPC86xADS.h
+++ b/include/configs/MPC86xADS.h
@@ -21,31 +21,31 @@
 #define CONFIG_MPC86xADS        1       /* new ADS */
 #define CONFIG_FADS		1       /* We are FADS compatible (more or less) */
 
-/* New MPC86xADS - pick one of these */
-#define CONFIG_MPC866T 		1
+/* CPU type - pick one of these */
+#define CONFIG_MPC866T		1
 #undef CONFIG_MPC866P
 #undef CONFIG_MPC859T
 #undef CONFIG_MPC859DSL
 #undef CONFIG_MPC852T
 
+#define	CONFIG_SYS_TEXT_BASE	0xFE000000
+
 #define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
 #undef	CONFIG_8xx_CONS_SMC2
 #undef	CONFIG_8xx_CONS_NONE
 #define CONFIG_BAUDRATE		38400
 
-# define CFG_8XX_FACT		5		/* Multiply by 5	*/
-# define CFG_8XX_XIN		10000000	/* 10 MHz in	*/
+#define CONFIG_8xx_OSCLK		10000000 /* 10MHz oscillator on EXTCLK  */
+#define CONFIG_8xx_CPUCLK_DEFAULT	50000000
+#define CONFIG_SYS_8xx_CPUCLK_MIN		40000000
+#define CONFIG_SYS_8xx_CPUCLK_MAX		80000000
 
 #define CONFIG_DRAM_50MHZ       1
 #define CONFIG_SDRAM_50MHZ      1
 
-/*-----------------------------------------------------------------------
- * PLPRCR - PLL, Low-Power, and Reset Control Register		14-22
- *-----------------------------------------------------------------------
- * set the PLL, the low-power modes and the reset control
- */
-#define CFG_PLPRCR ((CFG_8XX_FACT << PLPRCR_MFI_SHIFT) | PLPRCR_TEXPS)
+#include "../../board/fads/fads.h"
 
-#include "fads.h"
+#define CONFIG_SYS_OR5_PRELIM		0xFFFF8110	/* 64Kbyte address space */
+#define CONFIG_SYS_BR5_PRELIM		(CONFIG_SYS_PHYDEV_ADDR | BR_PS_8 | BR_V)
 
 #endif	/* __CONFIG_H */