X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2FP1022DS.h;h=5d572b45a3ecec63aa751e0df98a6b7ee59fa027;hb=148f00e7a7f6bf28cf38c61a25056e1f2c465166;hp=ba43ccec60f9228d5be0fc5060a59166115b6570;hpb=215ab45a67672a7c1ceb347f7b74c94323415222;p=u-boot

diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index ba43ccec60..5d572b45a3 100644
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -11,12 +11,9 @@
 
 #include "../board/freescale/common/ics307_clk.h"
 
-#ifdef CONFIG_36BIT
-#define CONFIG_PHYS_64BIT
-#endif
+#define CONFIG_DISPLAY_BOARDINFO
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
@@ -30,12 +27,12 @@
 #define CONFIG_FSL_LAW			/* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE		0x11001000
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
-#define CONFIG_SPL_PAD_TO		0x18000
-#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
-#define CONFIG_SYS_MMC_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SPL_PAD_TO		0x20000
+#define CONFIG_SPL_MAX_SIZE		(128 * 1024)
+#define CONFIG_SYS_MMC_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_MMC_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_MMC_U_BOOT_OFFS	(128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_LDSCRIPT		"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_MMC_BOOT
@@ -45,7 +42,6 @@
 #endif
 
 #ifdef CONFIG_SPIFLASH
-#define CONFIG_SPL
 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
 #define CONFIG_SPL_ENV_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
@@ -60,12 +56,12 @@
 #define CONFIG_FSL_LAW		/* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE		0x11001000
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
-#define CONFIG_SPL_PAD_TO		0x18000
-#define CONFIG_SPL_MAX_SIZE		(96 * 1024)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(512 << 10)
+#define CONFIG_SPL_PAD_TO		0x20000
+#define CONFIG_SPL_MAX_SIZE		(128 * 1024)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST		(0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(96 << 10)
+#define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS	(128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_LDSCRIPT	"arch/powerpc/cpu/mpc85xx/u-boot.lds"
 #define CONFIG_SPL_SPI_BOOT
@@ -75,10 +71,10 @@
 #endif
 
 #define CONFIG_NAND_FSL_ELBC
+#define CONFIG_SYS_NAND_MAX_ECCPOS	56
+#define CONFIG_SYS_NAND_MAX_OOBFREE	5
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL
-#define CONFIG_TPL
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_NAND_BOOT
 #define CONFIG_SPL_FLUSH_IMAGE
@@ -94,7 +90,7 @@
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
 #define CONFIG_SPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
@@ -120,13 +116,12 @@
 /* High Level Configuration Options */
 #define CONFIG_BOOKE			/* BOOKE */
 #define CONFIG_E500			/* BOOKE e500 family */
-#define CONFIG_MPC85xx			/* MPC8540/60/55/41/48 */
 #define CONFIG_P1022
 #define CONFIG_P1022DS
 #define CONFIG_MP			/* support multiple processors */
 
 #ifndef CONFIG_SYS_TEXT_BASE
-#define CONFIG_SYS_TEXT_BASE	0xeff80000
+#define CONFIG_SYS_TEXT_BASE	0xeff40000
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
@@ -135,9 +130,9 @@
 
 #define CONFIG_FSL_ELBC			/* Has Enhanced localbus controller */
 #define CONFIG_PCI			/* Enable PCI/PCIE */
-#define CONFIG_PCIE1			/* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2			/* PCIE controler 2 (slot 2) */
-#define CONFIG_PCIE3			/* PCIE controler 3 (ULI bridge) */
+#define CONFIG_PCIE1			/* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2			/* PCIE controller 2 (slot 2) */
+#define CONFIG_PCIE3			/* PCIE controller 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT		/* Use common FSL init code */
 #define CONFIG_FSL_PCIE_RESET		/* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
@@ -173,7 +168,6 @@
 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 #endif
 
-
 /* DDR Setup */
 #define CONFIG_DDR_SPD
 #define CONFIG_VERY_BIG_RAM
@@ -218,7 +212,6 @@
 #define	CONFIG_SYS_DDR_ZQ_CONTROL	0x89080600
 #define CONFIG_SYS_DDR_WRLVL_CONTROL	0x8675f608
 
-
 /*
  * Memory map
  *
@@ -290,7 +283,6 @@
 
 #define CONFIG_SYS_NAND_BASE_LIST	{CONFIG_SYS_NAND_BASE}
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_MTD_NAND_VERIFY_WRITE
 #define CONFIG_CMD_NAND			1
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(256 * 1024)
 #define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE
@@ -351,7 +343,7 @@
 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET
 
-#define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
+#define CONFIG_SYS_MONITOR_LEN		(768 * 1024)
 #define CONFIG_SYS_MALLOC_LEN		(10 * 1024 * 1024)
 
 /*
@@ -364,10 +356,10 @@
 #define CONFIG_SYS_L2_SIZE		(256 << 10)
 #define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE)
 #define CONFIG_SPL_RELOC_TEXT_BASE	0xf8f81000
-#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 128 * 1024)
+#define CONFIG_SPL_RELOC_STACK		(CONFIG_SYS_INIT_L2_ADDR + 116 * 1024)
 #define CONFIG_SPL_RELOC_STACK_SIZE	(32 << 10)
-#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 160 * 1024)
-#define CONFIG_SPL_RELOC_MALLOC_SIZE	(96 << 10)
+#define CONFIG_SPL_RELOC_MALLOC_ADDR	(CONFIG_SYS_INIT_L2_ADDR + 148 * 1024)
+#define CONFIG_SPL_RELOC_MALLOC_SIZE	(108 << 10)
 #define CONFIG_SPL_GD_ADDR		(CONFIG_SYS_INIT_L2_ADDR + 112 * 1024)
 #elif defined(CONFIG_NAND)
 #ifdef CONFIG_TPL_BUILD
@@ -395,7 +387,6 @@
  * Serial Port
  */
 #define CONFIG_CONS_INDEX		1
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
@@ -409,9 +400,6 @@
 #define CONFIG_SYS_NS16550_COM1	(CONFIG_SYS_CCSRBAR+0x4500)
 #define CONFIG_SYS_NS16550_COM2	(CONFIG_SYS_CCSRBAR+0x4600)
 
-/* Use the HUSH parser */
-#define CONFIG_SYS_HUSH_PARSER
-
 /* Video */
 
 #ifdef CONFIG_FSL_DIU_FB
@@ -446,17 +434,6 @@
 #define CONFIG_VGA_AS_SINGLE_DEVICE
 #endif
 
-/*
- * Pass open firmware flat tree
- */
-#define CONFIG_OF_LIBFDT
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
-/* new uImage format support */
-#define CONFIG_FIT
-#define CONFIG_FIT_VERBOSE
-
 /* I2C */
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_FSL
@@ -480,13 +457,9 @@
 /*
  * eSPI - Enhanced SPI
  */
-#define CONFIG_SPI_FLASH
-#define CONFIG_SPI_FLASH_SPANSION
 
 #define CONFIG_HARD_SPI
-#define CONFIG_FSL_ESPI
 
-#define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED		10000000
 #define CONFIG_SF_DEFAULT_MODE		0
 
@@ -556,7 +529,6 @@
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCI_PNP			/* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
-#define CONFIG_E1000			/* Define e1000 pci Ethernet card */
 #endif
 
 /* SATA */
@@ -576,20 +548,16 @@
 #define CONFIG_LBA48
 #define CONFIG_CMD_SATA
 #define CONFIG_DOS_PARTITION
-#define CONFIG_CMD_EXT2
 #endif
 
 #define CONFIG_MMC
 #ifdef CONFIG_MMC
-#define CONFIG_CMD_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_GENERIC_MMC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #endif
 
 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI)
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
 #define CONFIG_DOS_PARTITION
 #endif
 
@@ -618,6 +586,25 @@
 #define CONFIG_PHY_GIGE		/* Include GbE speed/duplex detection */
 #endif
 
+/*
+ * Dynamic MTD Partition support with mtdparts
+ */
+#define CONFIG_MTD_DEVICE
+#define CONFIG_MTD_PARTITIONS
+#define CONFIG_CMD_MTDPARTS
+#define CONFIG_FLASH_CFI_MTD
+#ifdef CONFIG_PHYS_64BIT
+#define MTDIDS_DEFAULT "nor0=fe8000000.nor"
+#define MTDPARTS_DEFAULT "mtdparts=fe8000000.nor:48m(ramdisk)," \
+			"14m(diagnostic),2m(dink),6m(kernel),58112k(fs)," \
+			"512k(dtb),768k(u-boot)"
+#else
+#define MTDIDS_DEFAULT "nor0=e8000000.nor"
+#define MTDPARTS_DEFAULT "mtdparts=e8000000.nor:48m(ramdisk)," \
+			"14m(diagnostic),2m(dink),6m(kernel),58112k(fs)," \
+			"512k(dtb),768k(u-boot)"
+#endif
+
 /*
  * Environment
  */
@@ -651,11 +638,7 @@
 #define CONFIG_ENV_SIZE		0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
-#if CONFIG_SYS_MONITOR_BASE > 0xfff80000
-#define CONFIG_ENV_ADDR	0xfff80000
-#else
 #define CONFIG_ENV_ADDR	(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
-#endif
 #define CONFIG_ENV_SIZE		0x2000
 #define CONFIG_ENV_SECT_SIZE	0x20000 /* 128K (one sector) */
 #endif
@@ -666,20 +649,12 @@
 /*
  * Command line configuration.
  */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_ELF
 #define CONFIG_CMD_ERRATA
 #define CONFIG_CMD_IRQ
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_SETEXPR
 #define CONFIG_CMD_REGINFO
 
 #ifdef CONFIG_PCI
 #define CONFIG_CMD_PCI
-#define CONFIG_CMD_NET
 #endif
 
 /*
@@ -690,11 +665,9 @@
 #define CONFIG_USB_EHCI
 
 #ifdef CONFIG_USB_EHCI
-#define CONFIG_CMD_USB
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_EHCI_FSL
 #define CONFIG_USB_STORAGE
-#define CONFIG_CMD_FAT
 #endif
 #endif
 
@@ -738,7 +711,6 @@
 
 #define CONFIG_LOADADDR		1000000
 
-#define CONFIG_BOOTDELAY	10	/* -1 disables auto-boot */
 
 #define CONFIG_BAUDRATE	115200
 
@@ -755,7 +727,7 @@
 	"consoledev=ttyS0\0"					\
 	"ramdiskaddr=2000000\0"					\
 	"ramdiskfile=rootfs.ext2.gz.uboot\0"			\
-	"fdtaddr=c00000\0"	  			      	\
+	"fdtaddr=1e00000\0"	  			      	\
 	"fdtfile=p1022ds.dtb\0"	  				\
 	"bdev=sda3\0"		  			      	\
 	"hwconfig=esdhc;audclk:12\0"