X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fat91sam9n12ek.h;h=e23549d44431cf3793879aa70e37ff714046a7c5;hb=d14c6335bcae5fd1909f6280dcfa064bb62c30f0;hp=cc79f8b06abb01c1dd5320b6dd01a721f311de5c;hpb=d9bef0ad2daa2f6f0b635be12518da755ddcbdc1;p=u-boot

diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h
index cc79f8b06a..e23549d444 100644
--- a/include/configs/at91sam9n12ek.h
+++ b/include/configs/at91sam9n12ek.h
@@ -24,7 +24,6 @@
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768		/* slow clock xtal */
 #define CONFIG_SYS_AT91_MAIN_CLOCK	16000000	/* main clock xtal */
-#define CONFIG_SYS_HZ			1000
 
 /* Misc CPU related */
 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
@@ -114,8 +113,8 @@
 #define CONFIG_SYS_NAND_BASE		0x40000000
 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIO_PORTD, 4
-#define CONFIG_SYS_NAND_READY_PIN	AT91_PIO_PORTD, 5
+#define CONFIG_SYS_NAND_ENABLE_PIN	GPIO_PIN_PD(4)
+#define CONFIG_SYS_NAND_READY_PIN	GPIO_PIN_PD(5)
 
 /* PMECC & PMERRLOC */
 #define CONFIG_ATMEL_NAND_HWECC
@@ -167,6 +166,7 @@
 /* USB host */
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_ATMEL
+#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
 #define CONFIG_USB_OHCI_NEW
 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 #define CONFIG_SYS_USB_OHCI_REGS_BASE	ATMEL_BASE_OHCI