X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fkm%2Fkm_arm.h;h=e74f85f604527bb535db7eab206fb7887dd740e0;hb=7f673c99c2d8d1aa21996c5b914f06d784b080ca;hp=aa9f1ae464ef363a487caf1f41bb60fd56e65476;hpb=2d9528e32fa0a05d2b170a23fb445f83d4d26571;p=u-boot

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index aa9f1ae464..e74f85f604 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -9,23 +9,7 @@
  * (C) Copyright 2010-2011
  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
- * MA 02110-1301 USA
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 /*
@@ -36,21 +20,46 @@
 #ifndef _CONFIG_KM_ARM_H
 #define _CONFIG_KM_ARM_H
 
+/* We got removed from Linux mach-types.h */
+#define MACH_TYPE_KM_KIRKWOOD          2255
+
 /*
  * High Level Configuration Options (easy to change)
  */
 #define CONFIG_MARVELL
-#define CONFIG_ARM926EJS		/* Basic Architecture */
 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
 #define CONFIG_KIRKWOOD			/* SOC Family Name */
 #define CONFIG_KW88F6281		/* SOC Name */
 #define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */
 
+#define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD
+
+#define CONFIG_NAND_ECC_BCH
+#define CONFIG_BCH
+
 /* include common defines/options for all Keymile boards */
 #include "keymile-common.h"
 
-#define CONFIG_SYS_TEXT_BASE	0x04000000	/* code address after reloc */
-#define CONFIG_ENV_SIZE		(128 << 10)	/* NAND chip block size	*/
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_SF
+
+/* SPI NOR Flash default params, used by sf commands */
+#define CONFIG_SF_DEFAULT_SPEED		8100000
+#define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
+
+#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
+#define CONFIG_ENV_SPI_BUS		0
+#define CONFIG_ENV_SPI_CS		0
+#define CONFIG_ENV_SPI_MAX_HZ		8100000
+#define CONFIG_ENV_SPI_MODE		SPI_MODE_3
+#endif
+
+/* Reserve 4 MB for malloc */
+#define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
+
+#include "asm/arch/config.h"
+
+#define CONFIG_SYS_TEXT_BASE	0x07d00000	/* code address before reloc */
 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
@@ -63,21 +72,19 @@
 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
 
+/* architecture specific default bootargs */
+#define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
+		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
+		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
+
 #define CONFIG_KM_DEF_ENV_CPU						\
-	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"		\
-	"boot=bootm ${actual_kernel_addr} - -\0"			\
+	"boot=bootm ${load_addr_r} - -\0"				\
 	"cramfsloadfdt=true\0"						\
-	CONFIG_KM_DEF_ENV_UPDATE					\
+	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"		\
+	CONFIG_KM_UPDATE_UBOOT						\
 	""
 
-#define CONFIG_KM_ARCH_DBG_FILE		"scripts/debug-arm-env.txt"
-
-#define CONFIG_MD5	/* get_random_hex on krikwood needs MD5 support */
 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
-#define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
-#undef  CONFIG_KIRKWOOD_PCIE_INIT	/* Disable PCIE Port0 for kernel */
-#define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
-
 #define CONFIG_MISC_INIT_R
 
 /*
@@ -88,6 +95,7 @@
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
+#define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
 
 /*
  * Serial Port configuration
@@ -112,7 +120,6 @@
  */
 #define CONFIG_CMD_ELF
 #define CONFIG_CMD_MTDPARTS
-#define CONFIG_CMD_NAND
 #define CONFIG_CMD_NFS
 
 /*
@@ -126,13 +133,15 @@
  * NAND Flash configuration
  */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define NAND_MAX_CHIPS			1
-#define CONFIG_NAND_KIRKWOOD
-#define CONFIG_SYS_NAND_BASE		0xd8000000
 
 #define BOOTFLASH_START		0x0
 
+/* Kirkwood has two serial IF */
+#if (CONFIG_CONS_INDEX == 2)
+#define CONFIG_KM_CONSOLE_TTY	"ttyS1"
+#else
 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
+#endif
 
 /*
  * Other required minimal configurations
@@ -142,21 +151,20 @@
 #define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
 #define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
 #define CONFIG_NR_DRAM_BANKS	4
-#define CONFIG_STACKSIZE	0x00100000	/* regular stack- 1M */
 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
 
 /*
  * Ethernet Driver configuration
  */
 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
-#define CONFIG_NET_MULTI	/* specify more that one ports available */
 #define CONFIG_MII		/* expose smi ove miiphy interface */
+#define CONFIG_CMD_MII		/* to debug mdio phy config */
 #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
 #define CONFIG_PHY_BASE_ADR	0
 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
-#define CONFIG_RESET_PHY_R	/* use reset_phy() to init 88E1118 PHY */
+#define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
 
 /*
  * UBI related stuff
@@ -166,10 +174,22 @@
 /*
  * I2C related stuff
  */
-#define	CONFIG_SOFT_I2C		/* I2C bit-banged	*/
+#undef CONFIG_I2C_MVTWSI
+#define CONFIG_SYS_I2C
+#define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
+#define CONFIG_SYS_I2C_INIT_BOARD
 
 #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
-#if defined(CONFIG_SOFT_I2C)
+#define CONFIG_SYS_NUM_I2C_BUSES	6
+#define CONFIG_SYS_I2C_MAX_HOPS		1
+#define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
+					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
+					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
+					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
+					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
+					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
+				}
+
 #ifndef __ASSEMBLY__
 #include <asm/arch-kirkwood/gpio.h>
 extern void __set_direction(unsigned pin, int high);
@@ -179,6 +199,7 @@ int get_sda(void);
 int get_scl(void);
 #define KM_KIRKWOOD_SDA_PIN	8
 #define KM_KIRKWOOD_SCL_PIN	9
+#define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
 #define KM_KIRKWOOD_ENV_WP	38
 
 #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
@@ -188,12 +209,17 @@ int get_scl(void);
 #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
 #endif
 
-#define I2C_DELAY	udelay(3)	/* 1/4 I2C clock duration */
+#define I2C_DELAY	udelay(1)
 #define I2C_SOFT_DECLARATIONS
 
-#define	CONFIG_SYS_I2C_SLAVE		0x0
-#define	CONFIG_SYS_I2C_SPEED		100000
-#endif
+#define	CONFIG_SYS_I2C_SOFT_SLAVE	0x0
+#define	CONFIG_SYS_I2C_SOFT_SPEED	100000
+
+/* EEprom support 24C128, 24C256 valid for environment eeprom */
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
+#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
 
 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
@@ -201,54 +227,84 @@ int get_scl(void);
 /*
  *  Environment variables configurations
  */
+#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
+#define CONFIG_ENV_IS_IN_SPI_FLASH  /* use SPI-Flash for environment vars */
+#define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
+#define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
+#define CONFIG_ENV_SECT_SIZE		0x10000
+#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
+					CONFIG_ENV_SECT_SIZE)
+#define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
+#else
 #define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
 #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
 #define CONFIG_ENV_EEPROM_IS_ON_I2C
 #define CONFIG_SYS_EEPROM_WREN
 #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
-#undef	CONFIG_ENV_SIZE
 #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
-#define CONFIG_I2C_ENV_EEPROM_BUS	"pca9547:70:d\0"
-
-/* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
-#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
+#define CONFIG_I2C_ENV_EEPROM_BUS	KM_ENV_BUS
 #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
+#endif
 
-#define CONFIG_CMD_SF
+#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 
 #define CONFIG_SPI_FLASH
-#define CONFIG_HARD_SPI
-#define CONFIG_KIRKWOOD_SPI
 #define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_ENV_SPI_BUS		0
-#define CONFIG_ENV_SPI_CS		0
-#define CONFIG_ENV_SPI_MAX_HZ		50000000	/* 50Mhz */
+
+/* SPI bus claim MPP configuration */
+#define CONFIG_SYS_KW_SPI_MPP	0x0
 
 #define FLASH_GPIO_PIN			0x00010000
+#define KM_FLASH_GPIO_PIN	16
+
+#ifndef MTDIDS_DEFAULT
+# define MTDIDS_DEFAULT		"nand0=orion_nand"
+#endif /* MTDIDS_DEFAULT */
 
-#define MTDIDS_DEFAULT		"nand0=orion_nand"
-/* test-only: partitioning needs some tuning, this is just for tests */
-#define MTDPARTS_DEFAULT	"mtdparts="				\
-	"orion_nand:"							\
-		"-(" CONFIG_KM_UBI_PARTITION_NAME ")"
+#ifndef MTDPARTS_DEFAULT
+# define MTDPARTS_DEFAULT	"mtdparts="			\
+	"orion_nand:"						\
+		"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
+#endif /* MTDPARTS_DEFAULT */
 
-#define	CONFIG_KM_DEF_ENV_UPDATE					\
+#define	CONFIG_KM_UPDATE_UBOOT						\
 	"update="							\
-		"spi on;sf probe 0;sf erase 0 50000;"			\
-		"sf write ${u-boot_addr_r} 0 ${filesize};"		\
-		"spi off\0"
+		"sf probe 0;sf erase 0 +${filesize};"			\
+		"sf write ${load_addr_r} 0 ${filesize};\0"
+
+#if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
+#define CONFIG_KM_NEW_ENV						\
+	"newenv=sf probe 0;"						\
+		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
+		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
+#else
+#define CONFIG_KM_NEW_ENV						\
+	"newenv=setenv addr 0x100000 && "				\
+		"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; "  \
+		"mw.b ${addr} 0 4 && "					\
+		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
+		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
+		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
+		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
+#endif
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS					\
+	CONFIG_KM_DEF_ENV						\
+	CONFIG_KM_NEW_ENV						\
+	"arch=arm\0"							\
+	""
 
 #if defined(CONFIG_SYS_NO_FLASH)
-#define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
 #undef	CONFIG_FLASH_CFI_MTD
 #undef	CONFIG_JFFS2_CMDLINE
 #endif
 
 /* additions for new relocation code, must be added to all boards */
 #define CONFIG_SYS_SDRAM_BASE		0x00000000
-/* Kirkwood has 2k of Security SRAM, use it for SP */
-#define CONFIG_SYS_INIT_SP_ADDR		0xC8012000
 /* Do early setups now in board_init_f() */
 #define CONFIG_BOARD_EARLY_INIT_F
 
@@ -259,5 +315,16 @@ int get_scl(void);
 #define CONFIG_KM_RESERVED_PRAM 0x801000
 /* address for the bootcount (taken from end of RAM) */
 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
+/* Use generic bootcount RAM driver */
+#define CONFIG_BOOTCOUNT_RAM
+
+/* enable POST tests */
+#define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
+#define CONFIG_POST_SKIP_ENV_FLAGS
+#define CONFIG_POST_EXTERNAL_WORD_FUNCS
+#define CONFIG_CMD_DIAG
+
+/* we do the whole PCIe FPGA config stuff here */
+#define	CONFIG_BOARD_LATE_INIT
 
 #endif /* _CONFIG_KM_ARM_H */