X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Flubbock.h;h=ad1035b6d63173dda5c1ab3553c9715fb798278d;hb=d9f2f5008c32c8373d68a4c8e14f50a469965a23;hp=609ce339ae186150333772c27bf4a00166311c9a;hpb=71f9511803de65a3b98d2f592d418da1d1539f13;p=u-boot diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h index 609ce339ae..ad1035b6d6 100644 --- a/include/configs/lubbock.h +++ b/include/configs/lubbock.h @@ -30,12 +30,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * If we are developing, we might want to start armboot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#define CONFIG_INIT_CRITICAL /* undef for developing */ - /* * High Level Configuration Options * (easy to change) @@ -43,8 +37,11 @@ #define CONFIG_PXA250 1 /* This is an PXA250 CPU */ #define CONFIG_LUBBOCK 1 /* on an LUBBOCK Board */ #define CONFIG_LCD 1 +#ifdef CONFIG_LCD +#define CONFIG_SHARP_LM8V31 +#endif #define CONFIG_MMC 1 -#define BOARD_POST_INIT 1 +#define BOARD_LATE_INIT 1 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ @@ -52,6 +49,7 @@ * Size of malloc() pool */ #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers @@ -79,9 +77,10 @@ #define CONFIG_NETMASK 255.255.0.0 #define CONFIG_IPADDR 192.168.0.21 #define CONFIG_SERVERIP 192.168.0.250 -#define CONFIG_BOOTCOMMAND "bootm 40000" +#define CONFIG_BOOTCOMMAND "bootm 80000" #define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200" #define CONFIG_CMDLINE_TAG +#define CONFIG_TIMESTAMP #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ @@ -111,7 +110,7 @@ #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ -#define CFG_LOAD_ADDR 0xa8000000 /* default load address */ +#define CFG_LOAD_ADDR (CFG_DRAM_BASE + 0x8000) /* default load address */ #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ #define CFG_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */ @@ -213,10 +212,14 @@ #define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */ #define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */ -/* FIXME */ +/* NOTE: many default partitioning schemes assume the kernel starts at the + * second sector, not an environment. You have been warned! + */ +#define CFG_MONITOR_LEN PHYS_FLASH_SECT_SIZE #define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */ -#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ +#define CFG_ENV_ADDR (PHYS_FLASH_1 + PHYS_FLASH_SECT_SIZE) +#define CFG_ENV_SECT_SIZE PHYS_FLASH_SECT_SIZE +#define CFG_ENV_SIZE (PHYS_FLASH_SECT_SIZE / 16) /*