X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fm28evk.h;h=1b51fe2dc51cf9b3d1d23612b35315dd470cb365;hb=9a82b10c6657c5744802971036bb564ebc660291;hp=f12d927e0389034c7339902efcded0140eb0a0f9;hpb=50cd93b25033764dcda9bb47aa68be778f94d36e;p=u-boot

diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h
index f12d927e03..1b51fe2dc5 100644
--- a/include/configs/m28evk.h
+++ b/include/configs/m28evk.h
@@ -20,8 +20,6 @@
 #ifndef __M28EVK_CONFIG_H__
 #define __M28EVK_CONFIG_H__
 
-#include <asm/arch/regs-base.h>
-
 /*
  * SoC configurations
  */
@@ -36,9 +34,9 @@
 
 #define	CONFIG_MACH_TYPE	MACH_TYPE_M28EVK
 
+#include <asm/arch/regs-base.h>
+
 #define	CONFIG_SYS_NO_FLASH
-#define	CONFIG_SYS_ICACHE_OFF
-#define	CONFIG_SYS_DCACHE_OFF
 #define	CONFIG_BOARD_EARLY_INIT_F
 #define	CONFIG_ARCH_MISC_INIT
 
@@ -47,8 +45,8 @@
  */
 #define	CONFIG_SPL
 #define	CONFIG_SPL_NO_CPU_SUPPORT_CODE
-#define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mx28"
-#define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mx28/u-boot-spl.lds"
+#define	CONFIG_SPL_START_S_PATH		"arch/arm/cpu/arm926ejs/mxs"
+#define	CONFIG_SPL_LDSCRIPT	"arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
 #define	CONFIG_SPL_LIBCOMMON_SUPPORT
 #define	CONFIG_SPL_LIBGENERIC_SUPPORT
 #define	CONFIG_SPL_GPIO_SUPPORT
@@ -85,7 +83,6 @@
 #define	CONFIG_NR_DRAM_BANKS		1		/* 1 bank of DRAM */
 #define	PHYS_SDRAM_1			0x40000000	/* Base address */
 #define	PHYS_SDRAM_1_SIZE		0x20000000	/* Max 512 MB RAM */
-#define	CONFIG_STACKSIZE		(128 * 1024)	/* 128 KB stack */
 #define	CONFIG_SYS_MALLOC_LEN		0x00400000	/* 4 MB for malloc */
 #define	CONFIG_SYS_GBL_DATA_SIZE	128		/* Initial data */
 #define	CONFIG_SYS_MEMTEST_START	0x40000000	/* Memtest start adr */
@@ -138,7 +135,7 @@
  */
 #ifdef	CONFIG_CMD_MMC
 #define	CONFIG_MMC
-#define	CONFIG_MMC_BOUNCE_BUFFER
+#define	CONFIG_BOUNCE_BUFFER
 #define	CONFIG_GENERIC_MMC
 #define	CONFIG_MXS_MMC
 #endif
@@ -174,13 +171,15 @@
 #define	CONFIG_LZO
 #define	CONFIG_MTD_DEVICE
 #define	CONFIG_MTD_PARTITIONS
-#define	MTDIDS_DEFAULT			"nand0=gpmi-nand.0"
+#define	MTDIDS_DEFAULT			"nand0=gpmi-nand"
 #define	MTDPARTS_DEFAULT			\
-	"mtdparts=gpmi-nand.0:"			\
+	"mtdparts=gpmi-nand:"			\
 		"3m(bootloader)ro,"		\
 		"512k(environment),"		\
 		"512k(redundant-environment),"	\
 		"4m(kernel),"			\
+		"128k(fdt),"			\
+		"8m(ramdisk),"			\
 		"-(filesystem)"
 #else
 #define	CONFIG_ENV_IS_NOWHERE
@@ -192,9 +191,7 @@
 #ifdef	CONFIG_CMD_NET
 #define	CONFIG_ETHPRIME			"FEC0"
 #define	CONFIG_FEC_MXC
-#define	CONFIG_FEC_MXC_MULTI
 #define	CONFIG_MII
-#define	CONFIG_DISCOVER_PHY
 #define	CONFIG_FEC_XCV_TYPE		RMII
 #endif
 
@@ -247,21 +244,24 @@
 #ifdef	CONFIG_CMD_SPI
 #define	CONFIG_HARD_SPI
 #define	CONFIG_MXS_SPI
+#define	CONFIG_MXS_SPI_DMA_ENABLE
 #define	CONFIG_SPI_HALF_DUPLEX
 #define	CONFIG_DEFAULT_SPI_BUS		2
+#define	CONFIG_DEFAULT_SPI_CS		0
 #define	CONFIG_DEFAULT_SPI_MODE		SPI_MODE_0
 
 /* SPI FLASH */
 #ifdef	CONFIG_CMD_SF
 #define	CONFIG_SPI_FLASH
 #define	CONFIG_SPI_FLASH_STMICRO
-#define	CONFIG_SF_DEFAULT_CS		2
+#define	CONFIG_SF_DEFAULT_BUS		2
+#define	CONFIG_SF_DEFAULT_CS		0
+#define	CONFIG_SF_DEFAULT_SPEED		40000000
 #define	CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
-#define	CONFIG_SF_DEFAULT_SPEED		24000000
 
-#define	CONFIG_ENV_SPI_CS		0
 #define	CONFIG_ENV_SPI_BUS		2
-#define	CONFIG_ENV_SPI_MAX_HZ		24000000
+#define	CONFIG_ENV_SPI_CS		0
+#define	CONFIG_ENV_SPI_MAX_HZ		40000000
 #define	CONFIG_ENV_SPI_MODE		SPI_MODE_0
 #endif
 #endif
@@ -273,7 +273,7 @@
 #define	CONFIG_SETUP_MEMORY_TAGS
 #define	CONFIG_BOOTDELAY	3
 #define	CONFIG_BOOTFILE		"uImage"
-#define	CONFIG_BOOTARGS		"console=ttyAM0,115200n8 "
+#define	CONFIG_BOOTARGS		"console=ttyAMA0,115200n8 "
 #define	CONFIG_BOOTCOMMAND	"run bootcmd_net"
 #define	CONFIG_LOADADDR		0x42000000
 #define	CONFIG_SYS_LOAD_ADDR	CONFIG_LOADADDR
@@ -298,7 +298,7 @@
 		"if tftp ${update_nand_full_filename} ; then "		\
 		"run update_nand_get_fcb_size ; "			\
 		"nand scrub -y 0x0 ${filesize} ; "			\
-		"nand write.raw ${loadaddr} 0x0 ${update_nand_fcb} ; "	\
+		"nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; "	\
 		"setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
 		"setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
 		"nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \