X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fneo.h;h=d549985886c915bc91fb6dc848927cee57c6a592;hb=9b97b727dcfbdc02a0a78e4c1d81670742f28784;hp=5abb8b1a7521d822ecd87513f13ce29fc78af40b;hpb=8b485ba12b0defa0c4ed3559789250238f8331a8;p=u-boot

diff --git a/include/configs/neo.h b/include/configs/neo.h
index 5abb8b1a75..d549985886 100644
--- a/include/configs/neo.h
+++ b/include/configs/neo.h
@@ -2,7 +2,7 @@
  * (C) Copyright 2007-2008
  * Dirk Eibach,  Guntermann & Drunck GmbH, eibach@gdsys.de
  *
- * SPDX-License-Identifier:	GPL-2.0+ 
+ * SPDX-License-Identifier:	GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -10,7 +10,6 @@
 
 
 #define CONFIG_405EP		1	/* this is a PPC405 CPU */
-#define CONFIG_4xx		1	/*  member of PPC4xx family */
 #define CONFIG_NEO	        1	/*  on a Neo board */
 
 #define	CONFIG_SYS_TEXT_BASE	0xFFFC0000
@@ -19,7 +18,7 @@
  * Include common defines/options for all AMCC eval boards
  */
 #define CONFIG_HOSTNAME		neo
-#define CONFIG_IDENT_STRING	" neo 0.01"
+#define CONFIG_IDENT_STRING	" neo 0.02"
 #include "amcc-common.h"
 
 #define CONFIG_BOARD_EARLY_INIT_F
@@ -130,7 +129,6 @@
 #define CONFIG_SYS_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
 
 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1	/* use buffered writes (20x faster)	*/
-#define CONFIG_SYS_FLASH_PROTECTION	1	/* use hardware flash protection	*/
 
 #define CONFIG_SYS_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */
 #define CONFIG_SYS_FLASH_QUIET_TEST	1	/* don't warn upon unknown flash	*/
@@ -222,6 +220,11 @@
 
 #define CONFIG_SYS_FPGA_COUNT		1
 
+#define CONFIG_SYS_FPGA_PTR \
+	{ (struct ihs_fpga *)CONFIG_SYS_FPGA0_BASE }
+
+#define CONFIG_SYS_FPGA_COMMON
+
 /* Memory Bank 3 (Latches) initialization                      */
 #define CONFIG_SYS_LATCH_BASE		0x7f200000
 #define CONFIG_SYS_EBC_PB3AP		0x92015480