X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fomap1610h2.h;h=0bbb5b35c155c162851572860a0b49a5f99017e4;hb=c5fb70c9114bd0a8289444d3d5c7e360eda08232;hp=7d232ca3c3c3a61ca9aee281a2be7da371c26f10;hpb=028ab6b598b628326116acd88e0f35aa9f526d12;p=u-boot diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h index 7d232ca3c3..0bbb5b35c1 100644 --- a/include/configs/omap1610h2.h +++ b/include/configs/omap1610h2.h @@ -26,12 +26,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * If we are developing, we might want to start armboot from ram - * so we MUST NOT initialize critical regs like mem-timing ... - */ -#define CONFIG_INIT_CRITICAL /* undef for developing */ - /* * High Level Configuration Options * (easy to change) @@ -40,6 +34,7 @@ #define CONFIG_OMAP 1 /* in a TI OMAP core */ #define CONFIG_OMAP1610 1 /* which is in a 1610 */ #define CONFIG_H2_OMAP1610 1 /* on an H2 Board */ +#define CONFIG_MACH_OMAP_H2 /* Select board mach-type */ /* input clock of PLL */ /* the OMAP1610 H2 has 12MHz input clock */ @@ -51,28 +46,30 @@ #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 /* * Size of malloc() pool */ -#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) -#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ /* * Hardware drivers */ -#define CONFIG_DRIVER_LAN91C96 +#define CONFIG_NET_MULTI +#define CONFIG_LAN91C96 #define CONFIG_LAN91C96_BASE 0x04000300 #define CONFIG_LAN91C96_EXT_PHY /* * NS16550 Configuration */ -#define CFG_NS16550 -#define CFG_NS16550_SERIAL -#define CFG_NS16550_REG_SIZE (-4) -#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ -#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */ +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ +#define CONFIG_SYS_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */ /* * select serial console configuration @@ -83,25 +80,34 @@ #define CONFIG_ENV_OVERWRITE #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + + +/* + * Command line configuration. + */ +#include + +#define CONFIG_CMD_DHCP + + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_SUBNETMASK +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME +#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP) -#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT -/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ -#include #include #define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \ - root=/dev/nfs rw nfsroot=157.87.82.48:\ - /home/a0875451/mwd/myfs/target ip=dhcp" -#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */ -#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */ -#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */ -#define CONFIG_BOOTFILE "uImage" /* file to load */ - -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CONFIG_BOOTARGS "console=ttyS0,115200n8 noinitrd root=/dev/nfs ip=dhcp" +#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm" +#define CONFIG_SYS_AUTOLOAD "n" /* No autoload */ + +#if defined(CONFIG_CMD_KGDB) #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ #endif @@ -109,27 +115,25 @@ /* * Miscellaneous configurable options */ -#define CFG_LONGHELP /* undef to save memory */ -#define CFG_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */ -#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ /* Print Buffer Size */ -#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) -#define CFG_MAXARGS 16 /* max number of command args */ -#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ - -#define CFG_MEMTEST_START 0x10000000 /* memtest works on */ -#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ -#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ +#define CONFIG_SYS_MEMTEST_START 0x10000000 /* memtest works on */ +#define CONFIG_SYS_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ -#define CFG_LOAD_ADDR 0x10000000 /* default load address */ +#define CONFIG_SYS_LOAD_ADDR 0x10000000 /* default load address */ /* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by * DPLL1. This time is further subdivided by a local divisor. */ -#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */ -#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */ -#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT)) +#define CONFIG_SYS_TIMERBASE 0xFFFEC500 /* use timer 1 */ +#define CONFIG_SYS_PTV 7 /* 2^(PTV+1), divide by 256 */ +#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) /*----------------------------------------------------------------------- * Stack sizes @@ -145,34 +149,45 @@ /*----------------------------------------------------------------------- * Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#ifdef CONFIG_CS0_BOOT -#define PHYS_FLASH_1 0x0C000000 -#endif -#ifdef CONFIG_CS3_BOOT -#define PHYS_FLASH_1 0x00000000 +#define PHYS_FLASH_1_BM1 0x00000000 /* Flash Bank #1 if booting from flash */ +#define PHYS_FLASH_1_BM0 0x0C000000 /* Flash Bank #1 if booting from RAM */ + +#ifdef CONFIG_CS_AUTOBOOT /* Determine CS assignment in runtime */ + +#ifndef __ASSEMBLY__ +extern unsigned long omap_flash_base; /* set in flash__init */ #endif +#define CONFIG_SYS_FLASH_BASE omap_flash_base -#define CFG_FLASH_BASE PHYS_FLASH_1 +#elif defined(CONFIG_CS0_BOOT) + +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM0 + +#else + +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1_BM1 + +#endif /*----------------------------------------------------------------------- * FLASH and environment organization */ -#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ #define PHYS_FLASH_SIZE 0x02000000 /* 32MB */ -#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ +#define CONFIG_SYS_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ /* addr of environment */ -#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x020000) /* timeout values are in ticks */ -#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ -#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ +#define CONFIG_SYS_FLASH_ERASE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ +#define CONFIG_SYS_FLASH_WRITE_TOUT (20*CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CFG_ENV_IS_IN_FLASH 1 -#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ -#define CFG_ENV_OFFSET 0x20000 /* environment starts here */ +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CONFIG_ENV_OFFSET 0x20000 /* environment starts here */ #endif /* __CONFIG_H */