X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fconfigs%2Fpalmld.h;h=3f9802ca0f52eb9613bbc52ab1ab41a3bef423a8;hb=abbab70363dcdb270cbf24d47849214dd3a3e010;hp=926728b15f4ac6771be1eb9d4b539d74ac55b9f6;hpb=6ef6eb91cda895de3366068fc2caf25328786f4d;p=u-boot diff --git a/include/configs/palmld.h b/include/configs/palmld.h index 926728b15f..3f9802ca0f 100644 --- a/include/configs/palmld.h +++ b/include/configs/palmld.h @@ -25,15 +25,18 @@ /* * High Level Board Configuration Options */ -#define CONFIG_PXA27X 1 /* Marvell PXA270 CPU */ +#define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */ #define CONFIG_PALMLD 1 /* Palm LifeDrive board */ +/* we will never enable dcache, because we have to setup MMU first */ +#define CONFIG_SYS_DCACHE_OFF + /* * Environment settings */ #define CONFIG_ENV_OVERWRITE #define CONFIG_SYS_MALLOC_LEN (128*1024) -#define CONFIG_SYS_GBL_DATA_SIZE 128 +#define CONFIG_SYS_TEXT_BASE 0x0 #define CONFIG_BOOTCOMMAND \ "if mmcinfo && fatload mmc 0 0xa0000000 uboot.script ; then " \ @@ -54,8 +57,8 @@ */ #define CONFIG_PXA_SERIAL #define CONFIG_FFUART 1 +#define CONFIG_CONS_INDEX 3 #define CONFIG_BAUDRATE 9600 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* * Bootloader Components Configuration @@ -63,6 +66,7 @@ #include #undef CONFIG_CMD_NET +#undef CONFIG_CMD_NFS #define CONFIG_CMD_ENV #undef CONFIG_CMD_IMLS #define CONFIG_CMD_MMC @@ -108,7 +112,6 @@ * HUSH Shell Configuration */ #define CONFIG_SYS_HUSH_PARSER 1 -#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_LONGHELP #ifdef CONFIG_SYS_HUSH_PARSER @@ -130,15 +133,6 @@ #define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */ #define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */ -/* - * Stack sizes - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - /* * DRAM Map */ @@ -155,7 +149,7 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_GBL_DATA_SIZE + PHYS_SDRAM_1) +#define CONFIG_SYS_INIT_SP_ADDR (GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) /* * NOR FLASH