X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Ffsl_ddr_sdram.h;h=3699c0408a11aeeee2354b471e5a63174f12d924;hb=6758a6ccc120dbdc0d1c05d38a5e00fcfdc59fd7;hp=4b022d46391a50f8eb1b56d0f6c849231ccec5c6;hpb=e6e3faa5c2da591cd3e0f2047a74cfc832e7b738;p=u-boot

diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h
index 4b022d4639..3699c0408a 100644
--- a/include/fsl_ddr_sdram.h
+++ b/include/fsl_ddr_sdram.h
@@ -1,9 +1,7 @@
 /*
  * Copyright 2008-2014 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * SPDX-License-Identifier:	GPL-2.0
  */
 
 #ifndef FSL_DDR_MEMCTL_H
@@ -131,6 +129,7 @@ typedef struct ddr4_spd_eeprom_s generic_spd_eeprom_t;
 #define SDRAM_CFG2_ODT_ONLY_READ	2
 #define SDRAM_CFG2_ODT_ALWAYS		3
 
+#define SDRAM_INTERVAL_BSTOPRE	0x3FFF
 #define TIMING_CFG_2_CPO_MASK	0x0F800000
 
 #if defined(CONFIG_SYS_FSL_DDR_VER) && \