X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fspartan2.h;h=8959f90f0edd1c6120b6c0faf38d07a6d9645509;hb=6a372e940d1d1cd1999f646bc2cc8bc3884fa4eb;hp=9725d4b3e7e17e7dc202707c21f5dd0cb1bd6b96;hpb=8bde7f776c77b343aca29b8c7b58464d915ac245;p=u-boot diff --git a/include/spartan2.h b/include/spartan2.h index 9725d4b3e7..8959f90f0e 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -30,7 +30,6 @@ extern int Spartan2_load( Xilinx_desc *desc, void *image, size_t size ); extern int Spartan2_dump( Xilinx_desc *desc, void *buf, size_t bsize ); extern int Spartan2_info( Xilinx_desc *desc ); -extern int Spartan2_reloc( Xilinx_desc *desc, ulong reloc_off ); /* Slave Parallel Implementation function table */ typedef struct { @@ -47,7 +46,6 @@ typedef struct { Xilinx_busy_fn busy; Xilinx_abort_fn abort; Xilinx_post_fn post; - int relocated; } Xilinx_Spartan2_Slave_Parallel_fns; /* Slave Serial Implementation function table */ @@ -58,17 +56,25 @@ typedef struct { Xilinx_init_fn init; Xilinx_done_fn done; Xilinx_wr_fn wr; - int relocated; + Xilinx_post_fn post; } Xilinx_Spartan2_Slave_Serial_fns; /* Device Image Sizes *********************************************************************/ /* Spartan-II (2.5V) */ -#define XILINX_XC2S15_SIZE 197728/8 -#define XILINX_XC2S30_SIZE 336800/8 -#define XILINX_XC2S50_SIZE 559232/8 -#define XILINX_XC2S100_SIZE 781248/8 -#define XILINX_XC2S150_SIZE 1040128/8 +#define XILINX_XC2S15_SIZE 197728/8 +#define XILINX_XC2S30_SIZE 336800/8 +#define XILINX_XC2S50_SIZE 559232/8 +#define XILINX_XC2S100_SIZE 781248/8 +#define XILINX_XC2S150_SIZE 1040128/8 +#define XILINX_XC2S200_SIZE 1335872/8 + +/* Spartan-IIE (1.8V) */ +#define XILINX_XC2S50E_SIZE 630048/8 +#define XILINX_XC2S100E_SIZE 863840/8 +#define XILINX_XC2S150E_SIZE 1134496/8 +#define XILINX_XC2S200E_SIZE 1442016/8 +#define XILINX_XC2S300E_SIZE 1875648/8 /* Descriptor Macros *********************************************************************/ @@ -88,4 +94,22 @@ typedef struct { #define XILINX_XC2S150_DESC(iface, fn_table, cookie) \ { Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } +#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \ +{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie } + +#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \ +{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie } + +#define XILINX_XC2S100E_DESC(iface, fn_table, cookie) \ +{ Xilinx_Spartan2, iface, XILINX_XC2S100E_SIZE, fn_table, cookie } + +#define XILINX_XC2S150E_DESC(iface, fn_table, cookie) \ +{ Xilinx_Spartan2, iface, XILINX_XC2S150E_SIZE, fn_table, cookie } + +#define XILINX_XC2S200E_DESC(iface, fn_table, cookie) \ +{ Xilinx_Spartan2, iface, XILINX_XC2S200E_SIZE, fn_table, cookie } + +#define XILINX_XC2S300E_DESC(iface, fn_table, cookie) \ +{ Xilinx_Spartan2, iface, XILINX_XC2S300E_SIZE, fn_table, cookie } + #endif /* _SPARTAN2_H_ */