X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=include%2Fspi_flash.h;h=3b2d555c77babb1f3b73dc96c464e9c40a509eda;hb=cf7ee6c4e37ea4bc56df4b2e543874ec68b33bc7;hp=218283fc987cc6380f86695a1f17cbb7679f0421;hpb=1733259d25015c28c47990ec11af99b3f62f811c;p=u-boot diff --git a/include/spi_flash.h b/include/spi_flash.h index 218283fc98..3b2d555c77 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -37,13 +37,15 @@ struct spi_slave; * struct spi_flash - SPI flash structure * * @spi: SPI slave + * @dev: SPI flash device + * @flags: Indication of spi flash flags * @name: Name of SPI flash - * @dual_flash: Indicates dual flash memories - dual stacked, parallel + * @dual_flash: Indicates dual flash memories - dual stacked, parallel * @shift: Flash shift useful in dual parallel * @size: Total flash size * @page_size: Write (page) size * @sector_size: Sector size - * @erase_size: Erase size + * @erase_size: Erase size * @bank_read_cmd: Bank read cmd * @bank_write_cmd: Bank write cmd * @bank_curr: Current flash bank @@ -51,8 +53,8 @@ struct spi_slave; * @erase_cmd: Erase cmd 4K, 32K, 64K * @read_cmd: Read cmd - Array Fast, Extn read and quad read. * @write_cmd: Write cmd - page and quad program. - * @dummy_byte: Dummy cycles for read operation. - * @memory_map: Address of read-only SPI flash access + * @dummy_byte: Dummy cycles for read operation. + * @memory_map: Address of read-only SPI flash access * @read: Flash read ops: Read len bytes at offset into buf * Supported cmds: Fast Array Read * @write: Flash write ops: Write len bytes from buf into offset @@ -62,11 +64,10 @@ struct spi_slave; * return 0 - Success, 1 - Failure */ struct spi_flash { -#ifdef CONFIG_DM_SPI_FLASH struct spi_slave *spi; +#ifdef CONFIG_DM_SPI_FLASH struct udevice *dev; -#else - struct spi_slave *spi; + u16 flags; #endif const char *name; u8 dual_flash; @@ -91,13 +92,13 @@ struct spi_flash { #ifndef CONFIG_DM_SPI_FLASH /* * These are not strictly needed for driver model, but keep them here - * whilt the transition is in progress. + * while the transition is in progress. * * Normally each driver would provide its own operations, but for * SPI flash most chips use the same algorithms. One approach is * to create a 'common' SPI flash device which knows how to talk * to most devices, and then allow other drivers to be used instead - * if requird, perhaps with a way of scanning through the list to + * if required, perhaps with a way of scanning through the list to * find the driver that matches the device. */ int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);