X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=src%2Fcc65%2Fopcodes.h;h=349de32a4dbba3e03d3546cac97f63bcac412288;hb=346d88a6a77fd0fa7bd5972991e101640d97f040;hp=89a7c4117ee417dd30f05f69c32c716ee8fe9436;hpb=f38852df82b804f021c9a311a324fc3b0b74dbe7;p=cc65 diff --git a/src/cc65/opcodes.h b/src/cc65/opcodes.h index 89a7c4117..349de32a4 100644 --- a/src/cc65/opcodes.h +++ b/src/cc65/opcodes.h @@ -1,14 +1,14 @@ /*****************************************************************************/ /* */ -/* opcodes.h */ +/* opcodes.h */ /* */ -/* Opcode and addressing mode definitions */ +/* Opcode and addressing mode definitions */ /* */ /* */ /* */ -/* (C) 2001-2002 Ullrich von Bassewitz */ -/* Wacholderweg 14 */ -/* D-70597 Stuttgart */ +/* (C) 2001-2004 Ullrich von Bassewitz */ +/* Roemerstrasse 52 */ +/* D-70794 Filderstadt */ /* EMail: uz@cc65.org */ /* */ /* */ @@ -44,15 +44,13 @@ /*****************************************************************************/ -/* Data */ +/* Data */ /*****************************************************************************/ -/* Definitions for the possible opcodes */ +/* 65XX opcodes */ typedef enum { - - /* 65XX opcodes */ OP65_ADC, OP65_AND, OP65_ASL, @@ -129,36 +127,23 @@ typedef enum { OP65_TYA, /* Number of opcodes available */ - OPCODE_COUNT, - - /* Several other opcode information constants */ - OP65_FIRST = OP65_ADC, - OP65_LAST = OP65_TYA, - OP65_COUNT = OP65_LAST - OP65_FIRST + 1 + OP65_COUNT } opc_t; -/* Addressing modes */ +/* 65XX addressing modes */ typedef enum { - - /* Addressing modes of the virtual stack machine */ - AM_IMP, - AM_IMM, - AM_STACK, - AM_ABS, - - /* 65XX addressing modes */ - AM65_IMP, /* implicit */ - AM65_ACC, /* accumulator */ - AM65_IMM, /* immidiate */ - AM65_ZP, /* zeropage */ - AM65_ZPX, /* zeropage,X */ + AM65_IMP, /* implicit */ + AM65_ACC, /* accumulator */ + AM65_IMM, /* immidiate */ + AM65_ZP, /* zeropage */ + AM65_ZPX, /* zeropage,X */ AM65_ZPY, /* zeropage,Y */ - AM65_ABS, /* absolute */ - AM65_ABSX, /* absolute,X */ - AM65_ABSY, /* absolute,Y */ - AM65_ZPX_IND, /* (zeropage,x) */ - AM65_ZP_INDY, /* (zeropage),y */ - AM65_ZP_IND, /* (zeropage) */ + AM65_ABS, /* absolute */ + AM65_ABSX, /* absolute,X */ + AM65_ABSY, /* absolute,Y */ + AM65_ZPX_IND, /* (zeropage,x) */ + AM65_ZP_INDY, /* (zeropage),y */ + AM65_ZP_IND, /* (zeropage) */ AM65_BRA /* branch */ } am_t; @@ -175,50 +160,51 @@ typedef enum { } bc_t; /* Opcode info */ -#define OF_NONE 0x0000U /* No additional information */ -#define OF_UBRA 0x0001U /* Unconditional branch */ -#define OF_CBRA 0x0002U /* Conditional branch */ -#define OF_ZBRA 0x0004U /* Branch on zero flag condition */ +#define OF_NONE 0x0000U /* No additional information */ +#define OF_UBRA 0x0001U /* Unconditional branch */ +#define OF_CBRA 0x0002U /* Conditional branch */ +#define OF_ZBRA 0x0004U /* Branch on zero flag condition */ #define OF_FBRA 0x0008U /* Branch on cond set by a load */ -#define OF_LBRA 0x0010U /* Jump/branch is long */ -#define OF_RET 0x0020U /* Return from function */ -#define OF_LOAD 0x0040U /* Register load */ +#define OF_LBRA 0x0010U /* Jump/branch is long */ +#define OF_RET 0x0020U /* Return from function */ +#define OF_LOAD 0x0040U /* Register load */ #define OF_STORE 0x0080U /* Register store */ #define OF_XFR 0x0100U /* Transfer instruction */ #define OF_CALL 0x0200U /* A subroutine call */ #define OF_REG_INCDEC 0x0400U /* A register increment or decrement */ #define OF_SETF 0x0800U /* Insn will set all load flags (not carry) */ #define OF_CMP 0x1000U /* A compare A/X/Y instruction */ +#define OF_NOIMP 0x2000U /* Implicit addressing mode is actually A */ /* Combined infos */ -#define OF_BRA (OF_UBRA | OF_CBRA) /* Operation is a jump/branch */ -#define OF_DEAD (OF_UBRA | OF_RET) /* Dead end - no exec behind this point */ +#define OF_BRA (OF_UBRA | OF_CBRA) /* Operation is a jump/branch */ +#define OF_DEAD (OF_UBRA | OF_RET) /* Dead end - no exec behind this point */ /* Opcode description */ typedef struct { - opc_t OPC; /* Opcode */ - char Mnemo[9]; /* Mnemonic */ - unsigned char Size; /* Size, 0 = check addressing mode */ - unsigned short Use; /* Registers used by this insn */ - unsigned short Chg; /* Registers changed by this insn */ - unsigned short Info; /* Additional information */ + opc_t OPC; /* Opcode */ + char Mnemo[9]; /* Mnemonic */ + unsigned char Size; /* Size, 0 = check addressing mode */ + unsigned short Use; /* Registers used by this insn */ + unsigned short Chg; /* Registers changed by this insn */ + unsigned short Info; /* Additional information */ } OPCDesc; /* Opcode description table */ -extern const OPCDesc OPCTable[OPCODE_COUNT]; +extern const OPCDesc OPCTable[OP65_COUNT]; /*****************************************************************************/ -/* Code */ +/* Code */ /*****************************************************************************/ const OPCDesc* FindOP65 (const char* OPC); /* Find the given opcode and return the opcode description. If the opcode was - * not found, NULL is returned. - */ +** not found, NULL is returned. +*/ unsigned GetInsnSize (opc_t OPC, am_t AM); /* Return the size of the given instruction */ @@ -231,7 +217,7 @@ INLINE const OPCDesc* GetOPCDesc (opc_t OPC) return &OPCTable [OPC]; } #else -# define GetOPCDesc(OPC) (&OPCTable [(OPC)]) +# define GetOPCDesc(OPC) (&OPCTable [(OPC)]) #endif #if defined(HAVE_INLINE) @@ -242,26 +228,26 @@ INLINE unsigned GetOPCInfo (opc_t OPC) return OPCTable[OPC].Info; } #else -# define GetOPCInfo(OPC) (OPCTable[(OPC)].Info) +# define GetOPCInfo(OPC) (OPCTable[(OPC)].Info) #endif unsigned char GetAMUseInfo (am_t AM); /* Get usage info for the given addressing mode (addressing modes that use - * index registers return REG_r info for these registers). - */ +** index registers return REG_r info for these registers). +*/ opc_t GetInverseBranch (opc_t OPC); /* Return a branch that reverse the condition of the branch given in OPC */ opc_t MakeShortBranch (opc_t OPC); /* Return the short version of the given branch. If the branch is already - * a short branch, return the opcode unchanged. - */ +** a short branch, return the opcode unchanged. +*/ opc_t MakeLongBranch (opc_t OPC); /* Return the long version of the given branch. If the branch is already - * a long branch, return the opcode unchanged. - */ +** a long branch, return the opcode unchanged. +*/ bc_t GetBranchCond (opc_t OPC); /* Get the condition for the conditional branch in OPC */ @@ -272,7 +258,5 @@ bc_t GetInverseCond (bc_t BC); /* End of opcodes.h */ -#endif - - +#endif