X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;ds=sidebyside;f=src%2Ftarget%2Farm7tdmi.c;h=c590701e2a84a2de92f0540868db543b71aae02b;hb=b71e3aff6d239857523625846b9682168eaa9472;hp=03c49663c6653affae294c7eb5e8a43683b78454;hpb=84df52f9ea78e2d71bde648a16b69d80404c6421;p=openocd

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 03c49663..c590701e 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -383,7 +383,7 @@ void arm7tdmi_read_core_regs(target_t *target, uint32_t mask, uint32_t* core_reg
 	for (i = 0; i <= 15; i++)
 	{
 		if (mask & (1 << i))
-			/* nothing fetched, STM still in EXECUTE (1+i cycle) */
+			/* nothing fetched, STM still in EXECUTE (1 + i cycle) */
 			arm7tdmi_clock_data_in(jtag_info, core_regs[i]);
 	}
 }
@@ -412,7 +412,7 @@ void arm7tdmi_read_core_regs_target_buffer(target_t *target, uint32_t mask, void
 
 	for (i = 0; i <= 15; i++)
 	{
-		/* nothing fetched, STM still in EXECUTE (1+i cycle), read databus */
+		/* nothing fetched, STM still in EXECUTE (1 + i cycle), read databus */
 		if (mask & (1 << i))
 		{
 			switch (size)
@@ -522,7 +522,7 @@ void arm7tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg
 	for (i = 0; i <= 15; i++)
 	{
 		if (mask & (1 << i))
-			/* nothing fetched, LDM still in EXECUTE (1+i cycle) */
+			/* nothing fetched, LDM still in EXECUTE (1 + i cycle) */
 			arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0);
 	}
 	arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
@@ -822,7 +822,7 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, jtag_
 	return ERROR_OK;
 }
 
-int arm7tdmi_target_create( struct target_s *target, Jim_Interp *interp )
+int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
 {
 	arm7tdmi_common_t *arm7tdmi;