X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=CHANGELOG;h=e9c2c82e8f0b78a6cb1ce51dc5d52e267821d5ca;hb=c553b5f4a0c77fc76e1d25e71c8aaa47657e2d6f;hp=0c9c0479c835376b976578db0395d24315a38b02;hpb=7f202217356f19e519e6ec57a29de9af73067037;p=u-boot diff --git a/CHANGELOG b/CHANGELOG index 0c9c0479c8..e9c2c82e8f 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,3 +1,4446 @@ +commit 5fc56b907d993260b9ebdb137af66fe69635ae9e +Author: Peter Tyser +Date: Fri Jan 30 16:36:40 2009 -0600 + + Add feature-removal-schedule.txt + + Signed-off-by: Peter Tyser + +commit 255d28e1642e8fc32a6753226be1a96b481ce111 +Author: Heiko Schocher +Date: Tue Feb 10 09:32:38 2009 +0100 + + 8xx serial, smc: Coding-Style cleanup serial SMC driver + + Signed-off-by: Heiko Schocher + +commit 2b3f12c214346508cae3f1245808c1ca54c81fdd +Author: Heiko Schocher +Date: Tue Feb 10 09:31:47 2009 +0100 + + 8xx serial, smc: add configurable SMC Rx buffer len + + This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. + With this option it is possible to allow the receive + buffer for the SMC on 8xx to be greater then 1. In case + CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the + old version. + + When defining CONFIG_SYS_SMC_RXBUFLEN also + CONFIG_SYS_MAXIDLE must be defined to setup the maximum + idle timeout for the SMC. + + Signed-off-by: Heiko Schocher + +commit e915f8bb73d74178bc21d3a457959883b1afd1c0 +Author: Mike Frysinger +Date: Thu Feb 5 21:04:36 2009 -0500 + + common/{hush, kgdb, serial}.c: build by COBJS-$(...) in Makefile + + Move global '#ifdef CONFIG_xxx .... #endif' out of the .c files and into + the COBJS-$(CONFIG_xxx) in the Makefile. Also delete unused var in kgdb + code in the process. + + Signed-off-by: Mike Frysinger + +commit ab76e9848a1f4db64d14233741d739a3b3360c93 +Author: Mike Frysinger +Date: Thu Feb 5 21:04:50 2009 -0500 + + bzip2: move ifdef handling to Makefile COBJS-$(...) + + Signed-off-by: Mike Frysinger + +commit ae0b05df04e1cc65c5ad19ccd362f4be82df7316 +Author: Jerry Van Baren +Date: Thu Feb 5 22:18:02 2009 -0500 + + Fix whitespace damage: double space changed to a tab + + At some point an intentional double space at the end of the sentence + got changed into a tab in the GPL header line: + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + + This patch fixes the damage. + + Signed-off-by: Gerald Van Baren + +commit 4f975678de995b55749d5e84590c268972a7c835 +Author: Heiko Schocher +Date: Tue Feb 10 09:53:29 2009 +0100 + + cfi: make flash_get_info() non static + + If on your board is more than one flash, you must know + the size of every single flash, for example, for updating + the DTS before booting Linux. So make this function + flash_get_info() extern, and you can have all info + about your flashes. + + Signed-off-by: Heiko Schocher + Signed-off-by: Stefan Roese + +commit 86321fc1128c93a10ac4afb9d317b0df8ece0f9e +Author: Ben Warren +Date: Thu Feb 5 23:58:25 2009 -0800 + + net: removed board-specific CONFIGs from MPC5xxx FEC driver + + Added new CONFIG options for the three type of MAC-PHY interconnect and + applied them all relevant board config files + + Signed-off-by: Ben Warren + +commit 638ed3e296e70fab286d157b7adedaaa4a09a474 +Author: Mike Frysinger +Date: Thu Feb 5 21:04:47 2009 -0500 + + net/sntp.c: move ifdef into Makefile COBJS-$(...) + + Signed-off-by: Mike Frysinger + Signed-off-by: Ben Warren + +commit 9e5be8214ba751436e57c3be044bf6dccb9a6687 +Author: Andy Fleming +Date: Tue Feb 3 18:26:41 2009 -0600 + + tsec: Fix a bug in soft-resetting + + SOFT_RESET must be asserted for at least 3 TX clocks. Usually, that's about 30 + clock cycles, so it's been mostly working. But we had no guarantee, and at + slower bitrates, it's just over a microsecond (over 1000 clock cycles). This + enforces a 2 microsecond gap between assertion and deassertion. + + Signed-off-by: Andy Fleming + Signed-off-by: Ben Warren + +commit 09fcc8b5d86903b76e7e4d1d879d6f4bca25c27b +Author: Simon Munton +Date: Mon Feb 2 09:44:08 2009 +0000 + + Fix 100Mbs ethernet operation on sh7763 based boards + + 100Mbs ethernet does not work on sh7763 chips due to the wrong value being + used in the GECMR register. Following diff fixes the problem + + Signed-off-by: Simon Munton + Signed-off-by: Ben Warren + +commit 2bc2a8f6dc9fdda465317da59474e65c24a398a2 +Author: ksi@koi8.net +Date: Fri Feb 6 16:27:55 2009 -0800 + + Fix MPC8260 with ethernet on SCC + + This fixes MPC8260 compilation with ethernet on SCC. Probably was a + typo or something... + + Signed-off-by: Sergey Kubushyn + Signed-off-by: Ben Warren + +commit ae5d8f613cec1a6af7bf1fc9c42a3b856f021023 +Author: Heiko Schocher +Date: Fri Jan 30 12:56:15 2009 +0100 + + 82xx serial, smc: Coding-Style cleanup serial SMC driver + + Signed-off-by: Heiko Schocher + +commit c92fac91a06c60f874c605e3ca80dd407c1caaa7 +Author: Heiko Schocher +Date: Fri Jan 30 12:55:38 2009 +0100 + + 82xx serial, smc: add configurable SMC Rx buffer len + + This patch adds the configuration option CONFIG_SYS_SMC_RXBUFLEN. + With this option it is possible to allow the receive + buffer for the SMC on 82xx to be greater then 1. In case + CONFIG_SYS_SMC_RXBUFLEN == 1 this driver works as the + old version. + + When defining CONFIG_SYS_SMC_RXBUFLEN also + CONFIG_SYS_MAXIDLE must be defined to setup the maximum + idle timeout for the SMC. + + Signed-off-by: Heiko Schocher + +commit bced7ccefa08512c54a6d146658ff7dbc33d5dfe +Author: Kumar Gala +Date: Fri Feb 6 08:08:06 2009 -0600 + + ppc: Fix roll over bug in flush_cache() + + If we call flush_cache(0xfffff000, 0x1000) it would never + terminate the loop since end = 0xffffffff and we'd roll over + our counter from 0xfffffe0 to 0 (assuming a 32-byte cache line) + + Signed-off-by: Kumar Gala + +commit 87c9063963561d3d01064be34d0c30855a56587b +Author: Kumar Gala +Date: Thu Feb 5 20:40:58 2009 -0600 + + ppc: Move CONFIG_MAX_MEM_MAPPED to common config.h + + Moved CONFIG_MAX_MEM_MAPPED to the asm/config.h so its kept consistent + between the two current users (lib_ppc/board.c, 44x SPD DDR2). + + Signed-off-by: Kumar Gala + Acked-by: Stefan Roese + +commit 47d41cc3a11a03c6d56146d056145df73f47eb50 +Author: Kumar Gala +Date: Thu Feb 5 20:40:57 2009 -0600 + + Add an architecture specific config.h for common defines + + We have common defines that we duplicate in various ways. Having an + arch specific config.h gives us a common location for those defines. + + Eventually we should be able to replace this when we have proper + Kconfig support. + + Signed-off-by: Kumar Gala + +commit 4c78d4a6c01621721b732418e1c6da684a56bbb1 +Author: Becky Bruce +Date: Tue Feb 3 18:10:56 2009 -0600 + + mpc8641hpcn: Change PCI MEM pci bus address + + Now that the rest of u-boot can support it, change the PCI bus + address of the PCI MEM regions from 0x80000000 to 0xc0000000, + and use the same bus address for both PCI1 and PCI2. This will + maximize the amount of PCI address space left over to map RAM + on systems with large amounts of memory. + + Signed-off-by: Becky Bruce + +commit 1785dbeed43599eed1d8875673c96912cd770141 +Author: Becky Bruce +Date: Tue Feb 3 18:10:55 2009 -0600 + + drivers/block/ahci: Fix pci mapping bug + + The code assumes that the pci bus address and the virtual + address used to access a region are the same, but they might + not be. Fix this assumption. + + Signed-off-by: Becky Bruce + +commit d591a80e74091e7a0658d165721e6c7de2ef0bcd +Author: Becky Bruce +Date: Tue Feb 3 18:10:54 2009 -0600 + + MPC8641HPCN: Enable CONFIG_ADDR_MAP + + Signed-off-by: Becky Bruce + +commit 49f46f3bf08aaf7b1db131a1082f1e603bb7a94b +Author: Becky Bruce +Date: Tue Feb 3 18:10:53 2009 -0600 + + mpc8641hpcn: Clean up PCI mapping concepts + + Clean up PCI mapping concepts in the 8641 config - rename _BASE + to _BUS, as it's actually a PCI bus address, separate virtual + and physical addresses into _VIRT and _PHYS, and use each + appopriately. + + Signed-off-by: Becky Bruce + +commit c9315e6b4f244981de0b2eaaa29a7838a165b494 +Author: Becky Bruce +Date: Tue Feb 3 18:10:52 2009 -0600 + + mpc86xx: Add support to populate addr map based on BATs + + If CONFIG_ADDR_MAP is enabled, update the address map + whenever we write a bat. + + Signed-off-by: Becky Bruce + +commit d35ae5a938679bd7e18167faf79d0fb3c6639b51 +Author: Becky Bruce +Date: Tue Feb 3 18:10:51 2009 -0600 + + powerpc: Move duplicated BAT defines to mmu.h + + The BAT fields are architected; there's no need for these to be in + cpu-specific files. Drop the duplication and move these to + include/asm-ppc/mmu.h. Also, remove the BL_xxx defines that were only + used by the alaska board, and switch to using the BATU_BL_xxx defines + used by all the other boards. The BL_ defines previously in use + had to be shifted into the proper position for use, which was inefficient. + + Signed-off-by: Becky Bruce + +commit 6e61fae4d360a1380b63e7d007b31477e366bcce +Author: Becky Bruce +Date: Tue Feb 3 18:10:50 2009 -0600 + + drivers/pci: Create pci_map_bar function + + It is no longer always true that the pci bus address can be + used as the virtual address for pci accesses. pci_map_bar() + is created to return the virtual address for a pci region. + + Signed-off-by: Becky Bruce + +commit 2ecca3401775b125c3b9ff65766befb23989414b +Author: Becky Bruce +Date: Tue Feb 3 18:10:49 2009 -0600 + + mpc8641hpcn: Set up outbound pci windows before inbound + + Because the inbound pci windows are mapped generously, set up + the more specific outbound windows first. This way, when we + search the pci regions for something, we will hit on the more + specific region. This can actually be a problem on systems + with large amounts of RAM. + + Signed-off-by: Becky Bruce + +commit b81b773ead0687114dc8a800f99ea6e504447739 +Author: Becky Bruce +Date: Mon Feb 2 16:34:52 2009 -0600 + + mpc8641hpcn: Use physical address in flash banks defintion + + If the VA and PA of the flash aren't the same, the banks list + should be initialized to hold the physical address. Correct this. + + Signed-off-by: Becky Bruce + +commit 2d43e873a29ca4959ba6a30fc7fb396d3fd0dccf +Author: Kumar Gala +Date: Fri Feb 6 09:49:32 2009 -0600 + + pci: give preference to non-PCI_REGION_SYS_MEMORY regions when matching + + When we search for an address match in pci_hose_{phys_to_bus,bus_to_phys} + we should give preference to memory regions that aren't system memory. + + Its possible that we have over mapped system memory in the regions and + we want to avoid depending on the order of the regions. + + Signed-off-by: Kumar Gala + +commit ff4e66e93c1ad47644be3b4ffd6a46e1ce9b6612 +Author: Kumar Gala +Date: Fri Feb 6 09:49:31 2009 -0600 + + pci: Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY for clarity + + The PCI_REGION_MEMORY and PCI_REGION_MEM are a bit to similar and + can be confusing when reading the code. + + Rename PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY to clarify its used + for system memory mapping purposes. + + Signed-off-by: Kumar Gala + +commit 8da601280a8acbc3385784780ed35130e53812f1 +Author: Peter Tyser +Date: Wed Feb 4 13:47:22 2009 -0600 + + NAND: Add timeout for reset command + + Without the timeout present an infinite loop can occur if the + NAND device is broken or not present. + + Signed-off-by: Peter Tyser + Signed-off-by: Scott Wood + +commit 10dc6a9bef73d7d4cb25b3fde27ee91f8484b126 +Author: Peter Tyser +Date: Wed Feb 4 13:39:40 2009 -0600 + + NAND: Silence warning when CONFIG_SYS_NAND_QUIET_TEST + + Commit cfa460adfdefcc30d104e1a9ee44994ee349bb7b removed support + for disabling the "No NAND device found!!!" warning when + CONFIG_SYS_NAND_QUIET_TEST was defined. This re-adds support + for silencing the warning. + + Signed-off-by: Peter Tyser + Signed-off-by: Scott Wood + +commit ad09ab2e3ac28f304372eceb4a5cb4d24e102a13 +Author: Valeriy Glushkov +Date: Mon Jan 19 16:32:59 2009 +0200 + + NAND: Fixed invalid pointers to static relocated chip names + + Dear Wolfgang, + + You are right, the patch was ugly. + The new one seems to be better. + + Signed-off-by: Valeriy Glushkov + Signed-off-by: Scott Wood + +commit 5a9427dc9b8438759db3f67a1e547062f76eb18d +Author: derek@siconix.com +Date: Mon Jan 26 14:08:17 2009 -0700 + + env_nand: fix env memory release + + This fixes a bug that tmp environment memory not being released. + + Signed-off-by: Derek Ou + Signed-off-by: Scott Wood + +commit 6989e4f546d960a407dd5425f800dff9751c8132 +Author: Richard Retanubun +Date: Thu Feb 5 09:33:50 2009 -0500 + + Coldfire: M527x: Add missing GPIO register address defines + + Add missing GPIO registers address definition for Coldfire M5271. + + Signed-off-by: Richard Retanubun + +commit c4ff77f5e6c3a01610ce97434c0d59acb1476f95 +Author: Richard Retanubun +Date: Fri Jan 23 14:42:58 2009 -0500 + + Coldfire: mcfmii: Allow non-autonegotiating PHYs to use mii command + + Modified mii_init to support boards with PHYs that are not set to + autonegotiate, but still want to use u-boot's mii commands to probe + the smi bus. Such PHYs will not set the Autonegotiate-done bit. + + Signed-off-by: Richard Retanubun + +commit 92d3e6e0ffcbb7224c83104f8d87b5b4bf39a38f +Author: Richard Retanubun +Date: Fri Jan 23 11:44:30 2009 -0500 + + Coldfire: Applied baudrate formula of serial_init to serial_setbrg + + Applied the patch for baudrate divider value truncation for + serial_init to serial_setbrg as well. + + Signed-off-by: Richard Retanubun + +commit 8706ef378f2db1ef65b9c2f909561f23e3dc2148 +Author: Richard Retanubun +Date: Fri Jan 23 14:07:05 2009 -0500 + + Coldfire: M5271EVB: Board header update (dependencies) + + Cleanup for M5271EVB: + Added clarification on the use of CONFIG_SYS_CLOCK. + Modified to use u-boot's HUSH parser. + Cleanup on environment settings. + Removed compiler warning by defining CONFIG_SYS_CS0_* + + Dependencies: + Added the use of CONFIG_SYS_MCF_SYNCR for clock multiplier. + This depends on a patch to include/asm-m68k/m5271.h + that defines the multiplier and divider ratios. + + Removed the definition of CONFIG_SYS_FECI2C. + This depends on a patch that removes the use of it in + cpu/mcf52x2/cpu_init.c + + Signed-off-by: Richard Retanubun + +commit e0db344fabfeb4f9649846f94838f51172f6a1f6 +Author: Richard Retanubun +Date: Thu Jan 29 14:36:06 2009 -0500 + + Coldfire: M5271: Allow board header file to specify clock multiplier + + M5271 dynamic clock multiplier. It is currently fixed at 100MHz. + + Allow the board header file to set their own multiplier and divider. + Added the #define for the multiplier and divider to the cpu header file. + + Signed-off-by: Richard Retanubun + +commit d1ef25dd81c79dcfad5c2ff0162b1bea21d04bc3 +Author: Richard Retanubun +Date: Fri Jan 23 10:47:13 2009 -0500 + + Coldfire: M5271EVB: Remove usage of CONFIG_SYS_FECI2C + + Discontinue the use of CONFIG_SYS_FECI2C (only used by M5271EVB). + Use read-modify-write to activate the FEC pins without disabling I2C. + + Signed-off-by: Richard Retanubun + +commit ee73cc59ab904976af3c33b454fc84f78618b2d1 +Author: Richard Retanubun +Date: Fri Jan 23 09:45:34 2009 -0500 + + Coldfire: cmd_bdinfo cleanup + + CONFIG_M68K bdinfo cleanup: + + Fixed compiler warning about baudrate printing. + format '%d' expects type 'int', but argument 2 has type 'long unsigned int'. + + Added printing of "cpufreq" + + Signed-off-by: Richard Retanubun + +commit 4ffc39050aa46ed8a3d29732293dff769e54fffa +Author: Richard Retanubun +Date: Fri Jan 23 09:27:00 2009 -0500 + + Coldfire: Fix half-baud UART by adding M5271 to Coldfire v2 core list + + Added the CONFIG_M5271 to the list of Coldfire V2 processor. This + was causing the bus clock (not CPU clock) to be declared twice as + fast as it actually is. This causes UARTS to operate at half the + specified baudrate. + + Signed-off-by: Richard Retanubun + +commit 59d1bda7f92c8a28c3aba94e48063749d425949f +Author: Dirk Eibach +Date: Tue Feb 3 15:15:21 2009 +0100 + + ppc4xx: Make PCIE support selectable + + On some platforms PCIE support is not required, but would be included + because the cpu supports it. To reduce fooprint it is now configurable + via CONFIG_PCI_DISABLE_PCIE. + + Signed-off-by: Dirk Eibach + Signed-off-by: Stefan Roese + +commit b129eff5ede394cc1faeb6dbf6a987e91abce552 +Author: Matthias Fuchs +Date: Tue Feb 3 22:13:16 2009 +0100 + + ppc4xx: Only fixup opb attached UARTs + + This patch updates the fdt UART clock fixup code to + only touch CPU internal UARTs on 4xx systems. + Only these UARTs are definitely clocked by gd->uart_clk. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 4b7e3d045cc82f7f7b6f3a19b54a814da36ac52c +Author: Mike Frysinger +Date: Tue Jan 13 11:00:29 2009 -0500 + + Blackfin: move default boot SPI CS to common code + + Move the default SPI CS that we boot from into common code so that it can + be used in other SPI drivers and environment settings. + + Signed-off-by: Mike Frysinger + +commit f790ef6ff12381cb0e43de54fb2b0f1204ad8ed6 +Author: Mike Frysinger +Date: Wed Dec 10 12:33:54 2008 -0500 + + Blackfin: dynamically update UART speed when initializing + + Previously, booting over the UART required the baud rate to be known ahead + of time. Using a bit of tricky simple math, we can calculate the new board + rate based on the old divisors. + + Signed-off-by: Mike Frysinger + Signed-off-by: Robin Getz + +commit 97f265f14f23050f3cb997f617f3a6917b843ea2 +Author: Mike Frysinger +Date: Tue Dec 9 17:21:08 2008 -0500 + + Blackfin: add support for fast SPI reads with Boot ROM + + Newer Blackfin boot roms support using the fast SPI read command rather than + just the slow one. If the functionality is available, then use it. + + Signed-off-by: Mike Frysinger + +commit 67619982bfc5cd62710a48e3cbffc304cb78c341 +Author: Mike Frysinger +Date: Sat Oct 11 21:46:52 2008 -0400 + + Blackfin: check for reserved settings in DDR MMRs + + Some bits of the DDR MMRs should not be set. If they do, bad things may + happen (like random failures or hardware destruction). + + Signed-off-by: Mike Frysinger + +commit 622a8dc0958dd599743348ea94eb10b9d0be8ae6 +Author: Mike Frysinger +Date: Sat Oct 11 21:54:00 2008 -0400 + + Blackfin: set default voltage levels for BF538/BF539 parts + + Signed-off-by: Mike Frysinger + +commit 09dc6b0bbd1d5e39cdddeebc059f9a75630e4f6f +Author: Mike Frysinger +Date: Sun Jun 1 01:29:57 2008 -0400 + + Blackfin: use on-chip syscontrol() rom function when available + + Newer Blackfin's have an on-chip rom with a syscontrol() function that needs + to be used to properly program the memory and voltage settings as it will + include (possibly critical) factory tested bias values. + + Signed-off-by: Mike Frysinger + +commit e1fb6d0d52fbe3fbc1a4c651dacf11e9c1417f63 +Author: Stefan Roese +Date: Thu Feb 5 11:44:52 2009 +0100 + + cfi_flash: Fix typo in cfi_flash.c + + Patch "flash/cfi_flash: Use virtual sector start address, not phys" + introduced a small typo and compilation warning for systems with CFI + legacy support (e.g. hcu4). This patch fixes it. + + Signed-off-by: Stefan Roese + +commit 28745db969b72693754991c838f68a7fb4a8b1ab +Author: Stefan Roese +Date: Thu Jan 29 11:21:38 2009 +0100 + + jedec_flash: Only use manufacturer defines from common flash.h + + This patch removes the double defined manufacturer defines from + jedec_flash.c. Since the common defines in flash.h are 32bit + we now need the (16) cast. This patch also removes the compilation + warning (e.g. seen on hcu5): + + ./MAKEALL hcu5 + Configuring for hcu5 board... + jedec_flash.c:219: warning: large integer implicitly truncated to unsigned type + + Signed-off-by: Stefan Roese + +commit ec21d5cfcb6b4e7fcdd5c6e926e1a824900706f2 +Author: Stefan Roese +Date: Thu Feb 5 11:25:57 2009 +0100 + + cfi_flash: Silence compilation warning + + Patch "flash/cfi_flash: Use virtual sector start address, not phys" + introduced a small compilation warning. This patch fixes it. + + Signed-off-by: Stefan Roese + +commit 09ce9921a7d8b1ce764656b14b42217bbf4faa38 +Author: Becky Bruce +Date: Mon Feb 2 16:34:51 2009 -0600 + + flash/cfi_flash: Use virtual sector start address, not phys + + include/flash.h was commented to say that the address in + flash_info->start was a physical address. However, from u-boot's + point of view, and looking at most flash code, it makes more + sense for this to be a virtual address. So I corrected the + comment to indicate that this was a virtual address. + + The only flash driver that was actually treating the address + as physical was the mtd/cfi_flash driver. However, this code + was using it inconsistently as it actually directly dereferenced + the "start" element, while it used map_physmem to get a + virtual address in other places. I changed this driver so + that the code which initializes the info->start field calls + map_physmem to get a virtual address, eliminating the need for + further map_physmem calls. The code is now consistent. + + The *only* place a physical address should be used is when defining the + flash banks list that is used to initialize the flash_info struct, + usually found in the board config file. + + Signed-off-by: Becky Bruce + Signed-off-by: Stefan Roese + +commit 657f2062d8e17ebf4a55f52c9e71c07c0c94c779 +Author: Wolfgang Denk +Date: Wed Feb 4 09:42:20 2009 +0100 + + Fix compiler warning + + (shows up only when DEBUG is enabled) + + Signed-off-by: Wolfgang Denk + +commit 47832cd15ae02fb6fde8ebed5b272f85775f2ceb +Author: Mike Frysinger +Date: Mon Oct 6 03:45:55 2008 -0400 + + Blackfin: update anomaly lists + + Update the anomaly lists to match latest anomaly sheets. + + Signed-off-by: Mike Frysinger + +commit 70a4da45e16b72e8e5b0baaecdaee9be8619647d +Author: Ralph Kondziella +Date: Mon Jan 26 12:34:36 2009 -0700 + + ADS5121 Add PATA support + + Original patch from Ralph Kondziella + plus clean up by Wolfgang Denk + plus changes by John Rigby + use ips clock not lpc + port forward to current u-boot release + + Signed-off-by: Ralph Kondziella + Signed-off-by: Wolfgang Denk + Signed-off-by: John Rigby + +commit abfbd0ae4967df18102345db4f4b529a13da107b +Author: Martha Marx +Date: Mon Jan 26 10:45:07 2009 -0700 + + ADS5121 Add IC Ident Module (IIM) support + + IIM (IC Identification Module) is the fusebox for the mpc5121. + Use #define CONFIG_IIM to turn on the clock for this module + use #define CONFIG_CMD_FUSE to add fusebox commands. + Fusebox commands include the ability to read + the status, read the register cache, override the register cache, + program the fuses and sense them. + + Signed-off-by: Martha Marx + Signed-off-by: John Rigby + +commit 14d19cd1bce9a24b1335598f1568140f4950e4d9 +Author: John Rigby +Date: Fri Jan 23 10:33:15 2009 -0700 + + ADS5121 Fix rev2 silicon pci iopad config + + Reset config is not correct + + Signed-off-by: John Rigby + +commit 4c154252c480b13f69ce1b71a9530b0515da76a6 +Author: John Rigby +Date: Wed Nov 19 13:57:34 2008 -0700 + + ADS5121 DIU Add diu_bmp_addr env + + Add support for using a bmp other than + FSL_Logo_BMP for the DIU splash screen. + + Can now set the env var "diu_bmp_addr" to + the address of a BMP in flash to use instead + of the default FSL_Logo_BMP. + + Signed-off-by: Martha Marx + Signed-off-by: John Rigby + +commit 92c20fbd3a7788c1a154f50a3f44f28a7763f99a +Author: John Rigby +Date: Thu Oct 30 16:39:35 2008 -0600 + + ADS5121 DIU Make inclusion of FSL logo optional + + Make inclusion of FSL logo optional and + turn it off by default. + + Signed-off-by: John Rigby + +commit bd99ec149abe94e7f6b2bda4766d701b4005053f +Author: Remy Bohmer +Date: Sun Feb 1 12:27:53 2009 +0100 + + Compile warning fix in onenand_uboot.h + + Regression since merge window after 2009.01 + + Signed-off-by: Remy Bohmer + +commit a270d1e7295c3d829f42c0480117941dfc1c6477 +Author: Stefan Roese +Date: Thu Jan 29 06:33:55 2009 +0100 + + USB: Add EHCI support for VCT EHCI controller (really with driver now) + + Somehow I missed the real driver part in my last patch version. This patch + now adds the driver. + + Signed-off-by: Stefan Roese + Signed-off-by: Remy Bohmer + +commit 716ebf436c9e43df6740e0172f6b2a81ddbf1b8e +Author: Cliff Cai +Date: Sat Nov 29 18:22:38 2008 -0500 + + Blackfin: add driver for on-chip MMC/SD controller + + This is a port of the Linux Blackfin on-chip SDH driver to U-Boot. + + Signed-off-by: Cliff Cai + Signed-off-by: Mike Frysinger + +commit 6e87ea0ca951465eba144ab2e6dba6fb507737a2 +Author: Mike Frysinger +Date: Sat Oct 11 22:47:34 2008 -0400 + + Blackfin: add port muxing for BF51x SPI + + Signed-off-by: Mike Frysinger + +commit fc68f9f85959664d528daea2aef5ef54974331ce +Author: Mike Frysinger +Date: Tue Jan 6 06:16:19 2009 -0500 + + Blackfin: output booting source when booting + + Knowing the booting source of the part is useful, especially when the part + can switch dynamically between sources. + + Signed-off-by: Mike Frysinger + +commit 8df3ce0f49c37947800ac7c84e751499882619fc +Author: Mike Frysinger +Date: Thu Dec 11 06:30:46 2008 -0500 + + Blackfin: set default CONFIG_ENV_SPI_CS based on bootrom + + Set the default CONFIG_ENV_SPI_CS value to match the SPI CS that is used by + the Blackfin on-chip bootrom to boot out of SPI flash. + + Signed-off-by: Mike Frysinger + +commit 2b4a486e6fac502d8b883e344cc4012283945b3d +Author: Mike Frysinger +Date: Thu Dec 11 04:06:26 2008 -0500 + + Blackfin: update asm-blackfin/posix_types.h to latest Linux version + + Signed-off-by: Mike Frysinger + +commit e5eb93e77391bcc308697116c544ea1340aaae8a +Author: Mike Frysinger +Date: Sat Dec 6 02:54:52 2008 -0500 + + Blackfin: add port I bits + + Some people need to access port I, so make sure the pins are defined. + + Signed-off-by: Mike Frysinger + +commit 8a6b272596d43de0db4943eac7af58c3534c4026 +Author: Sonic Zhang +Date: Wed Nov 26 22:16:45 2008 -0500 + + Blackfin: add driver for on-chip ATAPI controller + + This is a port of the Linux Blackfin on-chip ATAPI driver to U-Boot. + + Signed-off-by: Sonic Zhang + Signed-off-by: Mike Frysinger + +commit be9d8c780e6831cb84b7d4590ceae03dca8fc10b +Author: Mike Frysinger +Date: Wed Nov 26 21:43:06 2008 -0500 + + Blackfin: add driver for on-chip NAND controller + + This is a port of the Linux Blackfin on-chip NFC driver to U-Boot. + + Signed-off-by: Mike Frysinger + +commit 4148e02abae9a099f4444b5e168ebc2b911d2295 +Author: Mike Frysinger +Date: Wed Nov 12 07:18:15 2008 -0500 + + Blackfin: build with -mno-fdpic + + Use the -mno-fdpic flag so that any Blackfin toolchain can be used to build + up u-boot, including ones that output FDPIC ELF by default. + + Signed-off-by: Mike Frysinger + +commit 70e95589a24a2d83ad00317e4a9611d0211ecb58 +Author: Mike Frysinger +Date: Tue Nov 11 05:43:57 2008 -0500 + + Blackfin: fix up EBIU defines + + The EBIU defines for EBSZ 256/512 were incorrect. + + Signed-off-by: Mike Frysinger + +commit 961954ea0ec8dc4341034c1a1ff3107ec0527809 +Author: Mike Frysinger +Date: Wed Nov 5 12:45:24 2008 -0500 + + Blackfin: use 8/16/32 bit transfer widths in dma_memcpy() + + Rather than using 8bit transfers for everything, use 8/16/32 bit transfers + as usable with the source/destination addresses and the count size. + + Signed-off-by: Mike Frysinger + +commit b93c68648426f906d63b98117496b6415f505f39 +Author: Mike Frysinger +Date: Wed Nov 5 08:50:23 2008 -0500 + + Blackfin: only flag L1 instruction for DMA memcpy + + The performance difference from doing an 8 bit DMA memcpy vs an optimized + core memcpy can be pretty big when you add in the overhead of setting up the + MDMA registers, cache flushes, etc... So only use dma_memcpy() when we + actually require it. + + Signed-off-by: Mike Frysinger + +commit e347c092a3b3a2ce1e72f25f4829163634d09fbe +Author: Mike Frysinger +Date: Wed Nov 5 07:20:37 2008 -0500 + + Blackfin: dma_memcpy(): fix random failures + + We have to make sure the DMA channel is actually disabled in hardware before + attempting to reprogram it. Otherwise the new settings are ignored and we + end up with random hangs/failures. + + Signed-off-by: Mike Frysinger + +commit fdce83c108846d6f0d5b1774e1cc29f2573a6ad3 +Author: Mike Frysinger +Date: Tue Nov 4 00:04:03 2008 -0500 + + Blackfin: rewrite cache handling functions + + Take the cache flush functions from the kernel as they use hardware loops in + order to get optimal performance. + + Signed-off-by: Mike Frysinger + +commit 84c5f0dc47d17593fd81206614891bdc94f6d51c +Author: Mike Frysinger +Date: Mon Nov 3 22:30:05 2008 -0500 + + Blackfin: setup bi_enetaddr for single nets + + For systems with CONFIG_NET_MULTI disabled, bi_enetaddr does not get setup + based on $ethaddr, so set it up. + + Signed-off-by: Mike Frysinger + +commit 40599239e7875b39e2a5c12e6545992041c72c52 +Author: Mike Frysinger +Date: Fri Oct 24 22:48:47 2008 -0400 + + Blackfin: cache core/system clock values + + Calculating the clocks requires a bit of calls to gcc math functions, so + cache the values after the first run since they'll most likely never + change once U-Boot is up and running. + + Signed-off-by: Mike Frysinger + +commit 6957a6209b02f6b69607fc47425f13731cc477f1 +Author: Mike Frysinger +Date: Fri Oct 24 18:18:16 2008 -0400 + + Blackfin: enable --gc-sections + + Start building all Blackfin boards with -ffunction-sections/-fdata-sections + and linking with --gc-sections. + + Signed-off-by: Mike Frysinger + +commit ee1d2001ea7fbabb2b9256026dc5468f057337f8 +Author: Mike Frysinger +Date: Mon Oct 20 21:08:54 2008 -0400 + + Blackfin: dont check baud if it wont actually get used + + Signed-off-by: Mike Frysinger + +commit 400f5778f375bc99c73c8488c555def261ccfab7 +Author: Mike Frysinger +Date: Tue Oct 14 07:54:09 2008 -0400 + + Blackfin: add driver for on-chip SPI controller + + This fills out the SPI backend for the Blackfin on-chip SPI peripheral. + + Signed-off-by: Mike Frysinger + +commit 7a1e87b1062e6eac0704c6fc2f7c661caf8814cd +Author: Mike Frysinger +Date: Sat Oct 18 05:33:51 2008 -0400 + + Blackfin: only build post code when CONFIG_POST + + Save some time by using CONFIG_POST in the Makefile rather than C files. + + Signed-off-by: Mike Frysinger + +commit 6d7d4803c74bb86e1b401b1199e63381a62b9382 +Author: Mike Frysinger +Date: Thu Jan 8 11:57:57 2009 -0500 + + Blackfin: bfin_mac: cleanup pointer/casts for aliasing issues + + Redo how pointers are managed to get rid of ugly casts and strict pointer + aliasing issues that are highlighted by gcc 4.3. + + Signed-off-by: Mike Frysinger + Acked-by: Ben Warren + +commit 092d2487baf7c29343c165e3ae82ea8a7f9e679b +Author: Mike Frysinger +Date: Tue Dec 9 17:46:21 2008 -0500 + + Blackfin: bfin_mac: convert CONFIG_BFIN_MAC_RMII to CONFIG_RMII + + No point in having a Blackfin-specific define "CONFIG_BFIN_MAC_RMII" that + does exactly the same thing as common "CONFIG_RMII". + + Signed-off-by: Mike Frysinger + Acked-by: Ben Warren + +commit 8eed6ca51e50fade6887e8bdb1ff6a44116b42b5 +Author: Mike Frysinger +Date: Wed Nov 5 06:36:15 2008 -0500 + + Blackfin: bfin_mac: use common debug() + + Rather then defining our own DEBUGF(), just use the common debug(). + + Signed-off-by: Mike Frysinger + Acked-by: Ben Warren + +commit a7ec6ac8b2c6dce6fc670a2a855deb6eee340e04 +Author: Mike Frysinger +Date: Mon Oct 20 13:59:51 2008 -0400 + + Blackfin: bfin_mac: respect CONFIG_PHY_{ADDR,CLOCK_FREQ} + + Rather than having the on-chip MAC hardcoded to phy address 1 and a speed + of 2.5mhz, use these as defaults if the board doesn't specify otherwise. + + Signed-off-by: Mike Frysinger + Acked-by: Ben Warren + +commit ac45af4e63ea925f4accc98453aab1a1166c196d +Author: Mike Frysinger +Date: Tue Oct 14 04:52:00 2008 -0400 + + Blackfin: bfin_mac: cleanup MII/PHY functions + + Cleanup and rewrite the MII/PHY related functions so that we can reuse the + existing common linux/miiphy.h code and hook into the `mii` command. + + Signed-off-by: Mike Frysinger + Acked-by: Ben Warren + +commit 6b310a05f0d10c751f22468040932139f71c71d3 +Author: Mike Frysinger +Date: Tue Oct 14 00:31:30 2008 -0400 + + Blackfin: bfin_mac: set MDCDIV based on SCLK + + Rather than hardcoding MDCDIV to 24 (which is correct for ~125mhz SCLK), + use the real algorithm so it gets set correctly regardless of SCLK. + + Signed-off-by: Mike Frysinger + Acked-by: Ben Warren + +commit 930590f3e49c8f32256edf2e5861e1535a329c6c +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 31 09:10:48 2009 +0100 + + ixp: move serial to drivers/serial + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit f90c8022f448bc5e93090e4b714368e52e912f0f +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 31 09:04:58 2009 +0100 + + ixp: move pci init in arm/board instead of cpu + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 8cb79b5f275f1888ccb278a2d2197140444a84b7 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 31 08:56:49 2009 +0100 + + ixp: move pci drivers to drivers/pci + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 012d5bab09a534e4800b02f50cf508e6837202ea +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 31 08:53:44 2009 +0100 + + ixp: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit f693f501d67434df1f815fd1824a71973ae08207 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 31 08:53:44 2009 +0100 + + ixp: add missing os define + + need by arm-elf toolchains and no impact on the arm-linux one + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit b4e2f89dfcb206a22d34fa6b34878d85b498b39f +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 31 09:53:39 2009 +0100 + + ixp: remove the option to include the Microcode + + instead the board will have to load it from flash or ram + which will be specified by npe_ucode env var + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 1b017baf2071d8daf643bce87250db898c606c66 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Fri Jan 30 09:45:23 2009 +0100 + + ixp/npe: Move conditional compilation to Makefile + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 4e69087a1d6ef2eca6f46026cf5e7399b6c9e7c0 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Wed Jan 28 21:58:04 2009 +0100 + + SX1: add hardware V2 support + + In the V2 the 2 flash has been replace by one 32MB flash + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit f877f2233dbcd7417c2f0babe6a849099b167f3c +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Wed Jan 28 21:58:03 2009 +0100 + + SX1: Fix second flash mapping + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 47fd3bffed6430c91eb2660f859574ed98be5bd8 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Wed Jan 28 21:58:03 2009 +0100 + + SX1: add CONFIG_STDOUT_USBTTY to enable preboot stdout redirect to usbtty + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit cfca33837ec83829c6a49c3bcc86c31bc2495ff6 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Wed Jan 28 21:57:59 2009 +0100 + + move Samsung's board to board/samsung + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit e4943ec57466ea5dfa085e7a9e0ec44cb93c4e1e +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Thu Jan 29 12:07:21 2009 +0100 + + move ARM Ltd. to vendor dir + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit a87fb1b308a2a375cb9ca74ca0dd3e2c5793d3bf +Author: Larry Johnson +Date: Wed Jan 28 15:30:37 2009 -0500 + + ppc4xx: Clean up configuration file for Korat board + + This patch updates the default environmental variables for the + Korat PPC 440EPx board, and makes additional minor fixes. + + Signed-off-by: Larry Johnson + Signed-off-by: Stefan Roese + +commit f20405e31680efc36293c59b4963db57c9d93df4 +Author: Larry Johnson +Date: Wed Jan 28 15:30:02 2009 -0500 + + ppc4xx: Add variable "korat_usbcf" for Korat board + + The new environment variable "korat_usbcf" selects the USB + port used by the Korat board's CompactFlash controller. + + Signed-off-by: Larry Johnson + Signed-off-by: Stefan Roese + +commit fc01ea1e27d5b124f0a1868d0ce569f156d58dfe +Author: Gunnar Rangoy +Date: Fri Jan 23 12:56:31 2009 +0100 + + AVR32: macb - Search for PHY id + + This patch adds support for searching through available PHY-addresses in + the macb-driver. This is needed for the ATEVK1100 evaluation board, + where the PHY-address will be initialized to either 1 or 7. + + This patch adds a config option, CONFIG_MACB_SEARCH_PHY, which when + enabled tells the driver to search for the PHY address. + + Signed-off-by: Gunnar Rangoy + Signed-off-by: Paul Driveklepp + Signed-off-by: Olav Morken + Signed-off-by: Ben Warren + +commit af8626e0c08a780d9ded1d9c4883a89355f60e75 +Author: Olav Morken +Date: Fri Jan 23 12:56:26 2009 +0100 + + Fix IP alignment problem + + This patch removes volatile from: + volatile IP_t *ip = (IP_t *)xip; + + Due to a bug, avr32-gcc will assume that ip is aligned on a word boundary when + using volatile, which causes an exception since xip isn't aligned on a word + boundary. + + Signed-off-by: Gunnar Rangoy + Signed-off-by: Paul Driveklepp + Signed-off-by: Olav Morken + Signed-off-by: Ben Warren + +commit 12a8b9db12f82a189ff143a58731007f5469da61 +Author: Ron Madrid +Date: Wed Jan 28 16:17:21 2009 -0800 + + Marvell 88E1118 interrupt fix + + This patch adjusts the LED control so that interrupt lines are not reading LEDs + and effectively causing indefinite interrupts to the controller. + + Signed-off-by: Ron Madrid + Signed-off-by: Ben Warren + +commit 9a37f2acc31a3296dddd3574ea9eaf7f319807b9 +Author: Stefan Roese +Date: Wed Jan 21 17:14:26 2009 +0100 + + net: smc911x.c: Add LAN9211 to chip_ids[] array + + Signed-off-by: Stefan Roese + Signed-off-by: Ben Warren + +commit 75edebe3011c963a7cd84be0f4a987477f2aaf89 +Author: Mike Frysinger +Date: Tue Jan 27 16:53:39 2009 -0500 + + Move is_valid_ether_addr() to include/net.h + + Import the is_valid_ether_addr() function from the Linux kernel. + + Signed-off-by: Mike Frysinger + Signed-off-by: Ben Warren + +commit 268859338c0188eab1d0d3b867b7dad3c5cc734a +Author: Michal Simek +Date: Mon Jan 5 12:25:13 2009 +0100 + + net: Sort Makefile labels + + Signed-off-by: Michal Simek + Signed-off-by: Ben Warren + +commit 1fbcbe9a95f39afb2df6ab8cba25b284b47ebfb2 +Author: Wolfgang Denk +Date: Wed Jan 28 23:06:42 2009 +0100 + + 85xx: Fix compile breakage with sbc8540 and sbc8560 + + This fixes an error which raises just a warning: + sbc8560.c:250: warning: passing argument 2 of 'strmhz' makes integer from pointer without a cast + + Signed-off-by: Wolfgang Denk + +commit 62625c0b081bd4019cecab14e9fc2e05e48d2a58 +Author: Mike Frysinger +Date: Wed Jan 28 13:48:55 2009 -0500 + + SPD823TS: do not define CONFIG_CMD_ENV + + Since the SPD823TS board does not actually have any writable flash to save + its environment, undefine CONFIG_CMD_ENV so the "saveenv" command is + disabled. + + This fixes the build error: + common/libcommon.a(cmd_nvedit.o): In function `do_saveenv': + common/cmd_nvedit.c:557: undefined reference to `saveenv' + make: *** [u-boot] Error 1 + + Signed-off-by: Mike Frysinger + +commit 7379f45a7bc71941c3920c2f6b3c3faa4d7fd315 +Author: Dirk Behme +Date: Wed Jan 28 21:40:16 2009 +0100 + + OMAP3: Add Zoom1 board support + + Support for Zoom MDK with OMAP3430. Details of Zoom MDK available here: + http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit + + Signed-off-by: Nishanth Menon + Signed-off-by: Jason Kridner + +commit 2be2c6cc674e26237962f5cf4c0d311e139e4241 +Author: Dirk Behme +Date: Wed Jan 28 21:39:58 2009 +0100 + + OMAP3: Add Pandora support + + Add Pandora support. + + Signed-off-by: Grazvydas Ignotas + Signed-off-by: Dirk Behme + Signed-off-by: Jason Kridner + +commit ad9bc8e52d174d699d1367be0b90089e4fdeb933 +Author: Dirk Behme +Date: Wed Jan 28 21:39:58 2009 +0100 + + OMAP3: Add EVM board + + Add EVM board support. + + Signed-off-by: Manikandan Pillai + Signed-off-by: Dirk Behme + Signed-off-by: Jason Kridner + +commit 9d0fc8110e7e755239329c26f300d5fc9946d3ec +Author: Dirk Behme +Date: Wed Jan 28 21:39:57 2009 +0100 + + OMAP3: Add Overo board + + Add Overo board support. + + Signed-off-by: Steve Sakoman + Signed-off-by: Dirk Behme + Signed-off-by: Jason Kridner + +commit f904cdbb68167c647887f19929ad295dbaac8862 +Author: Dirk Behme +Date: Tue Jan 27 18:19:12 2009 +0100 + + OMAP3: Add common power code, README, and BeagleBoard + + Add BeagleBoard support, common power code and README. + + Signed-off-by: Jason Kridner + Signed-off-by: Dirk Behme + +commit 9cda4f104b5313fadc21b75aa781c7a6aaf6ea60 +Author: Kumar Gala +Date: Wed Jan 28 08:31:10 2009 -0600 + + 85xx: Fix compile breakage with MPC8540EVAL + + Configuring for MPC8540EVAL board... + mpc8540eval.c: In function 'checkboard': + mpc8540eval.c:53: error: invalid operands to binary / + make[1]: *** [mpc8540eval.o] Error 1 + + Signed-off-by: Kumar Gala + +commit 1a448db77b10153703bc5e4ad13dd55d88beb1d6 +Author: Bryan Wu +Date: Sun Jan 18 23:04:27 2009 -0500 + + usb_scan_devices: fix output with no devices + + We should check the return of usb_new_device() so that if no USB device is + found, we print out the right message rather than always saying "new usb + device found". + + Signed-off-by: Bryan Wu + Signed-off-by: Mike Frysinger + Signed-off-by: Remy Bohmer + +commit f1c1f540243438246aefb703fdcf16957e3a72e1 +Author: Stefan Roese +Date: Thu Jan 22 10:11:21 2009 +0100 + + USB: Add high-speed (480Mb/s) to all USB related outputs + + With this patch the USB related connection speed output ("usb tree" command and + debug output) is now high-speed enabled. + + This patch also fixes a compilation warning when debugging is enabled. + + Signed-off-by: Stefan Roese + Signed-off-by: Remy Bohmer + +commit daa2dafb450a8073a4e42fd46cd4e995b208e4cb +Author: Stefan Roese +Date: Wed Jan 21 17:12:19 2009 +0100 + + USB: Add dcache support to the EHCI driver + + This patch adds routines to handle (flush/invalidate) the dcache for the + QH and qTD structures and data buffers. This is needed on platforms using + this EHCI support with dcache enabled (like the MIPS VCT board port). + + Signed-off-by: Stefan Roese + Signed-off-by: Remy Bohmer + +commit 4e0ea0efc1e501186aca8577a4042fc6fa641602 +Author: Stefan Roese +Date: Wed Jan 21 17:12:28 2009 +0100 + + USB: Add EHCI support for VCT EHCI controller + + Signed-off-by: Stefan Roese + Signed-off-by: Remy Bohmer + +commit 832e61418eedfea172bd2fdfd0ea0d199cc70a9d +Author: Stefan Roese +Date: Wed Jan 21 17:12:10 2009 +0100 + + USB: Add config option to call ehci_hcd_init() again after EHCI reset + + This patch adds the config option CONFIG_EHCI_HCD_INIT_AFTER_RESET + to call ehci_hcd_init() again after ehci_reset() is executed. This + is needed for the upcoming VCT EHCI support which needs to re-init + the hcd part again after the EHCI CMD_RESET is executed. + + Signed-off-by: Stefan Roese + Signed-off-by: Remy Bohmer + +commit 597eb28bd9691266b7b804364cda577cdb51d106 +Author: Stefan Roese +Date: Wed Jan 21 17:12:01 2009 +0100 + + USB: Fix speed detection on EHCI cntr with root hub transaction translators + + This patch fixes an issue that the speed of USB devices was not detected + correctly on some EHCI controllers. This will be used on the upcoming VCT + EHCI support. + + Signed-off-by: Stefan Roese + Signed-off-by: Remy Bohmer + +commit 20cc06611ea33fc0a67a5e56e6476379d2de3091 +Author: Thomas Abraham +Date: Sun Jan 4 09:41:20 2009 +0530 + + usb : musb : Enabling USB MSC support for DM6446 (TI DaVinci) platform + + Enabling USB MSC support for DM6446 (TI DaVinci) platform in the + configuration file. + + Signed-off-by: Ravi Babu + Signed-off-by: Swaminathan S + Signed-off-by: Thomas Abraham + Signed-off-by: Ajay Kumar Gupta + Signed-off-by: Remy Bohmer + +commit 538ef967715322f64ee08efa2296d9682111b014 +Author: Thomas Abraham +Date: Sun Jan 4 09:41:16 2009 +0530 + + usb : musb : Enabling DM6446 (TI DaVinci) USB module power + + Enabling DM6446 (TI DaVinci) USB module power and MUSB low-level + controller hook up to USB core layer. + + Signed-off-by: Ravi Babu + Signed-off-by: Swaminathan S + Signed-off-by: Thomas Abraham + Signed-off-by: Ajay Kumar Gupta + Signed-off-by: Remy Bohmer + +commit e142e9f35f8ec61e74bf8019428b003f5070c33b +Author: Thomas Abraham +Date: Sun Jan 4 09:41:13 2009 +0530 + + usb : musb : Adding DM6446 (TI DaVinci) platform specific USB support + + Adding DM6446 (TI DaVinci) platform specific USB functionality for + USB Phy and VBUS initialization. + + Signed-off-by: Ravi Babu + Signed-off-by: Swaminathan S + Signed-off-by: Thomas Abraham + Signed-off-by: Ajay Kumar Gupta + Signed-off-by: Remy Bohmer + +commit a9d39ebe91ecdd5ac0a0cf56ea162a19773db8da +Author: Thomas Abraham +Date: Sun Jan 4 09:41:09 2009 +0530 + + usb : musb : Adding USB VBUS enable functionality for DM644x DVEVM + + Adding USB VBUS enable functionality for DM644x DVEVM (TI DaVinci) + platform. + + Signed-off-by: Ravi Babu + Signed-off-by: Swaminathan S + Signed-off-by: Thomas Abraham + Signed-off-by: Ajay Kumar Gupta + Signed-off-by: Remy Bohmer + +commit a142896934c755e679ba87e227a8e449f39b0012 +Author: Thomas Abraham +Date: Sun Jan 4 09:41:03 2009 +0530 + + usb : musb : Adding host controller driver for Mentor USB controller + + Adding Mentor USB core functionality and Mentor USB Host controller + functionality for Mentor USB OTG controller (musbhdrc). + + Signed-off-by: Ravi Babu + Signed-off-by: Swaminathan S + Signed-off-by: Thomas Abraham + Signed-off-by: Ajay Kumar Gupta + Signed-off-by: Remy Bohmer + +commit c7d703f3f3c3d6b020bda4cf633f8a6167c3cd2a +Author: Mike Frysinger +Date: Thu Jan 1 18:27:27 2009 -0500 + + usb.h: use standard __LITTLE_ENDIAN from Linux headers + + Rather than forcing people to define a custom "LITTLEENDIAN", just use the + __LITTLE_ENDIAN one from the Linux byteorder headers that every arch is + already setting up. + + Signed-off-by: Mike Frysinger + Signed-off-by: Remy Bohmer + +commit 7b6e31eb17e3ff76238a60803fc531517d516223 +Author: Michael Trimarchi +Date: Wed Dec 31 10:33:56 2008 +0100 + + USB ehci ixp4xx support + + Add USB ehci ixp4xx host controller. Test on ixdp465 board. + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Bohmer + +commit 1ed9f9adc88218841dfeb60b9094a5a548bff009 +Author: Michael Trimarchi +Date: Wed Dec 31 10:33:22 2008 +0100 + + USB ehci remove infinite loop and use handshake function + + USB ehci code cleanup. Use handshake instead of infinite while loop + to check the STD_ASS status + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Bohmer + +commit 8fea2914ac974029b65926ef8247d908f84d202d +Author: Michael Trimarchi +Date: Wed Dec 31 10:32:41 2008 +0100 + + Add initial support for USB ehci pci + + Add USB ehci pci support. This patch doesn't include any + pci_ids and it is not tested on real hardware. + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Bohmer + +commit 14e4111cdab7e7738ff6a203d445e4d8377f058f +Author: Bryan Wu +Date: Thu Jan 1 19:48:07 2009 -0500 + + usb_storage: do not reset SanDisk Corporation U3 Cruzer Micro USB thumb drive + + The SanDisk Corporation U3 Cruzer Micro 1/4GB Flash Drive 000016244373FFB4 + does not like to be reset, so check for it. + + Signed-off-by: Bryan Wu + Signed-off-by: Mike Frysinger + Signed-off-by: Remy Bohmer + +commit 1eb734fed3b79a5e6106dad16e88041894fdab30 +Author: Thomas Abraham +Date: Sun Jan 4 12:15:35 2009 +0530 + + usb : usb_kbd : Populating 'priv' member of USB keyboard device_t structure + + This patch populates the 'priv' field of the USB keyboard device_t + structure. The 'priv' field is populated with the address of the + 'struct usb_device' structure that represents the USB device. + + The 'priv' field can then be used in the 'usb_event_poll' function to + determine the USB device that requires to be polled. An + example of its usage in 'usb_event_poll' function is as below. + + device_t *dev; + struct usb_device *usb_kbd_dev; + + + + dev = device_get_by_name("usbkbd"); + usb_kbd_dev = (struct usb_device *)dev->priv; + iface = &usb_kbd_dev->config.if_desc[0]; + + Signed-off-by: Thomas Abraham + Signed-off-by: Remy Bohmer + +commit 366523c26b6320af171459b19e6e0e9e3baa83ca +Author: Michael Trimarchi +Date: Thu Dec 18 10:05:37 2008 +0100 + + USB change speed + + USB changes the speed according to the port status + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Bohmer + +commit c0d722fe7ee1cb452dfd9246419188b3f6d9c4df +Author: Remy Böhmer +Date: Sat Dec 13 22:51:58 2008 +0100 + + EHCI fix code and ixp4xx test. + USB ehci configuration parameter: + + #define CONFIG_CMD_USB 1 + #define CONFIG_USB_STORAGE 1 + #define CONFIG_USB_EHCI + #define CONFIG_USB_EHCI_IXP4XX 1 + #define CONFIG_EHCI_IS_TDI 1 + #define CONFIG_EHCI_DESC_BIG_ENDIAN 1 + #define CONFIG_EHCI_MMIO_BIG_ENDIAN 1 + #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 2 + #define CONFIG_LEGACY_USB_INIT_SEQ 1 + + 2 USB Device(s) found + scanning bus for storage devices... 0 Storage Device(s) found + => usb tree + + Device Tree: + 1 Hub (1.5MBit/s, 0mA) + | u-boot EHCI Host Controller + | + |+-2 Mass Storage (12MBit/s, 100mA) + Sony Storage Media 0C07040930296 + + => + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit 51ab142b8b546d5e627b2c8c36d0adae222565f7 +Author: michael +Date: Thu Dec 11 13:43:55 2008 +0100 + + [PATCH] This patch add varius fix to the ehci. + - fix ehci_readl, ehci_writel + - introduce new define in ehci.h + - introduce the handshake function for waiting on a register + - fix usb_ehci_fsl with the new HC_LENGTH macro + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit db63299b1dd2894ade542278210bccd046de6435 +Author: michael +Date: Wed Dec 10 17:55:19 2008 +0100 + + [PATCH] Fix EHCI usb. I start to test on a + IXP465 board and I find some errors in the code. This + patch fix: + - descriptor initizialization (config, interface and endpoint + must be one next-to the other when the USB_DT_CONFIG message + is send. + - FIX little/endian bigendian (introduce the CONFIG_EHCI_DESC_BIG_ENDIAN + and the CONFIG_EHCI_MMIO_BIG_ENDIAN) + - Introduce the linux version of the usb_config_descriptor and + usb_interface descriptor. This descriptor does't contains + u-boot extension. + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit 6b92487dcf9afe83a3570153d66940fdb293be76 +Author: Michael Trimarchi +Date: Fri Nov 28 13:22:09 2008 +0100 + + USB ehci freescale support + + Add USB ehci freescale support + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit aaf098cfeed04595d4c5100ffd39095d79edbf90 +Author: Michael Trimarchi +Date: Fri Nov 28 13:20:46 2008 +0100 + + USB ehci core support + + Add USB ehci core support + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit 3e126484df7868e341545cce740b24b62b0cd3b7 +Author: Michael Trimarchi +Date: Fri Nov 28 13:19:19 2008 +0100 + + Prepare USB layer for ehci + + Prepare USB layer for ehci support + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Böhmer + +commit a0cb3fc31e58996a1c5732715ac04159d4d284fd +Author: Michael Trimarchi +Date: Wed Dec 10 15:52:06 2008 +0100 + + USB storage cleanup patch + + Cleanup usb storage + + Signed-off-by: Michael Trimarchi + Signed-off-by: Remy Bohmer + +commit fe033ad6d0883063fe857237abb9436fab03208c +Author: Mike Frysinger +Date: Sun Oct 12 06:02:55 2008 -0400 + + Blackfin: fixup misc warnings such as printf's and missing casts + + Signed-off-by: Mike Frysinger + +commit 1f4a3bb50343719c434d7e2541a2f86480a6d25c +Author: Mike Frysinger +Date: Sun Oct 12 22:09:26 2008 -0400 + + Blackfin: convert old boards to use COBJS-y Makefile style + + Signed-off-by: Mike Frysinger + +commit 1f75d6f0ff005762d3e6ad92ae4ce2ab366b3bb5 +Author: Mike Frysinger +Date: Sat Oct 11 22:38:37 2008 -0400 + + Blackfin: bf533-stamp: rewrite resource swap logic + + The old swap function tended to clobber unrelated pins and screw up masks. + Rewrite the thing from scratch so it only uses the resources it needs. + + Signed-off-by: Mike Frysinger + +commit 29d4ea0a9073c82469184331010136f52edf8db6 +Author: Mike Frysinger +Date: Sat Oct 11 22:08:42 2008 -0400 + + Blackfin: bootldr: implement BF53x/BF56x LDR loader + + The BF53x/BF56x parts do not have an on-chip ROM to boot LDRs out of + arbitrary memory locations, so implement a basic one in software. + + Signed-off-by: Mike Frysinger + +commit 8b35e3aeff6c2d747c37697997b3f8a808432329 +Author: Mike Frysinger +Date: Sat Oct 11 22:05:42 2008 -0400 + + Blackfin: implement real write support for OTP + + Now that real documentation has been released for the OTP interface and + the on-chip ROM wrt writing/timings, implement support for reading/writing + as well as dumping/locking. + + Signed-off-by: Mike Frysinger + +commit 9372c3214808fab545227d8d0f76b3bfcc6760ec +Author: Mike Frysinger +Date: Sat Oct 11 22:04:05 2008 -0400 + + Blackfin: update on-chip ROM API + + This brings the API for the on-chip ROM in line with the toolchain and + hardware documentation. + + Signed-off-by: Mike Frysinger + +commit 7633903bff432ec7b27905dce7396958553f2be6 +Author: Mike Frysinger +Date: Sat Oct 11 21:52:17 2008 -0400 + + Blackfin: allow serial console to be disabled + + Some devices have no UART device pulled out, so allow people to disable the + driver completely in favor of other methods (like JTAG-console). + + Signed-off-by: Mike Frysinger + +commit 36ea8e9ad1107af12d244bba8c73e85b9f655e45 +Author: Mike Frysinger +Date: Sat Oct 11 21:51:20 2008 -0400 + + Blackfin: support console-over-JTAG + + The Blackfin JTAG has the ability to pass data via a back-channel without + halting the processor. Utilize that channel to emulate a console. + + Signed-off-by: Mike Frysinger + +commit cf8f2efb5f39c5225da92391c14a07eecbeca881 +Author: Mike Frysinger +Date: Sat Oct 11 21:49:06 2008 -0400 + + Blackfin: handle new anomalies with reset + + Workaround fun new anomalies related to software reset of the processor. + + Signed-off-by: Mike Frysinger + +commit b1e9435b643043dd8fbd1fcc47309c6acb7b3c8e +Author: Mike Frysinger +Date: Sat Oct 11 21:44:00 2008 -0400 + + Blackfin: pass RETX to Linux + + Make sure we save the value of RETX at power on and then pass it on to the + kernel so that it can nicely debug a "double-fault-caused-a-reset" crash. + + Signed-off-by: Mike Frysinger + +commit b5eba3fafcccd1979380f12a256bd0e19be3d61e +Author: Mike Frysinger +Date: Sat Oct 11 21:40:26 2008 -0400 + + Blackfin: clarify relocation comment during init + + People often ask questions about the init process and when things go + from flash to relocated base, so clarify the comments a bit. + + Signed-off-by: Mike Frysinger + +commit 95433f6d43ede6b40c1d900f3f704c839aa074f1 +Author: Mike Frysinger +Date: Sat Oct 11 21:23:41 2008 -0400 + + Blackfin: just set SP register directly during init + + No need to set the SP register indirectly to the configured value when it + can be set directly. + + Signed-off-by: Mike Frysinger + +commit 51230e6e356ccf4c932e0c4ff54f1e49da02285c +Author: Mike Frysinger +Date: Sat Oct 11 21:15:53 2008 -0400 + + Blackfin: add portmuxing for UARTs on the BF51x + + Signed-off-by: Mike Frysinger + +commit 4f6a313240c531042f16909a3a170ab047b95779 +Author: Mike Frysinger +Date: Sun Jun 1 01:26:29 2008 -0400 + + Blackfin: respect CONFIG_CLKIN_HALF + + As pointed out by Ivan Koryakovskiy, the initialization code was not + actually respecting the CONFIG_CLKIN_HALF option when configuring the + PLL_CTL register. + + Signed-off-by: Mike Frysinger + +commit dc2bfb0b58d7462b9eba68f3ae38e38cada0ad33 +Author: Mike Frysinger +Date: Sun Jun 1 01:21:34 2008 -0400 + + Blackfin: use common memcpy routine during init + + Rather than using a local custom memcpy function, just call the existing + optimized Blackfin version. + + Signed-off-by: Mike Frysinger + +commit 362c943347364e9373af4c5530778491ab56ec2e +Author: Mike Frysinger +Date: Wed Apr 9 02:27:06 2008 -0400 + + Blackfin: set default boot SPI CS for BF538/BF539 + + The BF538/BF539 use CS2 for booting off of rather than CS1 like newer + Blackfin parts. + + Signed-off-by: Mike Frysinger + +commit 74dde80bd5d55bc146630853ca191aaeea7c30f4 +Author: Mike Frysinger +Date: Wed Apr 9 02:20:59 2008 -0400 + + Blackfin: punt unused BF533-STAMP definitions + + Signed-off-by: Mike Frysinger + +commit fee531eeefc3b5f2c63c7fe27b9f55d924c59c26 +Author: Mike Frysinger +Date: Fri Apr 18 20:44:11 2008 -0400 + + Blackfin: resurrect BF533-STAMP video splash driver + + This video driver used to live in the Blackfin cpu directory, but it was + lost during the unification process. This brings it back. + + Signed-off-by: Mike Frysinger + +commit a750d038f2548d846ea1e046d873dc932d041319 +Author: Mike Frysinger +Date: Wed Apr 9 02:31:29 2008 -0400 + + Blackfin: tighten up post memory coding style + + No functional changes here; just cleanup code style a bit. + + Signed-off-by: Mike Frysinger + +commit 0649908f92c9bd214dd139aa3d4698c1654a45c6 +Author: Mike Frysinger +Date: Wed Apr 9 02:29:18 2008 -0400 + + Blackfin: bf537-stamp nand: fix more style errors in previous commit + + Signed-off-by: Mike Frysinger + +commit 41f3325ae9add641036d7cb362e884b698e53f07 +Author: Mike Frysinger +Date: Sat Oct 11 20:31:17 2008 -0400 + + Blackfin: drop dead/wrong debug code in initdram() + + The DEBUG code in initdram() is quite old and was never really useful, so + just drop it altogether. Common Blackfin debug code does a better job. + + Signed-off-by: Mike Frysinger + +commit 65ba1abd3b90e0b2585745809b78e2651bd3bacb +Author: Mike Frysinger +Date: Sat Oct 11 20:30:28 2008 -0400 + + Blackfin: bf533-ezkit: shuffle flash defines a little + + Some of the flash defines weren't in the correct location and caused build + problems in some configurations, so let's move types and defines to better + local locations. + + Signed-off-by: Mike Frysinger + +commit be853bf86b41e91f4c422f0f56fdf87ea3191266 +Author: Mike Frysinger +Date: Mon Oct 6 04:16:47 2008 -0400 + + Blackfin: overhaul i2c driver + + The current Blackfin i2c driver does not work properly with certain devices + due to it breaking up transfers incorrectly. This is a rewrite of the + driver and relocates it to the newer place in the source tree. + + Also remove duplicated I2C speed defines in Blackfin board configs and + disable I2C slave address usage since it isn't implemented. + + Signed-off-by: Mike Frysinger + +commit b6edc719a106ab7fa6e6950b4d97bc39c1368e45 +Author: Mike Frysinger +Date: Mon Oct 6 04:00:07 2008 -0400 + + Blackfin: respect CONFIG_SYS_MONITOR_LEN for default flash protection + + Respect the CONFIG_SYS_MONITOR_LEN define rather than assuming a size of + 128kB when setting up the default flash protection region for U-Boot + itself. + + Signed-off-by: Mike Frysinger + +commit 78a0ba7dc24c9682371f6ee8549b569fb573a329 +Author: Mike Frysinger +Date: Mon Oct 6 03:57:39 2008 -0400 + + Blackfin: respect/check CONFIG_SYS_GBL_DATA_SIZE + + When setting up the global data, rather than relying on sizeof(), use the + common CONFIG_SYS_GBL_DATA_SIZE define. + + Signed-off-by: Mike Frysinger + +commit 01815c2d06c5b838f2cd536703e47bd2c9148194 +Author: Mike Frysinger +Date: Mon Oct 6 03:52:24 2008 -0400 + + Blackfin: implement general support for CONFIG_STATUS_LED + + Here are the Blackfin-specific and board-independent pieces for status leds. + + Signed-off-by: Mike Frysinger + +commit 6882b5a79a3247494b62c05015fa672557f1bfaa +Author: Mike Frysinger +Date: Mon Oct 6 03:49:32 2008 -0400 + + Blackfin: do not init i2c in Blackfin board init + + The common code takes care of calling i2c_init() when needed, so no point + in us doing it as well. + + Signed-off-by: Mike Frysinger + +commit 1118ea73698eee6e72ef5cbfc00e41746040304f +Author: Mike Frysinger +Date: Mon Oct 6 03:42:20 2008 -0400 + + Blackfin: bfin_mac: update port muxing + + Adds support more Blackfin parts and fixes broken muxing for older ones. + + Signed-off-by: Mike Frysinger + +commit 05b75e48832fc4afeecf8e76d704349557dffa35 +Author: Mike Frysinger +Date: Mon Oct 6 03:35:44 2008 -0400 + + Blackfin: fix dcache handling when doing dma memcpy's + + Our dcache invalidate function doesn't just invalidate, it also flushes. + So rename the function accordingly and fix the dma_memcpy() function so it + doesn't inadvertently corrupt the data destination. + + Signed-off-by: Mike Frysinger + +commit 68e5632494168095d75f120af70043b68afd2476 +Author: Mike Frysinger +Date: Thu Aug 7 18:56:56 2008 -0400 + + Blackfin: dont generate ldrs with --force + + Signed-off-by: Mike Frysinger + +commit 746290dfd86a70b41fc5fdd3df1424a647d5c5e8 +Author: Mike Frysinger +Date: Thu Aug 7 18:55:30 2008 -0400 + + Blackfin: pass --bmode/--initcode when creating ldr + + Signed-off-by: Mike Frysinger + +commit 0332e4df71fccf9a96c5a4393e3c5d5daa50880a +Author: Mike Frysinger +Date: Thu Aug 7 18:39:27 2008 -0400 + + Blackfin: minimize time cache is turned off when replacing cplb entries + + Signed-off-by: Mike Frysinger + +commit 21d631360430cf0ae9099612273cd4de28911ba9 +Author: Mike Frysinger +Date: Thu Aug 7 15:31:13 2008 -0400 + + Blackfin: split cache handling out of dma_memcpy() + + Creating a new dma_memcpy() function that skips all cache checks allows us + to use the function in very early init where the cache is not yet setup. + + Signed-off-by: Mike Frysinger + +commit d31eb38512bed377d5d4b3c696662e52120a2e4c +Author: Mike Frysinger +Date: Thu Aug 7 15:30:49 2008 -0400 + + Blackfin: abort dma_memcpy() for L1 scratchpad + + Signed-off-by: Mike Frysinger + +commit 81b799add709177e838466461f7b9989488b0fd5 +Author: Mike Frysinger +Date: Thu Aug 7 15:27:52 2008 -0400 + + Blackfin: rename bootm.c to boot.c + + The boot file contains functions for more than just "bootm", so rename it + accordingly. + + Signed-off-by: Mike Frysinger + +commit d7ca7dd5bfc418ac173e9d2712f6cc2d8147a091 +Author: Mike Frysinger +Date: Thu Aug 7 13:22:37 2008 -0400 + + Blackfin: set more sane default board config values + + Signed-off-by: Mike Frysinger + +commit 36cd52a00794fb15ffab05d640acca92d7482993 +Author: Mike Frysinger +Date: Thu Aug 7 15:24:59 2008 -0400 + + Blackfin: convert CMD_LINE_ADDR to CONFIG_LINUX_CMDLINE_{ADDR,SIZE} + + Signed-off-by: Mike Frysinger + +commit c8054bc12e00669bd7588f2b30fef48aa94babac +Author: Mike Frysinger +Date: Thu Aug 7 13:21:27 2008 -0400 + + Blackfin: add bit defines for DDR parts + + Signed-off-by: Mike Frysinger + +commit 154502fe0796f3b7a4698378c5d2080ae28a9782 +Author: Mike Frysinger +Date: Thu Aug 7 13:21:11 2008 -0400 + + Blackfin: add defines to describe active bootrom behavior + + Signed-off-by: Mike Frysinger + +commit 2b6fd5c77db9c6ed3cea9799c86ff922cf0107b2 +Author: Kim Phillips +Date: Tue Jan 27 16:03:53 2009 -0600 + + mpc83xx: fix undefined reference to `flush_cache' error in simpc8313 build + + extend commit c70564e6b1bd08f3230182392238907f3531a87e + "NAND: Fix cache and memory inconsistency issue" to add the cache.o dependency + to the simpc8313 build and fix this: + + ...Large Page NAND...Configuring for SIMPC8313 board... + nand_boot_fsl_elbc.o: In function `nand_boot': + nand_spl/board/sheldon/simpc8313/nand_boot_fsl_elbc.c:150: undefined reference to `flush_cache' + make[1]: *** [/home/r1aaha/git/u-boot-mpc83xx/nand_spl/u-boot-spl] Error 1 + make: *** [nand_spl] Error 2 + + Signed-off-by: Kim Phillips + +commit 54a7cc4912feefa45be961cc47cc159563725d2f +Author: Wolfgang Denk +Date: Wed Jan 28 09:25:31 2009 +0100 + + mpc8536ds.c: include sata.h to for needed function prototypes + + Signed-off-by: Wolfgang Denk + +commit 2fb2604d5c20beb061b0a94282b7f6eb14d00cb8 +Author: Peter Tyser +Date: Tue Jan 27 18:03:12 2009 -0600 + + Command usage cleanup + + Remove command name from all command "usage" fields and update + common/command.c to display "name - usage" instead of + just "usage". Also remove newlines from command usage fields. + + Signed-off-by: Peter Tyser + +commit 79621bc10ba8b8c45d348994aba5b9e4923cb77b +Author: Peter Tyser +Date: Tue Jan 27 18:03:11 2009 -0600 + + amcc: Clean up command usage output + + Update taihu and taishan commands to use cmd_usage() function + to display usage messages. + + Signed-off-by: Peter Tyser + +commit 62c3ae7c6ef215b1afa614abdf61acf077752207 +Author: Peter Tyser +Date: Tue Jan 27 18:03:10 2009 -0600 + + Standardize command usage messages with cmd_usage() + + Signed-off-by: Peter Tyser + +commit 84cde2bb409c07c6ef36a192d194359d4e9ccd70 +Author: Peter Tyser +Date: Tue Jan 27 18:03:09 2009 -0600 + + pcs440ep: Clean up led command definition + + The pcs440ep's led command usage formatting is non-standard. It + was made standard in preparation for larger command usage updates. + + Signed-off-by: Peter Tyser + +commit 9507e7867e04dc48c80ee333c2a9a5e70e887f62 +Author: Peter Tyser +Date: Tue Jan 27 18:03:08 2009 -0600 + + Clean up diufb command definitions + + The diufb command usage formatting is non-standard. It was + made standard in preparation for larger command usage updates. + + Signed-off-by: Peter Tyser + +commit 6450a8485836fc80615ae6de6a864c33369b44f5 +Author: Wolfgang Denk +Date: Wed Jan 28 00:29:26 2009 +0100 + + Update CHANGELOG, tiny coding style cleanup. + + Signed-off-by: Wolfgang Denk + +commit cf7e399fb35b3aea90a27d1df72f45f5d6156204 +Author: Mike Frysinger +Date: Tue Jan 27 16:12:21 2009 -0500 + + SATA: do not auto-initialize during boot + + Rather than have the board code initialize SATA automatically during boot, + make the user manually run "sata init". This brings the SATA subsystem in + line with common U-Boot policy. + + Rather than having a dedicated weak function "is_sata_supported", people + can override sata_initialize() to do their weird board stuff. Then they + can call the actual __sata_initialize(). + + Signed-off-by: Mike Frysinger + +commit 50970839712dda35399e2fa83fe818df9354d618 +Author: Richard Retanubun +Date: Mon Jan 26 08:45:14 2009 -0500 + + part_efi: Fix partition size calculation due to inclusive ending LBA. + + The ending LBA is inclusive. Hence, the partition size should be + ((ending-LBA + 1) - starting-LBA) to get the proper partition size. + + This is confirmed against the results from the parted tool. + (e.g. use parted /dev/sda -s unit S print) and observe the size. + + Signed-off-by: Richard Retanubun + +commit b5b004ad8a0ac6f98bd5708ec8b22fbddd1c1042 +Author: Tomasz Figa +Date: Tue Dec 30 18:35:57 2008 +0100 + + jffs2: Fix zero sector_size when not using CONFIG_JFFS2_CMDLINE + + This patch fixes a bug (?) introduced after inclusion of the new + JFFS2 code. + + When not using CONFIG_JFFS2_CMDLINE, the code in cmd_jffs2.c doesn't + fill in part->sector_size (keeping it as 0), but a correct value is + needed by the code in jffs2_1pass.c. This causes all JFFS2 accesses + to be in the same place of the memory, what obviously means + impossibility to use the JFFS2 partition. + + This problem is fixed in this patch by including sector size + calculation in non-CONFIG_JFFS2_CMDLINE mtdparts_init variant. + + Signed-off-by: Tomasz Figa + +commit ba69dc26a5fd606da49573bb2f15e756a34f3f98 +Author: Mike Frysinger +Date: Tue Dec 30 02:59:25 2008 -0500 + + saveenv: standardize enablement + + Rather than special casing each environment type for enabling the saveenv + command, have them all behave the same. This avoids bitrot as new env + sources are added/removed. + + Signed-off-by: Mike Frysinger + +commit 2ac6985a7466a1c8a7aa8b2fa24d360925a82764 +Author: Andrew Dyer +Date: Mon Dec 29 17:36:01 2008 -0600 + + soft_i2c.c add option for repeated start in i2c_read() + + This patch adds a #define to optionally change the behaviour of + i2c_read() in soft_i2c.c to send an I2C repeated start instead of a + stop-start between sending the device address pointer write and + reading back the data. The current behaviour is retained as the + default. + + While most devices will work either way, I have a smart battery(*) + that requires repeated start, and someone at some point found a + device that required a stop-start. + + (*) http://www.inspired-energy.com/Standard_Products/NL2054/NL2054%20Rev1.0%20Data%20Sheet.pdf + + Signed-off-by: Andrew Dyer + +commit 3429071700963ca2f944c51d695a7481af0cee33 +Author: Wolfgang Denk +Date: Tue Jan 27 22:07:14 2009 +0100 + + {delta,zylonite}/lowlevel_init.S: fix typo + + Commit 9d803d8c mistakenly changed some constants + from 0x300 into 300 - this patch fixes it. + + Pointed out by Tom Evans , see + http://article.gmane.org/gmane.comp.boot-loaders.u-boot/51992 for + details. + + Signed-off-by: Wolfgang Denk + +commit 1bc434373013af241835c14011ac3f291dccbf53 +Author: Stefan Althoefer +Date: Sat Dec 20 19:40:41 2008 +0100 + + drivers/net/e1000.c: missing terminator for supported devices + + Signed-off-by: Stefan Althoefer + +commit 65f7d41031a70b1649b35020995c505edca91533 +Author: Wolfgang Denk +Date: Tue Jan 27 21:36:28 2009 +0100 + + fat.c: fix warning: array subscript is above array bounds + + Fix based on suggestion by David Hawkins . + + Signed-off-by: Wolfgang Denk + +commit 107b801cf3fe39612d69d70581ebc3bf5e215554 +Author: Matthias Fuchs +Date: Fri Jan 2 15:11:41 2009 +0100 + + Fix gunzip in case of insufficient output buffer + + U-Boot's gunzip() function does not handle the return code + of zlib's inflate() function correctly. gunzip() is implemented + to uncompress all input data in one run. So the correct return + code for the good case is Z_STREAM_END. In case of insufficient + output buffer memory inflate returns Z_OK. For gunzip() this + is an error. + + It also makes sense to me to call inflateEnd() also in case + of an error. + + Signed-off-by: Matthias Fuchs + +commit 2a61eff6a82f0d6e2335d968799b3fbeb3ff4d8e +Author: Stefan Roese +Date: Wed Jan 21 17:25:01 2009 +0100 + + MIPS: Add VCT board series support (Part 3/3) + + Signed-off-by: Stefan Roese + +commit ae691e5719c48f1d2826cb72722497d1d162765b +Author: Stefan Roese +Date: Wed Jan 21 17:24:49 2009 +0100 + + MIPS: Add VCT board series support (Part 2/3) + + Signed-off-by: Stefan Roese + +commit 50752790bc9285c0c1c5235e88f3a4ef2eec1e72 +Author: Stefan Roese +Date: Wed Jan 21 17:24:39 2009 +0100 + + MIPS: Add VCT board series support (Part 1/3) + + Signed-off-by: Stefan Roese + +commit 03d3bfb00806b5441f1871c7408c1749863e0fdc +Author: Stefan Roese +Date: Wed Jan 21 17:20:20 2009 +0100 + + MIPS: Add flush_dcache_range() and invalidate_dcache_range() + + This patch adds flush_/invalidate_dcache_range() to the MIPS architecture. + Those functions are needed for the upcoming dcache support for the USB + EHCI driver. I chose this API because those cache handling functions are + already present in the PPC architecture. + + Signed-off-by: Stefan Roese + Signed-off-by: Shinya Kuribayashi + +commit de832a99414ff06a4b2cdc9f5280b387da039834 +Author: Stefan Roese +Date: Mon Jan 26 10:05:20 2009 +0100 + + nand_spl: Fix compile problem with board_nand_init() prototype + + This patch removes the now obsolete and additionally wrongly defined + board_nand_init() prototype from nand_spl/nand_boot.c. + + Signed-off-by: Stefan Roese + Signed-off-by: Scott Wood + +commit e8eac437189430d8e04a5d254ed92c58bc534a79 +Author: Richard Retanubun +Date: Wed Jan 14 08:44:26 2009 -0500 + + CFI: Add geometry reversal for STMicro M29W320ET + + Added flash_fixup_stm to fix geometry reversal on STMicro M29W320ET flash chip. + + Modeled after flash_fixup_amd, this patch handles the geometry reversal + or erase sectors that exist for ST Micro (now Numonyx) M29W320ET flash. + Since I cannot test all STM's chips, the detection is implemented as + narrow as possible for now. + + Signed-off-by: Richard Retanubun + Signed-off-by: Stefan Roese + +commit 0f8e851e897b535959a0781171910cd97f33c30c +Author: Jens Gehrlein +Date: Tue Dec 16 17:25:55 2008 +0100 + + CFI: increase performance of function find_sector() + + Tested on TQM5200S-BD with Samsung K8P2815UQB + + Signed-off-by: Jens Gehrlein + Signed-off-by: Stefan Roese + +commit a7292871a79cc48d98e3a708dd3c3b81580db6ef +Author: Jens Gehrlein +Date: Tue Dec 16 17:25:54 2008 +0100 + + CFI: avoid redundant function call in single word programming mode + + The function find_sector() doesn't need to be called twice in + the case of AMD command set. + Tested on TQM5200S-BD with Samsung K8P2815UQB. + + Signed-off-by: Jens Gehrlein + Signed-off-by: Stefan Roese + +commit c8901f46a71ec16e084e604596a09e23bfb0f6ac +Author: Stefan Roese +Date: Mon Jan 26 10:15:23 2009 +0100 + + ppc4xx: Remove compilation warning in gdppc440etc.c + + Signed-off-by: Stefan Roese + +commit 91f33534728e6416d332ad2b53ad1d6fde57f7fc +Author: Matthias Fuchs +Date: Fri Jan 2 12:19:47 2009 +0100 + + ppc4xx: Remove CONFIG_SYS_IGNORE_405_UART_ERRATA_59 from config files + + Lot's of 405 board config files use CONFIG_SYS_IGNORE_405_UART_ERRATA_59. + Either they define or undef it. Because it's not used in any source + files this patch removes any references to it. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 89b8619aaeafc922ca0c3bb249872591050c8dcc +Author: Dirk Eibach +Date: Tue Dec 9 13:12:40 2008 +0100 + + ppc4xx: Add GDsys PowerPC 440 ETX board support. + + Board support for the Guntermann & Drunck PowerPC 440 ETX module. + Based on the AMCC Yosemite board support by Stefan Roese. + + Signed-off-by: Dirk Eibach + Signed-off-by: Stefan Roese + +commit 3943d2ff6cc40dd601a9feeb39eb6d3d5090ea6d +Author: Dirk Eibach +Date: Tue Dec 9 11:00:07 2008 +0100 + + ppc4xx: Improve DDR autodetect + + Added support for a second memory bank to DDR autodetection for 440 + platforms. + Made hardcoded values configurable. + + Signed-off-by: Dirk Eibach + Signed-off-by: Stefan Roese + +commit 71a040f4f556cca4d30f06805d82e717b3ef1020 +Author: Nobuhiro Iwamatsu +Date: Fri Nov 21 12:06:26 2008 +0900 + + sh: sh7763rdp: Update sh7763rdp config + + Add CONFIG_NET_MULTI in config file, because sh_eth changed new newwork API. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Ben Warren + +commit ba705b5b1a97b47388ed48858bef6bf7b6bfcd56 +Author: Gary Jennejohn +Date: Thu Nov 20 12:28:38 2008 +0100 + + mgcoge make ether_scc.c work with CONFIG_NET_MULTI + + This change is needed for mgcoge because it uses two ethernet drivers. + + Add a check for the presence of the PIGGY board on mgcoge. Without this + board networking cannot work and the initialization must be aborted. + + Only allocate rtx once to prevent DPRAM exhaustion. + + Initialize ether_scc.c and the keymile-specific HDLC driver (to be added + soon) in eth.c. + + Signed-off-by: Gary Jennejohn + Signed-off-by: Ben Warren + +commit bd3980cc095af1728b994cdd8bf1ac430b6289e6 +Author: Nobuhiro Iwamatsu +Date: Fri Nov 21 12:04:18 2008 +0900 + + sh: sh_eth: Change new network API + + sh_eth used old network API. This patch changed new API. + + Signed-off-by: Nobuhiro Iwamatsu + Signed-off-by: Ben Warren + +commit 890a02e8ee6b8c26a6e3e505e1a2d29cd73aa6f6 +Author: Stefan Roese +Date: Wed Nov 12 13:31:02 2008 +0100 + + net: smc911x: Make register read/write functions weak + + This patch changes the reg_read/_write to smc911x_reg_read/_write + and defines then as weak so that they can be overridden by board + specific version. + + This will be used by the upcoming VCTH board support. + + Signed-off-by: Stefan Roese + Signed-off-by: Ben Warren + +commit 8b69b563039989885969d24465c56f8ac4c07c4c +Author: Heiko Schocher +Date: Thu Nov 20 09:57:14 2008 +0100 + + powerpc: net: support for the SMSC LAN8700 PHY + + Signed-off-by: Heiko Schocher + Signed-off-by: Ben Warren + +commit d5254f149da9e6cd649d887b042ce577ef3ba78d +Author: Alessandro Rubini +Date: Sat Jan 24 18:10:37 2009 +0100 + + Initial support for Nomadik 8815 development board + + The NMDK8815 board is distributed by ST Microelectornics. + Other (proprietary) code must be run to unlock the CPU before + U-Boot runs. doc/README.nmdk8815 outlines the boot sequence. + + This is the initial port, with basic infrastructure and + a working serial port. + + Signed-off-by: Alessandro Rubini + Acked-by: Andrea Gallo + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 7d264c1ef267cfc8d928bc8577a7cc907f2f5e47 +Author: Dirk Behme +Date: Sun Dec 14 09:47:18 2008 +0100 + + OMAP3: Add I2C support + + Add I2C support. + + Signed-off-by: Dirk Behme + +commit b1c3bf99fb477675d464aeadb5dd69d2cbc9dc7b +Author: Dirk Behme +Date: Sun Dec 14 09:47:17 2008 +0100 + + OMAP3: Add MMC support + + Add MMC support. + + Signed-off-by: Dirk Behme + +commit 12201a13547ec22ddcdae278e74465e54a3be60c +Author: Dirk Behme +Date: Sun Dec 14 09:47:16 2008 +0100 + + OMAP3: Add NAND support + + Add NAND support. + + Signed-off-by: Nishanth Menon + Signed-off-by: Syed Mohammed Khasim + Signed-off-by: Dirk Behme + +commit 91eee546737ae21d930af479530997174c342b13 +Author: Dirk Behme +Date: Sun Dec 14 09:47:15 2008 +0100 + + OMAP3: Add common board, interrupt and system info + + Add common board, interrupt and system info code. + + Signed-off-by: Dirk Behme + +commit 5ed3e8659e5373f6a229877ac506c0b00a054fb8 +Author: Dirk Behme +Date: Sun Dec 14 09:47:14 2008 +0100 + + OMAP3: Add common clock, memory and low level code + + Add common clock, memory and low level code + + Signed-off-by: Dirk Behme + +commit 0b02b184003e6a5023e05d5f31de54db279b1431 +Author: Dirk Behme +Date: Sun Dec 14 09:47:13 2008 +0100 + + OMAP3: Add common cpu and start code + + Add common cpu and start code. + + Signed-off-by: Dirk Behme + +commit a8b6450546cd507d331b8fde384791d84bde5651 +Author: Dirk Behme +Date: Sun Dec 14 09:47:12 2008 +0100 + + OMAP3: Add OMAP3, memory and function prototype headers + + Add OMAP3, memory and function prototype header files for OMAP3. + + Signed-off-by: Dirk Behme + +commit 2c803210a464abbac35752ca1c737514360b4c32 +Author: Dirk Behme +Date: Sun Dec 14 09:47:11 2008 +0100 + + OMAP3: Add pin mux, clock and cpu headers + + Add pin mux, clock and cpu header files for OMAP3. + + Signed-off-by: Dirk Behme + +commit 685533646f4ff17a84ec9265cabb60af325b6e1f +Author: Maxim Artamonov +Date: Wed Dec 3 05:38:17 2008 +0300 + + bugfix for i.mx31 CCM_UPCTL reg + + Signed-off-by: Maxim Artamonov + +commit 24113a44ed5cd3257a0237c3961e121812fca6db +Author: Mike Frysinger +Date: Tue Dec 30 03:15:38 2008 -0500 + + easylogo: add optional gzip support + + Some images can be quite large, so add an option to compress the + image data with gzip in the U-Boot image. Then at runtime, the + board can decompress it with the normal zlib functions. + + Signed-off-by: Mike Frysinger + +commit 7e4b9b4f6f43838fad3ad72c029a3d7fc7c7d48c +Author: Bryan Wu +Date: Fri Jan 2 20:47:45 2009 -0500 + + fat: fix unaligned errors + + A couple of buffers in the fat code are declared as an array of bytes. + But it is then cast up to a structure with 16bit and 32bit members. + Since GCC assumes structure alignment here, we have to force the + buffers to be aligned according to the structure usage. + + Signed-off-by: Bryan Wu + Signed-off-by: Mike Frysinger + +commit 68f8718df2ed4c2f43031407ccf6cfa81125dddc +Author: Brad Bozarth +Date: Thu Jan 1 22:45:47 2009 -0500 + + spi flash: fix crash due to spi flash miscommunication + + Higher spi flash layers expect to be given back a pointer that was + malloced so that it can free the result, but the lower layers return + a pointer that is in the middle of the malloced memory. Reorder the + members of the lower spi structures so that things work out. + + Signed-off-by: Brad Bozarth + Signed-off-by: Mike Frysinger + Acked-by: Haavard Skinnemoen + +commit ce82ff05388b5ddafdf6082ef0776cce72c40b1c +Author: Yuri Tikhonov +Date: Sat Dec 20 14:54:21 2008 +0300 + + FPU POST: fix warnings when building with 2.18 binutils + + When compile u-boot with the 2.18 binutils the following + warning messages for each object file in post/lib_ppc/fpu/ is + produced at the linking stage: + + post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float + ... + + This is because of the fact that, in general, the soft-float and + hard-float ABIs are incompatible; the 2.18 binutils do checking + of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and + produce the worning like above if these are not compatible. + + The incompatibility of ABIs is concerned only the float values: + e.g. the soft-float ABI assumes the float argument passing in the + pair of rX registers, and the hard-float ABI assumes passing of + the float argument in the fX register. When we don't pass the float + arguments between the functions compiled with different floatness, + then such an application will work correctly. + This is the case for the FPU POST: u-boot (compiled with soft-float) + doesn't pass to (and doesn't get from) the FPU POST functions any + floats; there are no functions exported from the post/lib_ppc/fpu/ + objects which would work with float parameters/returns too. So, we + can reassure the linker not to worry about the difference in ABI + attributes of linking files just by setting the 'soft-float' + attribute for the objects in post/lib_ppc/fpu. And this patch does + this. + + Also, to avoid passing both soft- and hard-float options in CFLAGS + when compiling the files from post/lib_ppc/fpu (which is OK, but + looks rather dirty) this patch removes the soft-float string from + CFLAGS in post/lib_ppc/fpu/Makefile. + + Signed-off-by: Yuri Tikhonov + +commit a7c9310457e85b4598abe5b304108edf11332e2f +Author: Peter Tyser +Date: Wed Dec 17 16:36:22 2008 -0600 + + Add support for Maxim's DS4510 I2C device + + Initial support for the DS4510, a CPU supervisor with + integrated EEPROM, SRAM, and 4 programmable non-volatile + GPIO pins. The CONFIG_DS4510 define enables support + for the device while the CONFIG_CMD_DS4510 define + enables the ds4510 command. The additional + CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and + CONFIG_DS4510_RST defines add additional sub-commands + to the ds4510 command when defined. + + Signed-off-by: Peter Tyser + +commit b6fc6fd49a84543e1324e1620b9f301ff7c1f27f +Author: Dirk Eibach +Date: Tue Dec 16 14:51:56 2008 +0100 + + common: Iteration limit for memory test. + + The iteration limit is passed to mtest as a fourth parameter: + [start [end [pattern [iterations]]]] + If no fourth parameter is supplied, there is no iteration limit and the + test will loop forever. + + Signed-off-by: Dirk Eibach + +commit 97cae3a4c68d856374ccc70fd2c5f8714cc94f7d +Author: Stefan Roese +Date: Mon Dec 15 15:40:12 2008 +0100 + + serial: Rename driver vcth to vct to support other board variants + + Moved driver vcth.c to vct.c to better reflect the VCT board series. + This driver is now used by the VCT platforms: + + vct_premium + vct_platinum + vct_platinumsvc + + Signed-off-by: Stefan Roese + +commit 36ede4d63e59c9277ec180b09c39b8bf46425ba2 +Author: Shinya Kuribayashi +Date: Fri Dec 12 00:45:27 2008 +0900 + + nios: Move README.nios_CONFIG_SYS_NIOS_CPU to doc/ dir + + Signed-off-by: Shinya Kuribayashi + +commit c3284b030b1cd492b4f46c576aea01bef258599d +Author: Peter Korsgaard +Date: Wed Dec 10 16:24:16 2008 +0100 + + common/main: support bootdelay=0 for CONFIG_AUTOBOOT_KEYED + + Support bootdelay=0 in abortboot for the CONFIG_AUTOBOOT_KEYED case + similar to the CONFIG_ZERO_BOOTDELAY_CHECK support for the + !CONFIG_AUTOBOOT_KEYED case. + + Do this by reversing the loop so we do at least one iteration before + checking for timeout. + + Signed-off-by: Peter Korsgaard + +commit 94f9279f7bbdc01bbc7cf85aedf9b545943b94c3 +Author: Niklaus Giger +Date: Mon Dec 8 17:24:08 2008 +0100 + + Added legacy flash ST Micro M29W040B + +commit 626d07348e5f9f302f4ea182161a89f7362a0488 +Author: Graeme Russ +Date: Mon Dec 8 20:04:51 2008 +1100 + + Fixed off-by-one errors in lib_m68k/interrupts.c + + Signed-off-by: Graeme Russ + +commit a5989c42ae5e295f274a795c426c47819bbdbfda +Author: Graeme Russ +Date: Sun Dec 7 10:29:05 2008 +1100 + + Removed all references to CONFIG_SYS_RESET_GENERIC + + Generic i386 reset - #define made redundant by weak function + + Signed-off-by: Graeme Russ + +commit 2b5360eb2bc0b741ae5cb3c84d35ccdd17667c8a +Author: Graeme Russ +Date: Sun Dec 7 10:29:04 2008 +1100 + + Remove #ifdef CONFIG_SC520 in source code + + CONFIG_SC520 is now used for conditional compile + + Signed-off-by: Graeme Russ + +commit ead056bc206f6b7ee6dc98766678b64635ea20b8 +Author: Graeme Russ +Date: Sun Dec 7 10:29:03 2008 +1100 + + Added MMCR reset functionality + + Reset function specific to AMD SC520 microcontroller - Is more of a + 'hard reset' that the triple fault. + + Requires CONFIG_SYS_RESET_SC520 to be defined in config + + I would have liked to add this to a new file (cpu/i386/sc520/reset.c) + but ld requires that a object file in a library arhive MUST contain + at least one function which does not override a weak function (and is + called from outside the object file) in order for that object file to + be extracted from the archive. This would be the only function on the + new file, and hence, will never get linked in. + + Signed-off-by: Graeme Russ + +commit 3f5f18d12d32ee0661bf51dfc55752c005230d6e +Author: Graeme Russ +Date: Sun Dec 7 10:29:02 2008 +1100 + + Moved generic (triple fault) reset code + + Moved from interrupts.c to cpu.c and made into a weak function to + allow vendor specific override + + Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be + added to the vendor specific code without the need to remember to + #undef usage of the generic method and if you forget to include your + custom reset method, you will always get the default. + + Signed-off-by: Graeme Russ + +commit 9933d609020c297788f53f334c8465fa7a99b10c +Author: Graeme Russ +Date: Sun Dec 7 10:29:01 2008 +1100 + + Moved definition of set_vector() to new header file + + This allows for future tidy ups and functionality that will require + set_vector () + + Signed-off-by: Graeme Russ + +commit 407976185e0dda2c90e89027121a1071b9c77bfb +Author: Graeme Russ +Date: Sun Dec 7 10:29:00 2008 +1100 + + Moved sc520 specific code into new cpu/i386/sc520 folder + + Signed-off-by: Graeme Russ + Signed-off-by: Wolfgang Denk + +commit 85ffbbd51914925a542d8528be7f072e5ab02157 +Author: Graeme Russ +Date: Sun Dec 7 10:28:58 2008 +1100 + + Renamed cpu/i386/reset.S to resetvec.S + + Brings i386 in line with other CPUs with a reset vector and frees up reset.c + for CPU reset functions + + Signed-off-by: Graeme Russ + +commit a3f4c123f569474e80ea012b8db0de46afdb6443 +Author: Wolfgang Denk +Date: Sat Jan 24 01:01:49 2009 +0100 + + Makefile: keep lists sorted. + + Signed-off-by: Wolfgang Denk + +commit c620c01e96814558470698ed5cab1bf2f504d1b5 +Author: Graeme Russ +Date: Sun Dec 7 10:28:57 2008 +1100 + + Added initial eNET board support + + Signed-off-by: Graeme Russ + +commit 0c0ccf401ee03a5008fc2c19b05a662bce1a1086 +Author: Gary Jennejohn +Date: Thu Nov 20 11:37:26 2008 +0100 + + POWERPC 82xx: add the SCC as an HDLC controller + + Right now this is only used by keymile. + + Signed-off-by: Gary Jennejohn + +commit 1e8f4e78ca393b3d8e86bd8055758dd465d9113f +Author: Heiko Schocher +Date: Thu Nov 20 09:59:09 2008 +0100 + + powerpc, keymile boards: extract identical config options + + This patch extracts the identical config options for the + keymile boards mgcoge, mgsuvd and kmeter1 in a new + common config file keymile-common.h. + + Signed-off-by: Heiko Schocher + +commit 210c8c00aad3328145204adab434bb7d70b06b75 +Author: Heiko Schocher +Date: Fri Nov 21 08:29:40 2008 +0100 + + powerpc: keymile: Add a check for the PIGGY debug board + + Check the presence of the PIGGY on the keymile boards mgcoge, + mgsuvd and kmeter1. If the PIGGY is not present, dont register + this Ethernet device. + + Signed-off-by: Heiko Schocher + Acked-by: Ben Warren + +commit de0443614af4d16675ab436665aeb11ddc9f7214 +Author: Heiko Schocher +Date: Thu Nov 20 09:57:47 2008 +0100 + + powerpc: 83xx: add support for the kmeter1 board + + This patch adds support for the kmeter1 board from Keymile, + based on a Freescale MPC8360 CPU. + + - serial console on UART 1 + - 256 MB DDR2 RAM + - 64 MB NOR Flash + - Ethernet RMII Mode over UCC4 + - PHY SMSC LAN8700 + + Signed-off-by: Heiko Schocher + +commit 3feb647f3fd0881382c7a29f4cf280b66473ae0a +Author: Sergei Poselenov +Date: Tue Nov 4 13:51:18 2008 +0100 + + Add a do_div() wrapper macro, lldiv(). + + Add a do_div() wrapper, lldiv(). The new inline function doesn't modify + the dividend and returns the result of division, so it is useful + in complex expressions, i.e. "return(a/b)" -> "return(lldiv(a,b))" + + Signed-off-by: Sergei Poselenov + +commit 18af1c5f0f7402dc0d6a71b012c68025dd97cf72 +Author: Kumar Gala +Date: Fri Jan 23 14:22:14 2009 -0600 + + 85xx: Add a 36-bit physical configuration for MPC8572DS + + We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary + to allow for larger memory sizes. + + Signed-off-by: Kumar Gala + +commit c51fc5d53c4560abc4d0a6126c06fc68133d1528 +Author: Kumar Gala +Date: Fri Jan 23 14:22:13 2009 -0600 + + 85xx: Handle eLBC difference w/36-bit physical + + The eLBC only handles 32-bit physical address in systems with 36-bit + physical. The previos generation of LBC handled 34-bit physical + address in 36-bit systems. Added a new CONFIG option to convey + the difference between the LBC and eLBC. + + Also added defines for XAM bits used in LBC for the extended 34-bit + support. + + Signed-off-by: Kumar Gala + +commit 72a9414a8e21e9536822c7353bc08d21ce5ad53d +Author: Kumar Gala +Date: Fri Jan 23 14:22:12 2009 -0600 + + 85xx: Use BR_ADDR macro for NAND chipselects + + Use the new BR_ADDR macro to properly setup the address field of the + localbus chipselects used by NAND. + + This allows us to deal with 36-bit phys on these boards in the future. + + Signed-off-by: Kumar Gala + +commit 2fc7eb0cfc608c9369001d57a0411af5e6a58f7c +Author: Haiying Wang +Date: Thu Jan 15 11:58:35 2009 -0500 + + Add secondary CPUs processor frequency for e500 core + + This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS, + and prints each CPU's frequency separately. It also fixes up each CPU's + frequency in "clock-frequency" of fdt blob. + + Signed-off-by: James Yang + Signed-off-by: Haiying Wang + +commit bf5b1f0c0d28ce062e1d368680632dfb099de692 +Author: Dave Liu +Date: Fri Nov 21 16:31:53 2008 +0800 + + 85xx: enable the auto self refresh for wake up ARP + + The wake up ARP feature need use the memory to process + wake up packet, we enable auto self refresh to support it. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit b4983e16d150ab7d039704c310aacbd2f4dc1e0f +Author: Dave Liu +Date: Fri Nov 21 16:31:43 2008 +0800 + + fsl-ddr: use the 1T timing as default configuration + + For light loaded system, we use the 1T timing to gain better + memory performance, but for some heavily loaded system, + you have to add the 2T timing options to board files. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 22cca7e1cd54590e967c73558b07ffbdccd39504 +Author: Dave Liu +Date: Fri Nov 21 16:31:35 2008 +0800 + + fsl-ddr: make the self refresh idle threshold configurable + + Some 85xx processors have the advanced power management feature, + such as wake up ARP, that needs enable the automatic self refresh. + + If the DDR controller pass the SR_IT (self refresh idle threshold) + idle cycles, it will automatically enter self refresh. However, + anytime one transaction is issued to the DDR controller, it will + reset the counter and exit self refresh state. + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 22ff3d01348e0a2dc369b7efcbac30e4ce86d178 +Author: Dave Liu +Date: Fri Nov 21 16:31:29 2008 +0800 + + fsl-ddr: clean up the ddr code for DDR3 controller + + - The DDR3 controller is expanding the bits for timing config + - Add the DDR3 32-bit bus mode support + + Signed-off-by: Dave Liu + Acked-by: Andy Fleming + +commit 80ee3ce6d7fe9441b4352d7cfaf6afc2507b1106 +Author: Dave Liu +Date: Fri Nov 21 16:31:22 2008 +0800 + + fsl-ddr: update the bit mask for DDR3 controller + + According to the latest 8572 UM, the DDR3 controller + is expanding the bit mask, and we use the extend ACTTOPRE + mode when tRAS more than 19 MCLK. + + Signed-off-by: Dave Liu + +commit aca5f018a8386b85469482ed9867e3e29a2437d0 +Author: Kumar Gala +Date: Tue Dec 2 16:08:40 2008 -0600 + + 85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards + + Introduce a new define to seperate out the virtual address that PCI + IO space is at from the physical address. In most situations these are + mapped 1:1. However any code accessing the bus should use VIRT. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 5af0fdd81c3370c3a51421208fda568bdcbbec23 +Author: Kumar Gala +Date: Tue Dec 2 16:08:39 2008 -0600 + + 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards + + Introduce a new define to seperate out the virtual address that PCI + memory is at from the physical address. In most situations these are + mapped 1:1. However any code accessing the bus should use VIRT. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit a6e04c344ad1eefd47a75484441b385da815b8df +Author: Kumar Gala +Date: Tue Dec 2 16:08:38 2008 -0600 + + 85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards + + Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields + of TLBs. This is what we should have always been using from the start. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 5f91ef6acdbadec33e0192049e2b24a1d9692f1d +Author: Kumar Gala +Date: Tue Dec 2 16:08:37 2008 -0600 + + 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards + + Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead + of _IO_BASE so we are more explicit. + + Signed-off-by: Kumar Gala + +commit 10795f42cb94e71bcb262b615084f69dd886399a +Author: Kumar Gala +Date: Tue Dec 2 16:08:36 2008 -0600 + + 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards + + Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead + of _MEM_BASE so we are more explicit. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit c953ddfd56b3ae3f28910fe3aed6de6968d1c9aa +Author: Kumar Gala +Date: Tue Dec 2 14:19:34 2008 -0600 + + 85xx: separate FLASH BASE virtual from physical address + + Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and + maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash. + + This allows us to deal with 36-bit phys on these boards in the future. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 52b565f5ad23b682489055b187767d8bf1c2e444 +Author: Kumar Gala +Date: Tue Dec 2 14:19:33 2008 -0600 + + 85xx: separate PIXIS virtual from physical address + + Added a PIXIS_BASE_PHYS for use as the physical address and maintain + PIXIS_BASE as the virtual address of the PIXIS fpga registers. + + This allows us to deal with 36-bit phys on these boards in the future. + + Signed-off-by: Kumar Gala + Acked-by: Andy Fleming + +commit 30837e5b21d5a742983581ab9ee3fac085311d19 +Author: Haiying Wang +Date: Tue Nov 11 08:52:09 2008 -0500 + + Add README file for MPC8572DS board + + Signed-off-by: Haiying Wang + Acked-by: Andy Fleming + +commit 6dadc9195ad642cc662632f4d92f92d3d71e8bf2 +Author: Mike Frysinger +Date: Mon Oct 20 16:15:04 2008 -0400 + + Blackfin: use common strmhz() in system output + + Signed-off-by: Mike Frysinger + +commit 5bb907a4925397789c90d074f4f7e92ce6b39402 +Author: Ron Madrid +Date: Thu Jan 22 15:05:24 2009 -0800 + + mpc83xx: New board support for SIMPC8313 + + This patch will create a new board, SIMPC8313, from Sheldon Instruments. This + board boots from NAND devices and is configureable for either large or small + page devices. The board supports non-soldered DDR2, one ethernet port, a + Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected + to the eLBC providing glue logic to a TMS320C67xx DSP. + + Signed-off-by: Ron Madrid + Signed-off-by: Kim Phillips + +commit d4bade8d77aa20e2846fa4accff0e7fa7961a134 +Author: Mike Frysinger +Date: Sun Jan 18 19:46:06 2009 -0500 + + nand: fixup printf modifiers to match types used + + Signed-off-by: Mike Frysinger + Signed-off-by: Scott Wood + +commit 389e6620e2271096df3316917528003627db4021 +Author: Schlaegl Manfred jun +Date: Tue Jan 20 16:57:55 2009 +0100 + + nand read.jffs2 (nand_legacy) in common/cmd_nand.c + + Error with CONFIG_NAND_LEGACY in common/cmd_nand.c: + With current code "nand read.jffs2s" (read and skip bad blocks) is always interpreted as + "nand read.jffs2" (read and fill bad blocks with 0xff). This is because ".jffs2" is + tested before ".jffs2s" and only the first two characters are compared. + + Correction: + Test for ".jffs2s" first and compare the first 7 characters. + + Signed-off-by: Scott Wood + +commit 6c869637fef31e66380f0ea1d49690a2e26ec0d7 +Author: Wolfgang Grandegger +Date: Fri Jan 16 18:55:54 2009 +0100 + + NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS + + This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and + changes the default from 8 to 1 for the legacy and the new MTD + NAND layer. This allows to remove all NAND_MAX_CHIPS definitions + in the board config files because none of the boards use multi + chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 + define + + #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE + + but that's bogus and did not work anyhow. + + Signed-off-by: Wolfgang Grandegger + Signed-off-by: Scott Wood + +commit c70564e6b1bd08f3230182392238907f3531a87e +Author: Dave Liu +Date: Tue Dec 2 11:48:51 2008 +0800 + + NAND: Fix cache and memory inconsistency issue + + We load the secondary stage u-boot image from NAND to + system memory by nand_load, but we did not flush d-cache + to memory, nor invalidate i-cache before we jump to RAM. + When the system has cache enabled and the TLB/page attribute + of system memory is cacheable, it will cause issues. + + - 83xx family is using the d-cache lock, so all of d-cache + access is cache-inhibited. so you can't see the issue. + - 85xx family is using d-cache, i-cache enable, partial + cache lock. you will see the issue. + + This patch fixes the cache issue. + + Signed-off-by: Dave Liu + Signed-off-by: Scott Wood + +commit 50657c273278f74378e1ac39b41d612b92fdffa0 +Author: Nishanth Menon +Date: Sat Dec 13 09:43:06 2008 -0600 + + NAND: Enable nand lock, unlock feature + + Enable nand lock, unlock and status of lock feature. + Not every device and platform requires this, hence, + it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK + + Nand unlock and status operate on block boundary instead + of page boundary. Details in: + http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT + + Intial solution provided by Vikram Pandita + Includes preliminary suggestions from Scott Wood + + Signed-off-by: Nishanth Menon + Signed-off-by: Scott Wood + +commit 69fb8be4fc07162fdf6edf04bdc7233b0e9a920e +Author: Mike Frysinger +Date: Sat Dec 6 02:40:55 2008 -0500 + + NAND: move board_nand_init to nand.h + + Rather than putting the function prototype for board_nand_init() in the one + place where it gets called, put it into nand.h so that every place that also + defines it gets the prototype. Otherwise, errors can go silently unnoticed + such as using the wrong return value (void rather than int) when defining + the function. + + Signed-off-by: Mike Frysinger + Signed-off-by: Scott Wood + +commit 1ae39862044ebb1e682234b51f94421e3f871d6a +Author: Stefan Roese +Date: Tue Dec 2 11:06:47 2008 +0100 + + OneNAND: Additional sync with 2.6.27 + + - Add subpage write support + - Add onenand_oob_64/32 ecclayout + + This has been missing and without it UBI has some incompatibilies issues + with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is + placed differently (2048 instead of 512) without this fix. + + Signed-off-by: Stefan Roese + Signed-off-by: Scott Wood + +commit 1714f51a2009baaecf3d4f6e3bd8c4e93a8d3f23 +Author: Kyungmin Park +Date: Thu Nov 13 15:14:33 2008 +0900 + + Add markbad function + + Add missing markbad function + If not, it's hang when it entered the mtd->mark_bad(). + + Signed-off-by: Kyungmin Park + +commit c438ea175d8d002c1063b7a94b0c0e26668d1ac9 +Author: Stefan Roese +Date: Wed Nov 12 13:47:24 2008 +0100 + + OneNAND: Bad block aware read/write command support + + Update OneNAND command to support bad block awareness. + Also change the OneNAND command style to better match the + NAND version. + + Signed-off-by: Stefan Roese + Acked-by: Kyungmin Park + +commit 8cf11f3aa78673730e9ecbbe4b75213b53f212c8 +Author: Stefan Roese +Date: Tue Nov 11 10:29:09 2008 +0100 + + OneNAND: Save version_id in onenand_chip struct + + The version (ver_id) was not stored in the onenand_chip structure and + because of this the continuous locking scheme could be enabled on some + chips. + + Signed-off-by: Stefan Roese + +commit 4fca3310d611cc0f51d7295ef3557afbdbd91dc3 +Author: Stefan Roese +Date: Tue Nov 11 10:28:53 2008 +0100 + + OneNAND: Fix compiler warnings + + Signed-off-by: Stefan Roese + +commit 1ac5744e33ee0aa6d6ddab3b99f9e70953156e69 +Author: Dave Liu +Date: Tue Nov 4 14:55:06 2008 +0800 + + mpc83xx: enable eLBC NAND support for MPC8315ERDB board + + Signed-off-by: Dave Liu + +commit ef0921d6b05aeb9034158f9bef5323d6da9c925e +Author: Kyungmin Park +Date: Tue Nov 4 09:24:07 2008 +0900 + + Sync with 2.6.27 + + Sync with OneNAND kernel codes + + Signed-off-by: Kyungmin Park + +commit e7f325be9edeb84bb457301776bbac1f7257dafc +Author: Michal Simek +Date: Mon Jan 5 13:35:31 2009 +0100 + + microblaze: Use cache functions (especially cache status) + in systems which are configured without flash + +commit e9b737deb2c30125362d20e24170617476026e94 +Author: Michal Simek +Date: Mon Jan 5 13:29:32 2009 +0100 + + microblaze: Add cache flush + +commit b4f8dda35bfad447b4106828232705b2e878d168 +Author: Michal Simek +Date: Mon Jan 5 13:28:40 2009 +0100 + + microblaze: Add bootup messages to board.c + +commit 330e55459bc9983341da6c1d5c7fe00a664436fe +Author: Michal Simek +Date: Fri Dec 19 13:25:55 2008 +0100 + + microblaze: Change microblaze-generic config file + + Signed-off-by: Michal Simek + +commit 52a822ed9c37a2ea0ed112a26d8ff5a6cb1c6f10 +Author: Michal Simek +Date: Fri Dec 19 13:14:05 2008 +0100 + + microblaze: Rename ml401 to microblaze-generic + + Signed-off-by: Michal Simek + +commit 6677876181cc8772bca8a372479a500d160f3993 +Author: Scott Wood +Date: Tue Jan 20 11:56:11 2009 -0600 + + 83xx: Use the proper sequence for updating IMMR. + + This ensures that subsequent accesses properly hit the new window. + + The dcbi during the NAND loop was accidentally working around this; + it's no longer necessary, as the cache is not enabled. + + Reported-by: Suchit Lepcha + Signed-off-by: Scott Wood + Signed-off-by: Kim Phillips + +commit 8b34557c546e5e9f34ebf83c93413dad973d93df +Author: Anton Vorontsov +Date: Thu Jan 8 04:26:19 2009 +0300 + + mpc83xx: Add PCI-E support for MPC837XEMDS boards + + MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card + provides two PCI-E (x2) ports. Though, only one port can be used in x2 + mode. Two ports can function simultaneously in x1 mode. + + PCI-E x1/x2 modes can be switched via "pex_x2" environment variable. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit 8f11e34b31a7be124a3239653f33af9510502045 +Author: Anton Vorontsov +Date: Thu Jan 8 04:26:17 2009 +0300 + + mpc83xx: Add PCI-E support for MPC8315ERDB boards + + MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's + support them. + + Signed-off-by: Anton Vorontsov + Signed-off-by: Kim Phillips + +commit fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8 +Author: Anton Vorontsov +Date: Thu Jan 8 04:26:12 2009 +0300 + + mpc83xx: Add support for MPC83xx PCI-E controllers + + This patch adds support for MPC83xx PCI-E controllers in Root Complex + mode. + + The patch is based on Tony Li and Dave Liu work[1]. + + Though unlike the original patch, by default we don't register PCI-E + buses for use in U-Boot, we only configure the controllers for future + use in other OSes (Linux). This is done because we don't have enough + of spare BATs to map all the PCI-E regions. + + To actually use PCI-E in U-Boot, users should explicitly define + CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And + only then U-Boot will able to access PCI-E, but at the cost of disabled + address translation. + + [1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html + + Signed-off-by: Tony Li + Signed-off-by: Anton Vorontsov + Acked-by: Dave Liu + Signed-off-by: Kim Phillips + +commit 88ecf55cabd7aea28fe8093720e208f53ccfdcf5 +Author: Ira Snyder +Date: Mon Jan 12 13:33:17 2009 -0800 + + MPC8349EMDS: do not setup unused PCI clock outputs in PCI agent mode + + When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do + not enable them. See the MPC8349EA Reference Manual, Section 4.4.2 + "Clocking in PCI Agent Mode". + + Signed-off-by: Ira W. Snyder + Signed-off-by: Kim Phillips + +commit 75f35209f702bb26826855ed8c8e4d108ab5f412 +Author: Ira Snyder +Date: Mon Jan 12 13:32:26 2009 -0800 + + 83xx: PCI agent mode fixes for multi-board systems + + When running a system with 2 or more MPC8349EMDS boards in PCI agent mode, + the boards will lock up the PCI bus by scanning against each other. + + The boards lock against each other by trying to access the PCI bus before + clearing their configuration lock bit. Both boards end up in a loop, + sending and receiving "Target Not Ready" messages forever. + + When running in PCI agent mode, the scanning now takes place after the + boards have cleared their configuration lock bit. + + Also, add a missing declaration to the mpc83xx.h header file, fixing a + build warning. + + Signed-off-by: Ira W. Snyder + Signed-off-by: Kim Phillips + +commit 455a46915b82896cc2070eb326d075555c2bc580 +Author: Ron Madrid +Date: Fri Dec 12 13:12:45 2008 -0800 + + mpc83xx: Size optimization of start.S + + Currently there are in excess of 100 bytes located at the beginning of the image + built by start.S that are not being utilized. This patch moves a few functions + into this part of the image. This will create a greater number of *available* + bytes that can be used by board specific code in NAND builds and will decrease + the size of the assembled code in other builds. + + Signed-off-by: Ron Madrid + Signed-off-by: Kim Phillips + +commit 72d15e705bc3983884105cb7755c7ba80e74a0a5 +Author: Wolfgang Denk +Date: Wed Jan 21 23:08:12 2009 +0100 + + Prepare v2009.01 + + Signed-off-by: Wolfgang Denk + +commit 635e5f8fc82365e6e9734b3132bc95135a6de679 +Author: Wolfgang Denk +Date: Sun Jan 18 21:37:48 2009 +0100 + + Prepare 2009.01-rc3 + + Update CHANGELOG + + Signed-off-by: Wolfgang Denk + +commit 4cda437898f7873752f0201757cd33f12196ce87 +Author: Mike Frysinger +Date: Sat Jan 17 13:32:42 2009 -0500 + + build system: treat all Darwin's alike + + The x86 based version of Darwin behaves the same quirky way as the powerpc + Darwin, so only check HOSTOS when setting up Darwin workarounds. + + Signed-off-by: Mike Frysinger + +commit c088a108c75db565e07292fd668dfa5491e85bc2 +Author: Peter Korsgaard +Date: Wed Jan 14 13:52:24 2009 +0100 + + fdt_resize(): fix actualsize calculations with unaligned blobs + + The code in fdt_resize() to extend the fdt size to end on a page boundary + is wrong for fdt's not located at an address aligned on a page boundary. + What's even worse, the code would make actualsize shrink rather than grow + if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(), + causing fdt_add_mem_rsv to fail. + + Fix it by aligning end address (blob + size) to a page boundary instead. + For aligned fdt's this is equivalent to what we had before. + + Signed-off-by: Peter Korsgaard + +commit fadad1573fb16c90025f08a2861d6047d093cba7 +Author: Mike Frysinger +Date: Fri Jan 9 04:38:17 2009 -0500 + + ncb: use socklen_t + + The recvfrom() function takes a socklen_t, not an int. + + Signed-off-by: Mike Frysinger + +commit fc83c9273cec6e6e542f4a0ea3b653b7d0513ffa +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Jan 11 16:35:16 2009 +0100 + + sh: serial: use readx/writex accessors + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 9e1fa628bdb64745811cdd26c4f953846c076180 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sun Jan 11 16:35:15 2009 +0100 + + sh: serial: coding style cleanup + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit c9935c992575922b7ef13eec0656ed8665d324e3 +Author: Nobuhiro Iwamatsu +Date: Sun Jan 11 17:48:56 2009 +0900 + + sh: Fix compile error on lowlevel_init file + + lowlevel_init of SH was corrected to use the write/readXX macro. + However, there was a problem that was not able to be compiled partially. + This patch corrected this. + + Signed-off-by: Nobuhiro Iwamatsu + +commit a5b04d00bfeb940c62232972ce644d50b45797f9 +Author: Kieran Bingham +Date: Tue Dec 30 01:16:03 2008 +0000 + + sh: Fix up rsk7203 target for out of tree build + + Fix up rsk7203 target to build successfully using out-of-tree build. + + Signed-off-by: Kieran Bingham + Signed-off-by: Nobuhiro Iwamatsu + +commit f7e78f3b74aae9caca2997bad865a72338326c0a +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 19:29:49 2008 +0100 + + sh: use write{8,16,32} in all lowlevel_init + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit e4430779623af500de1cee7892c379f07ef59813 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 19:29:48 2008 +0100 + + sh: lowlevel_init coding style cleanup + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 85cb052ee41675ca361e6a4c69455dc715c8f2d9 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 15:27:45 2008 +0100 + + sh: update sh2/sh2a timer coding style + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 1e15ff999322e81af4c0c0c548908f38944ba39c +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Dec 20 15:25:22 2008 +0100 + + sh: update sh timer coding style + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Nobuhiro Iwamatsu + +commit 0e3ece33801e377be67ffa29f083421ad820f28b +Author: Wolfgang Denk +Date: Wed Jan 14 23:26:05 2009 +0100 + + Prepare 2009.01-rc2 + + Update CHANGELOG. + + Signed-off-by: Wolfgang Denk + +commit e92c9a860e44c14513c8909ce4299e253a775eeb +Author: Wolfgang Denk +Date: Wed Jan 14 22:35:30 2009 +0100 + + cpu/mpc824x/Makefile: fix warning with parallel builds + + Parallel builds would occasionally issue this build warning: + + ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists + + Use "ln -sf" as quick work around for the issue. + + Signed-off-by: Wolfgang Denk + +commit 3ba605d4beec649438539e7df97b5fedb26592fb +Author: Matthias Fuchs +Date: Fri Jan 2 12:18:49 2009 +0100 + + ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boards + + This patch adds esd's loadpci BSP command to CPCI4052 and + CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit 600fe46fb3dab7f07604f9009904f31584415114 +Author: Matthias Fuchs +Date: Fri Jan 2 12:18:12 2009 +0100 + + ppc4xx: Disable pci node in device tree on CPCI405 pci adapters + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit f6a1f490d224c600a09137e58d1026d150b8e679 +Author: Matthias Fuchs +Date: Fri Jan 2 12:17:36 2009 +0100 + + ppc4xx: Cleanup CPCI405 board code + + This patch cleans up CPCI405 board support: + - wrap long lines + - unification of spaces in function calls + - remove dead code + + Use correct io accessors on peripherals. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit fceebb45a0b97e92f9889861f8c3b9cb885e706f +Author: Matthias Fuchs +Date: Fri Jan 2 12:16:35 2009 +0100 + + ppc4xx: Enable auto RS485 mode on PLU405 boards + + This patch turns on the auto RS485 mode in the 2nd external + uart on PLU405 boards. This is a special mode of the used + Exar XR16C2850 uart. Because these boards only have a 485 physical + layer connected it's a good idea to turn it on by default. + + Signed-off-by: Matthias Fuchs + Signed-off-by: Stefan Roese + +commit b5f65dfa9aa8e068e62aba4733dc4fd97b1d9bf6 +Author: Haiying Wang +Date: Tue Jan 13 16:29:28 2009 -0500 + + Some changes of TLB entry setting for MPC8572DS + + - Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, + all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 + can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) + + - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. + + Signed-off-by: Haiying Wang + +commit 950264317eb9594b2b5ee2fb65206200a1c6007a +Author: Haiying Wang +Date: Tue Jan 13 16:29:22 2009 -0500 + + Change DDR tlb start entry to CONFIG param for 85xx + + So that we can locate the DDR tlb start entry to the value other than 8. By + default, it is still 8. + + Signed-off-by: Haiying Wang + +commit 6d3a10f73ece7ffb736890c10e023222612a4aa0 +Author: Roy Zang +Date: Fri Jan 9 16:02:35 2009 +0800 + + Change PCIE1&2 deciide logic on MPC8544DS board more readable + + The IO port selection for MPC8544DS board: + Port cfg_io_ports + PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 + PCIE2 0x4, 0x5, 0x6, 0x7 + PCIE3 0x6, 0x7 + This patch changes the PCIE12 and PCIE2 logic more readable. + Signed-off-by: Roy Zang + +commit 028e116811d28a031660f1ad9e20ac1293b3c5c7 +Author: Roy Zang +Date: Fri Jan 9 16:01:52 2009 +0800 + + PCIE2 and PCIE3 are decided by corresponing bit in devdisr instead of PCIE1 bit + + PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of + PCIE1 bit. + On MPC8572DS board, PCIE refers to PCIE1. + Signed-off-by: Roy Zang + +commit 9afc2ef0307aecf52482df67c31b75d5f9e66b47 +Author: Roy Zang +Date: Fri Jan 9 16:00:55 2009 +0800 + + Fix IO port selection issue on MPC8544DS and MPC8572DS boards + + The IO port selection is not correct on MPC8572DS and MPC8544DS board. + This patch fixes this issue. + For MPC8572 + Port cfg_io_ports + PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf + PCIE2 0x3, 0x7 + PCIE3 0x7 + + For MPC8544 + Port cfg_io_ports + PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 + PCIE2 0x4, 0x5, 0x6, 0x7 + PCIE3 0x6, 0x7 + Signed-off-by: Roy Zang + +commit 3e3fffe3baf3befde287fec1fcbfe55052fb8946 +Author: Becky Bruce +Date: Wed Dec 3 22:36:44 2008 -0600 + + mpc8610hpcd: Fix PCI mapping concepts + + Rename _BASE to _BUS, as it's actually a PCI bus address, + separate virtual and physical addresses into _VIRT and _PHYS, + and use each appopriately. This makes the code easier to read + and understand, and facilitates mapping changes going forward. + + Signed-off-by: Becky Bruce + +commit 79e436cad3b4a7db88408c3f05175028f30d700d +Author: Becky Bruce +Date: Wed Dec 3 22:36:26 2008 -0600 + + sbc8641d: Fix PCI mapping concepts + + Rename _BASE to _BUS, as it's actually a PCI bus address, + separate virtual and physical addresses into _VIRT and _PHYS, + and use each appopriately. This makes the code easier to read + and understand, and facilitates mapping changes going forward. + + Signed-off-by: Becky Bruce + +commit a9f3acbcd07da72b5446ce557531a3ed8b8beff0 +Author: Wolfgang Denk +Date: Mon Jan 12 14:50:35 2009 +0100 + + MPC86xx: fix build warnings + + Signed-off-by: Wolfgang Denk + +commit 032a1c934ef4dc003281f57302b6e693062c1868 +Author: Mike Frysinger +Date: Mon Jan 5 16:09:44 2009 -0500 + + bf537-stamp/nand: fix board_nand_init prototype + + The board_nand_init() function should return an int, not void. + + Signed-off-by: Mike Frysinger + +commit 687f952e4119594ab913be11c90f7f018c2a7a79 +Author: Mike Frysinger +Date: Thu Dec 11 07:04:48 2008 -0500 + + Blackfin: drop CONFIG_SPI handling in board init + + The eeprom SPI init functions are duplicated as the common code already + executes these for us. + + Signed-off-by: Mike Frysinger + +commit e7e684b10d73a303902208594c7c3e7e0d753282 +Author: Mike Frysinger +Date: Fri Oct 24 17:51:57 2008 -0400 + + Blackfin: fix out-of-tree building with ldscripts + + Many of the Blackfin board linker scripts are preprocessed, so make sure we + output the linker script into the build tree rather than the source tree. + + Signed-off-by: Mike Frysinger + +commit b9eecc342f767b50e1476fbc1aad7d88dd4ce5eb +Author: Mike Frysinger +Date: Fri Oct 24 17:48:54 2008 -0400 + + Blackfin: fix linker scripts to work with --gc-sections + + Make sure all .text sections get pulled in and the entry point is properly + referenced so they don't get discarded when linking with --gc-sections. + + Signed-off-by: Mike Frysinger + +commit 509fc553bc6087a6f705b3bf52f3950d7d1eaa58 +Author: Mike Frysinger +Date: Sat Oct 11 20:45:44 2008 -0400 + + Blackfin: set proper LDRFLAGS for parallel booting LDRs + + In order to boot an LDR out of parallel flash, the ldr utility needs a few + flags to tell it to generate the right header. + + Signed-off-by: Mike Frysinger + +commit 3dd9395a0d7ce69a335d0e743c04b9caedd681d3 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Jan 6 21:41:59 2009 +0100 + + at91rm9200: move define from lowlevel_init to header + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 8a48686fac2030287765f1970ea046bd5734b733 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 3 17:22:26 2009 +0100 + + m501sk: move to the common memory setup + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit d481c80d78f954133c035dae6c7d22de3625795d +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 3 17:22:25 2009 +0100 + + at91rm9200: rename lowlevel init value to CONFIG_SYS_ + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 4e170b16625291aa10d0d9abc3f34e8a5945d157 +Author: Nicolas Ferre +Date: Tue Jan 6 21:13:14 2009 +0100 + + at91: add at91sam9xeek board support + + At91sam9xe is basically an at91sam9260 with embedded flash. We can manage + it as another entry for at91sam9260 in the Makefile. + + Check documentation at : + http://www.atmel.com/dyn/products/product_card.asp?part_id=4263 + + Signed-off-by: Nicolas Ferre + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 9ffd53db870a7da134f9a1ae76894a6b31237be5 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Jan 6 21:15:57 2009 +0100 + + fix bmp_logo.h make dependencies to allow parallel build + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit e12d9a8fb48d24176efffccc072b445e60a3afe4 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Sat Jan 3 17:22:24 2009 +0100 + + at91: Fix Atmel's at91sam9 boards out of tree build + + introduced in commit 89a7a87f084c + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + +commit 0668236bafaa1c11c521652a2facebc74beecbf0 +Author: Wolfgang Denk +Date: Tue Dec 30 22:56:11 2008 +0100 + + README: update mailing list name and hits to patch submission. + + Signed-off-by: Wolfgang Denk + +commit d9011f9b75561a0bd9254934c2bb2bc799d4f645 +Author: Peter Tyser +Date: Tue Dec 23 16:32:01 2008 -0600 + + 85xx: Enable inbound PCI config cycles for X-ES boards cleanup + + Signed-off-by: Peter Tyser + +commit 1f03cbfae221b24ba1341a0a3f62ff01c5c874df +Author: Peter Tyser +Date: Tue Dec 23 16:32:00 2008 -0600 + + XPedite5200 board support cleanup + + Signed-off-by: Peter Tyser + +commit fea91edee8ae0295e3c30b1ff544df51f4d668e1 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 2 21:58:04 2008 +0100 + + usb_kbd: fix usb_kbd_deregister when DEVICE_DEREGISTER not enable + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Remy Böhmer + +commit ada591d2a0ecff5f9bc5ed1ebf310f439c3d0a28 +Author: Trent Piepho +Date: Wed Dec 3 15:16:37 2008 -0800 + + mpc8[56]xx: Put localbus clock in sysinfo and gd + + Currently MPC85xx and MPC86xx boards just calculate the localbus frequency + and print it out, but don't save it. + + This changes where its calculated and stored to be more consistent with the + CPU, CCB, TB, and DDR frequencies and the MPC83xx localbus clock. + + The localbus frequency is added to sysinfo and calculated when sysinfo is + set up, in cpu/mpc8[56]xx/speed.c, the same as the other frequencies are. + + get_clocks() copies the frequency into the global data, as the other + frequencies are, into a new field that is only enabled for MPC85xx and + MPC86xx. + + checkcpu() in cpu/mpc8[56]xx/cpu.c will print out the local bus frequency + from sysinfo, like the other frequencies, instead of calculating it on the + spot. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 9863d6aca11405e1e0d8aba2045d78aeec4d4ee7 +Author: Trent Piepho +Date: Wed Dec 3 15:16:36 2008 -0800 + + mpc86xx: Double local bus clock divider + + The local bus clock divider should be doubled for both 8610 and 8641. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 446c381e3e16f19857b72ea0d06241267b8b9d58 +Author: Trent Piepho +Date: Wed Dec 3 15:16:35 2008 -0800 + + mpc8568: Double local bus clock divider + + The clock divider for the MPC8568 local bus should be doubled, like the + other newer MPC85xx chips. + + Since there are now more chips with a 2x divider than a 1x, and any new + 85xx chips will probably be 2x, invert the sense of the #if so that it + lists the 1x chips instead of the 2x ones. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit f51f07eb58fad12de9294ba4ee6c09a0ddeaee03 +Author: Dave Liu +Date: Tue Dec 16 12:09:27 2008 +0800 + + 85xx: Fix the boot window issue + + If one custom board is using the 8MB flash, it is set + as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000. + The current start.S code will be broken at switch_as. + + It is because the TLB1[15] is set as 16MB page size, + EPN = TEXT_BASE & 0xff000000, RPN = 0xff000000. + + For the 8MB flash case, the EPN = 0xefxxxxxx, + RPN = 0xffxxxxxx. Assume the virt address of switch_as + is 0xef7ff18c, the real address of the instruction at + switch_as should be 0xff7ff18c. the 0xff7ff18c is out + of the range of the default 8MB boot LAW window + 0xff800000 - 0xffffffff. + + So when we switch to AS1 address space at switch_as, + the core can't fetch the instruction at switch_as any + more. It will cause broken issue. + + Signed-off-by: Dave Liu + +commit 58da8890d5fbd074746037722a423de9ac408616 +Author: Paul Gortmaker +Date: Thu Dec 11 15:47:50 2008 -0500 + + sbc8548: use proper PHY address + + The values given for the PHY address were wrong, so the code + read no valid PHY ID, and fell through to the generic PHY + support, which would work on 1000M but would not auto negotiate + down to 100M or 10M. + + Signed-off-by: Paul Gortmaker + +commit ad22f9273c6f24fbfa917e867680e9688e0c59c5 +Author: Paul Gortmaker +Date: Thu Dec 11 15:47:51 2008 -0500 + + sbc8548: enable command line editing by default. + + Lets make things a bit more user friendly. It isn't 1985 anymore. + + Signed-off-by: Paul Gortmaker + +commit bd93105fa171184a71ca8b22be03dc2705cfbd3f +Author: Paul Gortmaker +Date: Thu Dec 11 15:47:49 2008 -0500 + + sbc8548: don't enable the 3rd and 4th eTSEC + + These interfaces don't have usable connectors on the board, so don't + bother enumerating or configuring them. + + Signed-off-by: Paul Gortmaker + +commit 181a3650113883728927928b3ac81ad6dade4b2c +Author: Haiying Wang +Date: Wed Dec 3 10:08:19 2008 -0500 + + Set IVPR to kenrel entry point in second core boot page + + Assuming the OSes exception vectors start from the base of kernel address, and + the kernel physical starting address can be relocated to an non-zero address. + This patch enables the second core to have a valid IVPR for debugger before + kernel setting IVPR in CAMP mode. Otherwise, IVPR is 0x0 and it is not a valid + value for second core which runs kernel at different physical address other + than 0x0. + + Signed-off-by: Haiying Wang + +commit a5d212a263c58cc746481bf1fc878510533ce7d6 +Author: Trent Piepho +Date: Wed Dec 3 15:16:34 2008 -0800 + + mpc8xxx: LCRR[CLKDIV] is sometimes five bits + + On newer CPUs, 8536, 8572, and 8610, the CLKDIV field of LCRR is five bits + instead of four. + + In order to avoid an ifdef, LCRR_CLKDIV is set to 0x1f on all systems. It + should be safe as the fifth bit was defined as reserved and set to 0. + + Code that was using a hard coded 0x0f is changed to use LCRR_CLKDIV. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 58ec4866ed916c7e422f5107bb27b0822084728e +Author: Trent Piepho +Date: Wed Dec 3 15:16:38 2008 -0800 + + mpc8[56]xx: Put localbus clock in device tree + + Export the localbus frequency in the device tree, the same way the CPU, TB, + CCB, and various other frequencies are exported in their respective device + tree nodes. + + Some localbus devices need this information to be programed correctly, so + it makes sense to export it along with the other frequencies. + + Unfortunately, when someone wrote the localbus dts bindings, they didn't + bother to define what the "compatible" property should be. So it seems no + one was quite sure what to put in their dts files. + + Based on current existing dts files in the kernel source, I've used + "fsl,pq3-localbus" and "fsl,elbc" for MPC85xx, which are used by almost all + of the 85xx devices, and are looked for by the Linux code. The eLBC is + apparently not entirely backward compatible with the pq3 LBC and so eLBC + equipped platforms like 8572 won't use pq3-localbus. + + For MPC86xx, I've used "fsl,elbc" which is used by some of the 86xx systems + and is also looked for by the Linux code. On MPC8641, I've also used + "fsl,mpc8641-localbus" as it is also commonly used in dts files, some of + which don't use "fsl,elbc" or any other acceptable name to match on. + + Signed-off-by: Trent Piepho + Acked-by: Kumar Gala + Acked-by: Jon Loeliger + +commit 9d94aff699eed38b286814fcbb335f3eb8516a0e +Author: Kumar Gala +Date: Tue Dec 16 14:59:22 2008 -0600 + + NAND FSL elbc: Use virt_to_phys to determine which bank is in use + + The current code that determines which bank/chipselect is used for a + given NAND instance only worked for 32-bit addresses and assumed + a 1:1 mapping. This breaks in 36-bit physical configs. + + The proper way to handle this is to use the virt_to_phys() and + BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address + with the the virtual address the NAND code uses. + + Signed-off-by: Kumar Gala + Acked-by: Scott Wood + +commit 77c8115b1f1871811633eae77a5a700fac1f0e50 +Author: Kumar Gala +Date: Tue Dec 16 14:59:21 2008 -0600 + + ppc: Use addrmap in virt_to_phys and map_physmem. + + If we have addr map support enabled use the mapping functions to + implement virt_to_phys() and map_physmem(). + + Signed-off-by: Kumar Gala + +commit ecf5b98c7a6a2e2256dfddd48fab26678dcd6b90 +Author: Kumar Gala +Date: Tue Dec 16 14:59:20 2008 -0600 + + 85xx: Add support to populate addr map based on TLB settings + + Signed-off-by: Kumar Gala + +commit 78bbc5ce151c5a484bb51bf1866b4a993ffc16ec +Author: Peter Tyser +Date: Mon Dec 1 13:47:13 2008 -0600 + + XPedite5200 board support + + Initial support for Extreme Engineering Solutions XPedite5200 - + a MPC8548-based PMC single board computer. + + Signed-off-by: Peter Tyser + +commit 487dcb4fb89be0992bc06ec1341090017bd9cf2f +Author: Peter Tyser +Date: Wed Oct 29 12:39:27 2008 -0500 + + 85xx: Enable inbound PCI config cycles for X-ES boards + + Update X-ES Freescale boards to allow inbound PCI configuration + cycles when configured as agent/endpoint. + + Signed-off-by: Peter Tyser + +commit ccf0fdd02b97323f8caae18d06cc9daeac2f192f +Author: Peter Tyser +Date: Wed Dec 17 16:36:23 2008 -0600 + + XPedite5370 board support + + Initial support for Extreme Engineering Solutions XPedite5370 - + a MPC8572-based 3U VPX single board computer with a PMC/XMC + site. + + Signed-off-by: Peter Tyser + +commit e92739d34e2d6b6aca93b2598248210710897ce8 +Author: Peter Tyser +Date: Wed Dec 17 16:36:21 2008 -0600 + + Add support for PCA953x I2C gpio devices + + Initial support for NXP's 4 and 8 bit I2C gpio expanders + (eg pca9537, pca9557, etc). The CONFIG_PCA953X define + enables support for the devices while the CONFIG_CMD_PCA953X + define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO + define enables an 'info' sub-command which provides summary + information for the given pca953x device. + + Signed-off-by: Peter Tyser + +commit 7a8979591171676417ab36852d8811a8c46accd8 +Author: Peter Tyser +Date: Wed Oct 29 12:39:26 2008 -0500 + + pci/fsl_pci_init: Enable inbound PCI config cycles + + Add fsl_pci_config_unlock() function to enable a + PCI/PCIe interface configured in agent/endpoint mode to + respond to inbound PCI configuration cycles. + + Signed-off-by: Peter Tyser + +commit 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb +Author: Haavard Skinnemoen +Date: Wed Dec 17 16:43:18 2008 +0100 + + avr32: Remove second definition of virt_to_phys() + + The second definition introduced by 65e43a1063 conflicts with the + existing one. + + Also, convert the existing definition to use phys_addr_t. The volatile + qualifier is still needed due to brain damage elsewhere. + + Signed-off-by: Haavard Skinnemoen + +commit b616f2b545f73757669b37386f0b37bb61fc6797 +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Mon Sep 8 22:27:18 2008 +0200 + + MIPS: qemu_mips: update doc to generate and to use qemu flash, ide file + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Shinya Kuribayashi + +commit 16cdf816779f5b602a9b3b4d2ea4dea05095c35b +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 16 22:10:31 2008 +0100 + + MIPS: qemu_mips: update doc to use all disk and boot linux kernel + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Shinya Kuribayashi + +commit 13095b2f07dacb1f863772266c1789d47a523a8a +Author: Jean-Christophe PLAGNIOL-VILLARD +Date: Tue Dec 16 22:10:30 2008 +0100 + + MIPS: qemu_mips: move env storage just after u-boot + + Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD + Signed-off-by: Shinya Kuribayashi + +commit aced78d852d0b009e8aaa1445af8cb40861ee549 +Author: Wolfgang Denk +Date: Tue Dec 16 23:48:27 2008 +0100 + + Prepare 2009.01-rc1 + + Signed-off-by: Wolfgang Denk + +commit 9e2a79b4c585ad31138fb90b68fd0234d64a8da8 +Author: Wolfgang Denk +Date: Tue Dec 16 23:13:46 2008 +0100 + + include/configs/at91cap9adk.h: fix typo. + + Signed-off-by: Wolfgang Denk + +commit 45ca04f2377361593151d2d4da51f8ba4832d233 +Author: Wolfgang Denk +Date: Tue Dec 16 22:32:25 2008 +0100 + + board/trab/memory.c: Fix compile problems. + + Apply changes from commit 44b4dbed to board/trab/memory.c, too. + + Actually we'd need a major cleanup here - as it turns out, + board/trab/memory.c is more or less a verbatim copy of + post/drivers/memory.c ... but then, trab is EOL anyway,r + so this is not worth the effort. + + Signed-off-by: Wolfgang Denk + +commit ff49ea8977b56916edd5b1766d9939010e30b181 +Author: Scott Wood +Date: Tue Dec 16 14:24:16 2008 -0600 + + NAND: Mark the BBT as scanned prior to calling scan_bbt. + + Otherwise, recursion can occur if scan_bbt does not find a bad block + table, and tries to write one, and the attempt to erase the BBT area + causes a bad block check. + + Signed-off-by: Scott Wood + +commit 584eedab66d0828f2d571a24b10526c4e65f547b +Author: Ilya Yanok +Date: Thu Dec 11 05:51:57 2008 +0300 + + jffs2: include instead of defining own min_t + + Include header for min_t definition instead of + providing our own one. Removes warnings in case of OneNAND support + enabled. + + Although I thinks it's a bit silly to include + just for min_t... + + Signed-off-by: Ilya Yanok + Acked-by: Stefan Roese + +commit b1ffecec37b57a59c139042267faac458e5324e9 +Author: Becky Bruce +Date: Wed Dec 3 23:04:37 2008 -0600 + + powerpc: fix io.h build warning with CONFIG_PHYS_64BIT + + Casting a pointer to a phys_addr_t when it's an unsigned long long + on a 32-bit system without first casting to a non-pointer type + generates a compiler warning. Fix this. + + Signed-off-by: Becky Bruce + +commit 6cdadcb3f1b6eac4a1c4256acaa1438413f95351 +Author: Wolfgang Denk +Date: Tue Dec 16 16:22:50 2008 +0100 + + trab: make trab_fkt standalone code independent of libgcc + + Use our own local functions in lib_arm/ instead. + + Signed-off-by: Wolfgang Denk + +commit aa1bcca3d2e22af4dea9f02132f9b56a30378ded +Author: Wolfgang Denk +Date: Tue Dec 16 14:44:06 2008 +0100 + + post/Makefile: fix dependency problem with parallel builds + + Parallel builds (using "make -jN") would occasionally fail with error + messages like + ppc_4xxFP-objdump: string.o: File format not recognized + or + post/libpost.a(cpu.o): In function `cpu_post_test': + /home/wd/git/u-boot/work/post/lib_ppc/cpu.c:130: undefined reference to `cpu_post_test_string' + or similar. We now make sure to run the 'postdeps" step before + attempting to build the specific POST libraries. + + Signed-off-by: Wolfgang Denk + +commit 4a0f7538c5c0805fd9a791967bbabacc41deadd9 +Author: Wolfgang Denk +Date: Tue Dec 16 14:41:02 2008 +0100 + + Makefile: fix dependency problem with parallel builds + + Parallel builds (using "make -jN") would occasionally fail with error + messages like + include/autoconf.mk:212: *** missing separator. Stop. + Line numbers and affected boards were changing. Obviously some + Makefiles included autoconf.mk while it was still being written to. + As a fix, we now write to a temporary file first and then rename it, + so that it is really ready to use as soon as it appears. + + Signed-off-by: Wolfgang Denk + +commit 455ae7e87f67c44e6aea68865c83acadd3fcd36c +Author: Wolfgang Denk +Date: Tue Dec 16 01:02:17 2008 +0100 + + Coding style cleanup, update CHANGELOG. + + Signed-off-by: Wolfgang Denk + commit 84bc72d90c505fec3ef4b693995407a0bd4064e5 Author: Mike Frysinger Date: Thu Dec 11 18:39:08 2008 -0500 @@ -440,6 +4883,15 @@ Date: Tue Dec 9 23:20:18 2008 -0500 Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger +commit 4cd8ed40615a7d741ef2f09ee53779ec6907b8a6 +Author: Ben Warren +Date: Tue Dec 9 23:26:31 2008 -0800 + + Fix compile error in building MBX860T. + Bug was introduced in 9eb79bd8856bcab896ed5e1f1bca159807a124dd + + Signed-off-by: Ben Warren + commit 97a24a78ee6f34b89b821cb70eda1cf34aa11d97 Author: Jerry Van Baren Date: Mon Nov 24 08:15:02 2008 -0500 @@ -1481,6 +5933,32 @@ Date: Mon Nov 24 15:11:08 2008 +0100 Signed-off-by: Matthias Fuchs Signed-off-by: Stefan Roese +commit 633639587e3596f0dbf5e6247dd3faf80b1d9063 +Author: Heiko Schocher +Date: Thu Nov 20 09:59:09 2008 +0100 + + powerpc, keymile boards: extract identical config options + + This patch extracts the identical config options for the + keymile boards mgcoge, mgsuvd and kmeter1 in a new + common config file keymile-common.h. + + Signed-off-by: Heiko Schocher + Signed-off-by: Kim Phillips + +commit 9482a8e3d6ac766d90e5059dce777b1e4c868a30 +Author: Heiko Schocher +Date: Fri Nov 21 08:29:40 2008 +0100 + + powerpc: keymile: Add a check for the PIGGY debug board + + Check the presence of the PIGGY on the keymile boards mgcoge, + mgsuvd and kmeter1. If the PIGGY is not present, dont register + this Ethernet device. + + Signed-off-by: Heiko Schocher + Signed-off-by: Kim Phillips + commit 58c696eed839af894e0265064669c402dc28b371 Author: Wolfgang Denk Date: Mon Nov 24 21:50:59 2008 +0100 @@ -1755,6 +6233,24 @@ Date: Fri Nov 7 13:55:14 2008 +0100 Signed-off-by: Stelian Pop +commit fed36ac5ae613773b6cd90e61e292c45440e10c8 +Author: Heiko Schocher +Date: Thu Nov 20 09:57:47 2008 +0100 + + powerpc: 83xx: add support for the kmeter1 board + + This patch adds support for the kmeter1 board from Keymile, + based on a Freescale MPC8360 CPU. + + - serial console on UART 1 + - 256 MB DDR2 RAM + - 64 MB NOR Flash + - Ethernet RMII Mode over UCC4 + - PHY SMSC LAN8700 + + Signed-off-by: Heiko Schocher + Signed-off-by: Kim Phillips + commit 25fb4eaaeab3f8866020818f4729d990dcc91cf0 Author: Stefan Roese Date: Thu Nov 20 11:46:20 2008 +0100