X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=FreeRTOS%2FDemo%2FCORTEX_M4_ATSAM4L_Atmel_Studio%2Fsrc%2FSAM4L_low_power_tick_management.c;h=8be7dcf68ab811440d9888c20f56ce6ed8792a23;hb=61e4c8bcd10d8a2d87dfda1962932c88f0c7a92f;hp=735cca62405a0d0c38bdae0da95d45e3753c827f;hpb=b27390f24df4ade8856728ade66b0480546dee90;p=freertos diff --git a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c index 735cca624..8be7dcf68 100644 --- a/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c +++ b/FreeRTOS/Demo/CORTEX_M4_ATSAM4L_Atmel_Studio/src/SAM4L_low_power_tick_management.c @@ -1,48 +1,38 @@ /* - FreeRTOS V7.4.2 - Copyright (C) 2013 Real Time Engineers Ltd. + FreeRTOS V8.0.0:rc1 - Copyright (C) 2014 Real Time Engineers Ltd. + All rights reserved - FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT - http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. *************************************************************************** * * - * FreeRTOS tutorial books are available in pdf and paperback. * - * Complete, revised, and edited pdf reference manuals are also * - * available. * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that has become a de facto standard. * * * - * Purchasing FreeRTOS documentation will not only help you, by * - * ensuring you get running as quickly as possible and with an * - * in-depth knowledge of how to use FreeRTOS, it will also help * - * the FreeRTOS project to continue with its mission of providing * - * professional grade, cross platform, de facto standard solutions * - * for microcontrollers - completely free of charge! * + * Help yourself get started quickly and support the FreeRTOS * + * project by purchasing a FreeRTOS tutorial book, reference * + * manual, or both from: http://www.FreeRTOS.org/Documentation * * * - * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * - * * - * Thank you for using FreeRTOS, and thank you for your support! * + * Thank you! * * * *************************************************************************** - This file is part of the FreeRTOS distribution. FreeRTOS is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to - distribute a combined work that includes FreeRTOS without being obliged to - provide the source code for proprietary components outside of the FreeRTOS - kernel. + >>! NOTE: The modification to the GPL is included to allow you to distribute + >>! a combined work that includes FreeRTOS without being obliged to provide + >>! the source code for proprietary components outside of the FreeRTOS + >>! kernel. FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. See the GNU General Public License for more - details. You should have received a copy of the GNU General Public License - and the FreeRTOS license exception along with FreeRTOS; if not it can be - viewed here: http://www.freertos.org/a00114.html and also obtained by - writing to Real Time Engineers Ltd., contact details for whom are available - on the FreeRTOS WEB site. + FOR A PARTICULAR PURPOSE. Full license text is available from the following + link: http://www.freertos.org/a00114.html 1 tab == 4 spaces! @@ -55,21 +45,22 @@ * * *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, and our new - fully thread aware and reentrant UDP/IP stack. + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, - indemnification and middleware, under the OpenRTOS brand. + Integrity Systems to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and middleware. http://www.SafeRTOS.com - High Integrity Systems also provide a safety engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. + + 1 tab == 4 spaces! */ /* Standard includes. */ @@ -97,7 +88,6 @@ /* Constants required to pend a PendSV interrupt from the tick ISR if the preemptive scheduler is being used. These are just standard bits and registers within the Cortex-M core itself. */ -#define portNVIC_INT_CTRL_REG ( * ( ( volatile unsigned long * ) 0xe000ed04 ) ) #define portNVIC_PENDSVSET_BIT ( 1UL << 28UL ) /* The alarm used to generate interrupts in the asynchronous timer. */ @@ -116,6 +106,13 @@ within the Cortex-M core itself. */ */ void AST_ALARM_Handler(void); +/* + * Functions that disable and enable the AST respectively, not returning until + * the operation is known to have taken effect. + */ +static void prvDisableAST( void ); +static void prvEnableAST( void ); + /*-----------------------------------------------------------*/ /* Calculate how many clock increments make up a single tick period. */ @@ -143,18 +140,13 @@ clears the interrupt, which is specific to the clock being used to generate the tick. */ void AST_ALARM_Handler(void) { - /* If using preemption, also force a context switch by pending the PendSV - interrupt. */ - #if configUSE_PREEMPTION == 1 - { - portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; - } - #endif - /* Protect incrementing the tick with an interrupt safe critical section. */ ( void ) portSET_INTERRUPT_MASK_FROM_ISR(); { - vTaskIncrementTick(); + if( xTaskIncrementTick() != pdFALSE ) + { + portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; + } /* Just completely clear the interrupt mask on exit by passing 0 because it is known that this interrupt will only ever execute with the lowest @@ -175,8 +167,8 @@ void AST_ALARM_Handler(void) /*-----------------------------------------------------------*/ /* Override the default definition of vPortSetupTimerInterrupt() that is weakly -defined in the FreeRTOS Cortex-M3 port layer layer with a version that -configures the asynchronous timer (AST) to generate the tick interrupt. */ +defined in the FreeRTOS Cortex-M3 port layer with a version that configures the +asynchronous timer (AST) to generate the tick interrupt. */ void vPortSetupTimerInterrupt( void ) { struct ast_config ast_conf; @@ -226,7 +218,7 @@ struct ast_config ast_conf; } /*-----------------------------------------------------------*/ -void prvDisableAST( void ) +static void prvDisableAST( void ) { while( ast_is_busy( AST ) ) { @@ -240,7 +232,7 @@ void prvDisableAST( void ) } /*-----------------------------------------------------------*/ -void prvEnableAST( void ) +static void prvEnableAST( void ) { while( ast_is_busy( AST ) ) { @@ -255,12 +247,12 @@ void prvEnableAST( void ) /*-----------------------------------------------------------*/ /* Override the default definition of vPortSuppressTicksAndSleep() that is weakly -defined in the FreeRTOS Cortex-M3 port layer layer with a version that manages -the asynchronous timer (AST), as the tick is generated from the low power AST -and not the SysTick as would normally be the case on a Cortex-M. */ +defined in the FreeRTOS Cortex-M3 port layer with a version that manages the +asynchronous timer (AST), as the tick is generated from the low power AST and +not the SysTick as would normally be the case on a Cortex-M. */ void vPortSuppressTicksAndSleep( portTickType xExpectedIdleTime ) { -uint32_t ulAlarmValue, ulCompleteTickPeriods; +uint32_t ulAlarmValue, ulCompleteTickPeriods, ulInterruptStatus; eSleepModeStatus eSleepAction; portTickType xModifiableIdleTime; enum sleepmgr_mode xSleepMode; @@ -291,8 +283,7 @@ enum sleepmgr_mode xSleepMode; /* Enter a critical section but don't use the taskENTER_CRITICAL() method as that will mask interrupts that should exit sleep mode. */ - __asm volatile( "cpsid i \n\t" - "dsb \n\t" ); + ulInterruptStatus = cpu_irq_save(); /* The tick flag is set to false before sleeping. If it is true when sleep mode is exited then sleep mode was probably exited because the tick was @@ -310,7 +301,7 @@ enum sleepmgr_mode xSleepMode; /* Re-enable interrupts - see comments above the cpsid instruction() above. */ - __asm volatile( "cpsie i" ); + cpu_irq_restore( ulInterruptStatus ); } else { @@ -352,7 +343,7 @@ enum sleepmgr_mode xSleepMode; /* Re-enable interrupts - see comments above the cpsid instruction() above. */ - __asm volatile( "cpsie i" ); + cpu_irq_restore( ulInterruptStatus ); if( ulTickFlag != pdFALSE ) { @@ -380,6 +371,12 @@ enum sleepmgr_mode xSleepMode; /* The alarm value is set to whatever fraction of a single tick period remains. */ ulAlarmValue = ast_read_counter_value( AST ) - ( ulCompleteTickPeriods * ulAlarmValueForOneTick ); + if( ulAlarmValue == 0 ) + { + /* There is no fraction remaining. */ + ulAlarmValue = ulAlarmValueForOneTick; + ulCompleteTickPeriods++; + } ast_write_alarm0_value( AST, ulAlarmValue ); }