X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=FreeRTOS%2FDemo%2FCORTEX_M7_SAMV71_Xplained%2Flibboard_samv7-ek%2Fresources%2FIAR%2Fsamv71n20_flash.icf;fp=FreeRTOS%2FDemo%2FCORTEX_M7_SAMV71_Xplained%2Flibboard_samv7-ek%2Fresources%2FIAR%2Fsamv71n20_flash.icf;h=781e7bf6e9699b9d2ea68b2c9f8c92b4fe2ddf5a;hb=2e3459309e944b5ea768a61be74604842415a904;hp=0000000000000000000000000000000000000000;hpb=082624f1a435c8c703a8384adb17e4d7ba4f4e9c;p=freertos

diff --git a/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/resources/IAR/samv71n20_flash.icf b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/resources/IAR/samv71n20_flash.icf
new file mode 100644
index 000000000..781e7bf6e
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+++ b/FreeRTOS/Demo/CORTEX_M7_SAMV71_Xplained/libboard_samv7-ek/resources/IAR/samv71n20_flash.icf
@@ -0,0 +1,57 @@
+/* ---------------------------------------------------------------------------- */
+/*                  Atmel Microcontroller Software Support                      */
+/*                       SAM Software Package License                           */
+/* ---------------------------------------------------------------------------- */
+/* Copyright (c) 2014, Atmel Corporation                                        */
+/*                                                                              */
+/* All rights reserved.                                                         */
+/*                                                                              */
+/* Redistribution and use in source and binary forms, with or without           */
+/* modification, are permitted provided that the following condition is met:    */
+/*                                                                              */
+/* - Redistributions of source code must retain the above copyright notice,     */
+/* this list of conditions and the disclaimer below.                            */
+/*                                                                              */
+/* Atmel's name may not be used to endorse or promote products derived from     */
+/* this software without specific prior written permission.                     */
+/*                                                                              */
+/* DISCLAIMER:  THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR   */
+/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */
+/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE   */
+/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,      */
+/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */
+/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,  */
+/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF    */
+/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING         */
+/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
+/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
+/* ---------------------------------------------------------------------------- */
+
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__     = 0x00400000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_RAM_start__ = 0x20400000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20440000 -1;
+define symbol __ICFEDIT_region_ROM_start__ = 0x00400000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x00600000 -1;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__      = 0x400;
+define symbol __ICFEDIT_size_heap__        = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region RAM_region    = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+define region ROM_region    = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP   with alignment = 8, size = __ICFEDIT_size_heap__   { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in ROM_region                           { readonly };
+place in RAM_region                           { readwrite, block CSTACK, block HEAP };