X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=FreeRTOS%2FDemo%2FCORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil%2FProjects%2FIAR%2Fstm32l475xx_flash.icf;fp=FreeRTOS%2FDemo%2FCORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil%2FProjects%2FIAR%2Fstm32l475xx_flash.icf;h=90a1e1e78f2430c1b5694024d37c9a1aa7f5e518;hb=06d74d96f574509835f17691b1919f2562989484;hp=0000000000000000000000000000000000000000;hpb=0788a441e9e54f8aec93a088c2f1d09d09b74d6d;p=freertos

diff --git a/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/stm32l475xx_flash.icf b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/stm32l475xx_flash.icf
new file mode 100644
index 000000000..90a1e1e78
--- /dev/null
+++ b/FreeRTOS/Demo/CORTEX_MPU_STM32L4_Discovery_GCC_IAR_Keil/Projects/IAR/stm32l475xx_flash.icf
@@ -0,0 +1,96 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__    = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__      = 0x080FFFFF;
+define symbol __ICFEDIT_region_RAM_start__    = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__      = 0x20017FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+/* Flash Organization
+ *  1. Privileged Code:
+ *      Start   : 0x08000000
+ *      End     : 0x08007FFF
+ *      Size    : 32 Kbytes
+ *  2. System calls:
+ *      Start   : 0x08008000
+ *      End     : 0x08008FFF
+ *      Size    : 4 Kbytes
+ *  3. Unprivileged Code:
+ *      Start   : 0x08009000
+ *      End     : 0x080FFFFF
+ *      Size    : 988 Kbytes
+ */
+define symbol __reigon_ROM_privileged_start__   = __ICFEDIT_region_ROM_start__;
+define symbol __reigon_ROM_privileged_end__     = 0x08007FFF;
+define symbol __reigon_ROM_system_calls_start__ = 0x08008000;
+define symbol __reigon_ROM_system_calls_end__   = 0x08008FFF;
+define symbol __reigon_ROM_unprivileged_start__ = 0x08009000;
+define symbol __reigon_ROM_unprivileged_end__   = __ICFEDIT_region_ROM_end__;
+
+/* RAM Organization
+ *  1. Privileged Data:
+ *      Start   : 0x20000000
+ *      End     : 0x200003FF
+ *      Size    : 1 Kbytes
+ *  2. Unprivileged Data:
+ *      Start   : 0x20000400
+ *      End     : 0x20017FFF
+ *      Size    : 95 Kbytes
+ */
+define symbol __region_RAM_privileged_start__   = __ICFEDIT_region_RAM_start__;
+define symbol __region_RAM_privileged_end__     = 0x200003FF;
+define symbol __region_RAM_unprivileged_start__ = 0x20000400;
+define symbol __region_RAM_unprivileged_end__   = __ICFEDIT_region_RAM_end__;
+define symbol __region_SRAM2_start__            = 0x10000000;
+define symbol __region_SRAM2_end__              = 0x10007FFF;
+
+/* Memory regions. */
+define memory mem with size = 4G;
+define region ROM_region_privileged     = mem:[from __reigon_ROM_privileged_start__ to __reigon_ROM_privileged_end__];
+define region ROM_region_system_calls   = mem:[from __reigon_ROM_system_calls_start__ to __reigon_ROM_system_calls_end__];
+define region ROM_region_unprivileged   = mem:[from __reigon_ROM_unprivileged_start__ to __reigon_ROM_unprivileged_end__];
+define region RAM_region_privileged     = mem:[from __region_RAM_privileged_start__   to __region_RAM_privileged_end__];
+define region RAM_region_unprivileged   = mem:[from __region_RAM_unprivileged_start__   to __region_RAM_unprivileged_end__];
+define region SRAM2_region              = mem:[from __region_SRAM2_start__   to __region_SRAM2_end__];
+
+/* Stack and Heap. */
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+/* Initialization. */
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+/* Exported symbols. */
+define exported symbol __FLASH_segment_start__          = __ICFEDIT_region_ROM_start__;
+define exported symbol __FLASH_segment_end__            = __ICFEDIT_region_ROM_end__;
+define exported symbol __SRAM_segment_start__           = __ICFEDIT_region_RAM_start__;
+define exported symbol __SRAM_segment_end__             = __ICFEDIT_region_RAM_end__;
+
+define exported symbol __privileged_functions_start__   = __reigon_ROM_privileged_start__;
+define exported symbol __privileged_functions_end__     = __reigon_ROM_privileged_end__;
+define exported symbol __privileged_data_start__        = __region_RAM_privileged_start__;
+define exported symbol __privileged_data_end__          = __region_RAM_privileged_end__;
+
+define exported symbol __syscalls_flash_start__         = __reigon_ROM_system_calls_start__;
+define exported symbol __syscalls_flash_end__           = __reigon_ROM_system_calls_end__;
+
+/* Placements. */
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region_privileged      { readonly section privileged_functions };
+place in ROM_region_system_calls    { readonly section freertos_system_calls };
+place in ROM_region_unprivileged    { readonly };
+
+place in RAM_region_privileged      { readwrite section privileged_data };
+place in RAM_region_unprivileged    { readwrite,
+                                      block CSTACK, block HEAP }; 
+place in SRAM2_region               { };