X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=FreeRTOS%2FDemo%2FCORTEX_R5_UltraScale_MPSoC%2FRTOSDemo_R5_bsp%2Fpsu_cortexr5_0%2Flibsrc%2Fcanps_v3_2%2Fsrc%2Fxcanps_g.c;fp=FreeRTOS%2FDemo%2FCORTEX_R5_UltraScale_MPSoC%2FRTOSDemo_R5_bsp%2Fpsu_cortexr5_0%2Flibsrc%2Fcanps_v3_2%2Fsrc%2Fxcanps_g.c;h=0ed8cd17c0181df25f0b3f22a1f26ff71e940879;hb=2f3240cae4193f5662f4b8f24c4decdb2bc7778b;hp=4063a44eb70259e97f54f9d3c98f834b0b5a5981;hpb=6e33f3d844560120d8110ec9d6a50f912b594b87;p=freertos

diff --git a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/canps_v3_2/src/xcanps_g.c b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/canps_v3_2/src/xcanps_g.c
index 4063a44eb..0ed8cd17c 100644
--- a/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/canps_v3_2/src/xcanps_g.c
+++ b/FreeRTOS/Demo/CORTEX_R5_UltraScale_MPSoC/RTOSDemo_R5_bsp/psu_cortexr5_0/libsrc/canps_v3_2/src/xcanps_g.c
@@ -5,7 +5,7 @@
 * Version: 
 * DO NOT EDIT.
 *
-* Copyright (C) 2010-2017 Xilinx, Inc. All Rights Reserved.*
+* Copyright (C) 2010-2018 Xilinx, Inc. All Rights Reserved.*
 *Permission is hereby granted, free of charge, to any person obtaining a copy
 *of this software and associated documentation files (the Software), to deal
 *in the Software without restriction, including without limitation the rights
@@ -44,7 +44,7 @@
 * The configuration table for devices
 */
 
-XCanPs_Config XCanPs_ConfigTable[] =
+XCanPs_Config XCanPs_ConfigTable[XPAR_XCANPS_NUM_INSTANCES] =
 {
 	{
 		XPAR_PSU_CAN_1_DEVICE_ID,