X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=FreeRTOS%2FSource%2Fportable%2FGCC%2FARM_CM33_NTZ%2Fnon_secure%2Fport.c;h=63d292ead59ab7f6c52f56a4d3a374bec2b55158;hb=c44c60fabc0eac39ccd5fa2e909cd468d28b849f;hp=57c5e23bb90fb24d115b17847a71c732162123ac;hpb=0c5862ec962548e4683ad3862bd98d10070f8181;p=freertos diff --git a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c index 57c5e23bb..63d292ead 100644 --- a/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c +++ b/FreeRTOS/Source/portable/GCC/ARM_CM33_NTZ/non_secure/port.c @@ -369,6 +369,8 @@ volatile uint32_t ulDummy = 0UL; extern uint32_t * __privileged_functions_start__; extern uint32_t * __privileged_functions_end__; extern uint32_t * __syscalls_flash_start__; + extern uint32_t * __syscalls_flash_end__; + extern uint32_t * __unprivileged_flash_start__; extern uint32_t * __unprivileged_flash_end__; extern uint32_t * __privileged_sram_start__; extern uint32_t * __privileged_sram_end__; @@ -377,6 +379,8 @@ volatile uint32_t ulDummy = 0UL; extern uint32_t __privileged_functions_start__[]; extern uint32_t __privileged_functions_end__[]; extern uint32_t __syscalls_flash_start__[]; + extern uint32_t __syscalls_flash_end__[]; + extern uint32_t __unprivileged_flash_start__[]; extern uint32_t __unprivileged_flash_end__[]; extern uint32_t __privileged_sram_start__[]; extern uint32_t __privileged_sram_end__[]; @@ -400,17 +404,26 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_ATTR_INDEX0 ) | ( portMPU_RLAR_REGION_ENABLE ); - /* Setup unprivileged flash and system calls flash as Read Only by - * both privileged and unprivileged tasks. All tasks can read it but - * no-one can modify. */ + /* Setup unprivileged flash as Read Only by both privileged and + * unprivileged tasks. All tasks can read it but no-one can modify. */ portMPU_RNR_REG = portUNPRIVILEGED_FLASH_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + portMPU_RBAR_REG = ( ( ( uint32_t ) __unprivileged_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | ( portMPU_REGION_NON_SHAREABLE ) | ( portMPU_REGION_READ_ONLY ); portMPU_RLAR_REG = ( ( ( uint32_t ) __unprivileged_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | ( portMPU_RLAR_ATTR_INDEX0 ) | ( portMPU_RLAR_REGION_ENABLE ); + /* Setup unprivileged syscalls flash as Read Only by both privileged + * and unprivileged tasks. All tasks can read it but no-one can modify. */ + portMPU_RNR_REG = portUNPRIVILEGED_SYSCALLS_REGION; + portMPU_RBAR_REG = ( ( ( uint32_t ) __syscalls_flash_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | + ( portMPU_REGION_NON_SHAREABLE ) | + ( portMPU_REGION_READ_ONLY ); + portMPU_RLAR_REG = ( ( ( uint32_t ) __syscalls_flash_end__ ) & portMPU_RLAR_ADDRESS_MASK ) | + ( portMPU_RLAR_ATTR_INDEX0 ) | + ( portMPU_RLAR_REGION_ENABLE ); + /* Setup RAM containing kernel data for privileged access only. */ portMPU_RNR_REG = portPRIVILEGED_RAM_REGION; portMPU_RBAR_REG = ( ( ( uint32_t ) __privileged_sram_start__ ) & portMPU_RBAR_ADDRESS_MASK ) | @@ -421,17 +434,6 @@ volatile uint32_t ulDummy = 0UL; ( portMPU_RLAR_ATTR_INDEX0 ) | ( portMPU_RLAR_REGION_ENABLE ); - /* By default allow everything to access the general peripherals. - * The system peripherals and registers are protected. */ - portMPU_RNR_REG = portUNPRIVILEGED_DEVICE_REGION; - portMPU_RBAR_REG = ( ( ( uint32_t ) portDEVICE_REGION_START_ADDRESS ) & portMPU_RBAR_ADDRESS_MASK ) | - ( portMPU_REGION_NON_SHAREABLE ) | - ( portMPU_REGION_READ_WRITE ) | - ( portMPU_REGION_EXECUTE_NEVER ); - portMPU_RLAR_REG = ( ( ( uint32_t ) portDEVICE_REGION_END_ADDRESS ) & portMPU_RLAR_ADDRESS_MASK ) | - ( portMPU_RLAR_ATTR_INDEX1 ) | - ( portMPU_RLAR_REGION_ENABLE ); - /* Enable mem fault. */ portSCB_SYS_HANDLER_CTRL_STATE_REG |= portSCB_MEM_FAULT_ENABLE;