X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=FreeRTOS%2FSource%2Fportable%2FIAR%2FLPC2000%2Fport.c;h=013ddfc3864c4f48278190312e5ea1e0bcb58764;hb=04f5830e5a04fd6d0d953fefe62e3c2ae922a5b1;hp=6f82d60d95cdeb29270290fc65bbca1fb74d0343;hpb=6f15095a36d23074cfc0e0a43b889c9d55472e01;p=freertos diff --git a/FreeRTOS/Source/portable/IAR/LPC2000/port.c b/FreeRTOS/Source/portable/IAR/LPC2000/port.c index 6f82d60d9..013ddfc38 100644 --- a/FreeRTOS/Source/portable/IAR/LPC2000/port.c +++ b/FreeRTOS/Source/portable/IAR/LPC2000/port.c @@ -1,75 +1,96 @@ /* - FreeRTOS V7.4.1 - Copyright (C) 2013 Real Time Engineers Ltd. - - FEATURES AND PORTS ARE ADDED TO FREERTOS ALL THE TIME. PLEASE VISIT - http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. - - *************************************************************************** - * * - * FreeRTOS tutorial books are available in pdf and paperback. * - * Complete, revised, and edited pdf reference manuals are also * - * available. * - * * - * Purchasing FreeRTOS documentation will not only help you, by * - * ensuring you get running as quickly as possible and with an * - * in-depth knowledge of how to use FreeRTOS, it will also help * - * the FreeRTOS project to continue with its mission of providing * - * professional grade, cross platform, de facto standard solutions * - * for microcontrollers - completely free of charge! * - * * - * >>> See http://www.FreeRTOS.org/Documentation for details. <<< * - * * - * Thank you for using FreeRTOS, and thank you for your support! * - * * - *************************************************************************** + FreeRTOS V8.2.0rc1 - Copyright (C) 2014 Real Time Engineers Ltd. + All rights reserved + VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. This file is part of the FreeRTOS distribution. FreeRTOS is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License (version 2) as published by the - Free Software Foundation AND MODIFIED BY the FreeRTOS exception. + Free Software Foundation >>!AND MODIFIED BY!<< the FreeRTOS exception. - >>>>>>NOTE<<<<<< The modification to the GPL is included to allow you to - distribute a combined work that includes FreeRTOS without being obliged to - provide the source code for proprietary components outside of the FreeRTOS - kernel. + >>! NOTE: The modification to the GPL is included to allow you to !<< + >>! distribute a combined work that includes FreeRTOS without being !<< + >>! obliged to provide the source code for proprietary components !<< + >>! outside of the FreeRTOS kernel. !<< FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS - FOR A PARTICULAR PURPOSE. See the GNU General Public License for more - details. You should have received a copy of the GNU General Public License - and the FreeRTOS license exception along with FreeRTOS; if not it can be - viewed here: http://www.freertos.org/a00114.html and also obtained by - writing to Real Time Engineers Ltd., contact details for whom are available - on the FreeRTOS WEB site. + FOR A PARTICULAR PURPOSE. Full license text is available on the following + link: http://www.freertos.org/a00114.html 1 tab == 4 spaces! *************************************************************************** * * * Having a problem? Start by reading the FAQ "My application does * - * not run, what could be wrong?" * + * not run, what could be wrong?". Have you defined configASSERT()? * * * * http://www.FreeRTOS.org/FAQHelp.html * * * *************************************************************************** + *************************************************************************** + * * + * FreeRTOS provides completely free yet professionally developed, * + * robust, strictly quality controlled, supported, and cross * + * platform software that is more than just the market leader, it * + * is the industry's de facto standard. * + * * + * Help yourself get started quickly while simultaneously helping * + * to support the FreeRTOS project by purchasing a FreeRTOS * + * tutorial book, reference manual, or both: * + * http://www.FreeRTOS.org/Documentation * + * * + *************************************************************************** + + *************************************************************************** + * * + * Investing in training allows your team to be as productive as * + * possible as early as possible, lowering your overall development * + * cost, and enabling you to bring a more robust product to market * + * earlier than would otherwise be possible. Richard Barry is both * + * the architect and key author of FreeRTOS, and so also the world's * + * leading authority on what is the world's most popular real time * + * kernel for deeply embedded MCU designs. Obtaining your training * + * from Richard ensures your team will gain directly from his in-depth * + * product knowledge and years of usage experience. Contact Real Time * + * Engineers Ltd to enquire about the FreeRTOS Masterclass, presented * + * by Richard Barry: http://www.FreeRTOS.org/contact + * * + *************************************************************************** + + *************************************************************************** + * * + * You are receiving this top quality software for free. Please play * + * fair and reciprocate by reporting any suspected issues and * + * participating in the community forum: * + * http://www.FreeRTOS.org/support * + * * + * Thank you! * + * * + *************************************************************************** - http://www.FreeRTOS.org - Documentation, books, training, latest versions, + http://www.FreeRTOS.org - Documentation, books, training, latest versions, license and Real Time Engineers Ltd. contact details. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, - including FreeRTOS+Trace - an indispensable productivity tool, and our new - fully thread aware and reentrant UDP/IP stack. - - http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High - Integrity Systems, who sell the code with commercial support, - indemnification and middleware, under the OpenRTOS brand. - - http://www.SafeRTOS.com - High Integrity Systems also provide a safety - engineered and independently SIL3 certified version for use in safety and + including FreeRTOS+Trace - an indispensable productivity tool, a DOS + compatible FAT file system, and our tiny thread aware UDP/IP stack. + + http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. + Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. + + http://www.OpenRTOS.com - Real Time Engineers ltd license FreeRTOS to High + Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS + licenses offer ticketed support, indemnification and commercial middleware. + + http://www.SafeRTOS.com - High Integrity Systems also provide a safety + engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. + + 1 tab == 4 spaces! */ /*----------------------------------------------------------- @@ -93,36 +114,36 @@ #include "task.h" /* Constants required to setup the tick ISR. */ -#define portENABLE_TIMER ( ( unsigned char ) 0x01 ) +#define portENABLE_TIMER ( ( uint8_t ) 0x01 ) #define portPRESCALE_VALUE 0x00 -#define portINTERRUPT_ON_MATCH ( ( unsigned long ) 0x01 ) -#define portRESET_COUNT_ON_MATCH ( ( unsigned long ) 0x02 ) +#define portINTERRUPT_ON_MATCH ( ( uint32_t ) 0x01 ) +#define portRESET_COUNT_ON_MATCH ( ( uint32_t ) 0x02 ) /* Constants required to setup the initial stack. */ -#define portINITIAL_SPSR ( ( portSTACK_TYPE ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */ -#define portTHUMB_MODE_BIT ( ( portSTACK_TYPE ) 0x20 ) -#define portINSTRUCTION_SIZE ( ( portSTACK_TYPE ) 4 ) +#define portINITIAL_SPSR ( ( StackType_t ) 0x1f ) /* System mode, ARM mode, interrupts enabled. */ +#define portTHUMB_MODE_BIT ( ( StackType_t ) 0x20 ) +#define portINSTRUCTION_SIZE ( ( StackType_t ) 4 ) /* Constants required to setup the PIT. */ -#define portPIT_CLOCK_DIVISOR ( ( unsigned long ) 16 ) -#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_RATE_MS ) +#define portPIT_CLOCK_DIVISOR ( ( uint32_t ) 16 ) +#define portPIT_COUNTER_VALUE ( ( ( configCPU_CLOCK_HZ / portPIT_CLOCK_DIVISOR ) / 1000UL ) * portTICK_PERIOD_MS ) /* Constants required to handle interrupts. */ -#define portTIMER_MATCH_ISR_BIT ( ( unsigned char ) 0x01 ) -#define portCLEAR_VIC_INTERRUPT ( ( unsigned long ) 0 ) +#define portTIMER_MATCH_ISR_BIT ( ( uint8_t ) 0x01 ) +#define portCLEAR_VIC_INTERRUPT ( ( uint32_t ) 0 ) /* Constants required to handle critical sections. */ -#define portNO_CRITICAL_NESTING ( ( unsigned long ) 0 ) +#define portNO_CRITICAL_NESTING ( ( uint32_t ) 0 ) #define portINT_LEVEL_SENSITIVE 0 -#define portPIT_ENABLE ( ( unsigned short ) 0x1 << 24 ) -#define portPIT_INT_ENABLE ( ( unsigned short ) 0x1 << 25 ) +#define portPIT_ENABLE ( ( uint16_t ) 0x1 << 24 ) +#define portPIT_INT_ENABLE ( ( uint16_t ) 0x1 << 25 ) /* Constants required to setup the VIC for the tick ISR. */ -#define portTIMER_VIC_CHANNEL ( ( unsigned long ) 0x0004 ) -#define portTIMER_VIC_CHANNEL_BIT ( ( unsigned long ) 0x0010 ) -#define portTIMER_VIC_ENABLE ( ( unsigned long ) 0x0020 ) +#define portTIMER_VIC_CHANNEL ( ( uint32_t ) 0x0004 ) +#define portTIMER_VIC_CHANNEL_BIT ( ( uint32_t ) 0x0010 ) +#define portTIMER_VIC_ENABLE ( ( uint32_t ) 0x0020 ) /*-----------------------------------------------------------*/ @@ -132,7 +153,7 @@ static void prvSetupTimerInterrupt( void ); /* ulCriticalNesting will get set to zero when the first task starts. It cannot be initialised to 0 as this will cause interrupts to be enabled during the kernel initialisation process. */ -unsigned long ulCriticalNesting = ( unsigned long ) 9999; +uint32_t ulCriticalNesting = ( uint32_t ) 9999; /*-----------------------------------------------------------*/ @@ -142,9 +163,9 @@ unsigned long ulCriticalNesting = ( unsigned long ) 9999; * * See header file for description. */ -portSTACK_TYPE *pxPortInitialiseStack( portSTACK_TYPE *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters ) +StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) { -portSTACK_TYPE *pxOriginalTOS; +StackType_t *pxOriginalTOS; pxOriginalTOS = pxTopOfStack; @@ -154,47 +175,47 @@ portSTACK_TYPE *pxOriginalTOS; /* First on the stack is the return address - which in this case is the start of the task. The offset is added to make the return address appear as it would within an IRQ ISR. */ - *pxTopOfStack = ( portSTACK_TYPE ) pxCode + portINSTRUCTION_SIZE; + *pxTopOfStack = ( StackType_t ) pxCode + portINSTRUCTION_SIZE; pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0xaaaaaaaa; /* R14 */ + *pxTopOfStack = ( StackType_t ) 0xaaaaaaaa; /* R14 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ + *pxTopOfStack = ( StackType_t ) pxOriginalTOS; /* Stack used when task starts goes in R13. */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x12121212; /* R12 */ + *pxTopOfStack = ( StackType_t ) 0x12121212; /* R12 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x11111111; /* R11 */ + *pxTopOfStack = ( StackType_t ) 0x11111111; /* R11 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x10101010; /* R10 */ + *pxTopOfStack = ( StackType_t ) 0x10101010; /* R10 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x09090909; /* R9 */ + *pxTopOfStack = ( StackType_t ) 0x09090909; /* R9 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x08080808; /* R8 */ + *pxTopOfStack = ( StackType_t ) 0x08080808; /* R8 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x07070707; /* R7 */ + *pxTopOfStack = ( StackType_t ) 0x07070707; /* R7 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x06060606; /* R6 */ + *pxTopOfStack = ( StackType_t ) 0x06060606; /* R6 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x05050505; /* R5 */ + *pxTopOfStack = ( StackType_t ) 0x05050505; /* R5 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x04040404; /* R4 */ + *pxTopOfStack = ( StackType_t ) 0x04040404; /* R4 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x03030303; /* R3 */ + *pxTopOfStack = ( StackType_t ) 0x03030303; /* R3 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x02020202; /* R2 */ + *pxTopOfStack = ( StackType_t ) 0x02020202; /* R2 */ pxTopOfStack--; - *pxTopOfStack = ( portSTACK_TYPE ) 0x01010101; /* R1 */ + *pxTopOfStack = ( StackType_t ) 0x01010101; /* R1 */ pxTopOfStack--; /* When the task starts is will expect to find the function parameter in R0. */ - *pxTopOfStack = ( portSTACK_TYPE ) pvParameters; /* R0 */ + *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ pxTopOfStack--; /* The status register is set for system mode, with interrupts enabled. */ - *pxTopOfStack = ( portSTACK_TYPE ) portINITIAL_SPSR; + *pxTopOfStack = ( StackType_t ) portINITIAL_SPSR; - if( ( ( unsigned long ) pxCode & 0x01UL ) != 0x00UL ) + if( ( ( uint32_t ) pxCode & 0x01UL ) != 0x00UL ) { /* We want the task to start in thumb mode. */ *pxTopOfStack |= portTHUMB_MODE_BIT; @@ -211,7 +232,7 @@ portSTACK_TYPE *pxOriginalTOS; } /*-----------------------------------------------------------*/ -portBASE_TYPE xPortStartScheduler( void ) +BaseType_t xPortStartScheduler( void ) { extern void vPortStartFirstTask( void ); @@ -244,7 +265,7 @@ void vPortEndScheduler( void ) /* Increment the tick count - which may wake some tasks but as the preemptive scheduler is not being used any woken task is not given processor time no matter what its priority. */ - vTaskIncrementTick(); + xTaskIncrementTick(); /* Ready for the next interrupt. */ T0IR = portTIMER_MATCH_ISR_BIT; @@ -259,12 +280,13 @@ void vPortEndScheduler( void ) void vPortPreemptiveTick( void ) { /* Increment the tick counter. */ - vTaskIncrementTick(); - - /* The new tick value might unblock a task. Ensure the highest task that - is ready to execute is the task that will execute when the tick ISR - exits. */ - vTaskSwitchContext(); + if( xTaskIncrementTick() != pdFALSE ) + { + /* The new tick value might unblock a task. Ensure the highest task that + is ready to execute is the task that will execute when the tick ISR + exits. */ + vTaskSwitchContext(); + } /* Ready for the next interrupt. */ T0IR = portTIMER_MATCH_ISR_BIT; @@ -277,7 +299,7 @@ void vPortEndScheduler( void ) static void prvSetupTimerInterrupt( void ) { -unsigned long ulCompareMatch; +uint32_t ulCompareMatch; /* A 1ms tick does not require the use of the timer prescale. This is defaulted to zero but can be used if necessary. */ @@ -309,13 +331,13 @@ unsigned long ulCompareMatch; { extern void ( vPortPreemptiveTickEntry )( void ); - VICVectAddr0 = ( unsigned long ) vPortPreemptiveTickEntry; + VICVectAddr0 = ( uint32_t ) vPortPreemptiveTickEntry; } #else { extern void ( vNonPreemptiveTick )( void ); - VICVectAddr0 = ( long ) vPortNonPreemptiveTick; + VICVectAddr0 = ( int32_t ) vPortNonPreemptiveTick; } #endif