X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=FreeRTOS%2FSource%2Fportable%2FRVDS%2FARM_CM0%2Fport.c;h=8282984b507a06e5c83bf6c7f318c36550d0126f;hb=242c5762008b65c36750bc9873ded41dce1ba223;hp=8674a63a85f53d471759411e35a147101ae16a4f;hpb=97fffb1d1d396472be491bbdb38503c7dc2ba44d;p=freertos

diff --git a/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c b/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
index 8674a63a8..8282984b5 100644
--- a/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
+++ b/FreeRTOS/Source/portable/RVDS/ARM_CM0/port.c
@@ -1,6 +1,6 @@
 /*
- * FreeRTOS Kernel V10.1.0
- * Copyright (C) 2018 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ * FreeRTOS Kernel V10.2.1
+ * Copyright (C) 2019 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy of
  * this software and associated documentation files (the "Software"), to deal in
@@ -34,22 +34,33 @@
 #include "task.h"
 
 /* Constants required to manipulate the NVIC. */
-#define portNVIC_SYSTICK_CTRL			( ( volatile uint32_t * ) 0xe000e010 )
-#define portNVIC_SYSTICK_LOAD			( ( volatile uint32_t * ) 0xe000e014 )
-#define portNVIC_SYSTICK_CURRENT_VALUE	( ( volatile uint32_t * ) 0xe000e018 )
-#define portNVIC_INT_CTRL			( ( volatile uint32_t *) 0xe000ed04 )
-#define portNVIC_SYSPRI2			( ( volatile uint32_t *) 0xe000ed20 )
-#define portNVIC_SYSTICK_CLK		0x00000004
-#define portNVIC_SYSTICK_INT		0x00000002
-#define portNVIC_SYSTICK_ENABLE		0x00000001
-#define portNVIC_PENDSVSET			0x10000000
-#define portMIN_INTERRUPT_PRIORITY	( 255UL )
-#define portNVIC_PENDSV_PRI			( portMIN_INTERRUPT_PRIORITY << 16UL )
-#define portNVIC_SYSTICK_PRI		( portMIN_INTERRUPT_PRIORITY << 24UL )
+#define portNVIC_SYSTICK_CTRL_REG			( * ( ( volatile uint32_t * ) 0xe000e010 ) )
+#define portNVIC_SYSTICK_LOAD_REG			( * ( ( volatile uint32_t * ) 0xe000e014 ) )
+#define portNVIC_SYSTICK_CURRENT_VALUE_REG	( * ( ( volatile uint32_t * ) 0xe000e018 ) )
+#define portNVIC_INT_CTRL_REG				( * ( ( volatile uint32_t * ) 0xe000ed04 ) )
+#define portNVIC_SYSPRI2_REG				( * ( ( volatile uint32_t * ) 0xe000ed20 ) )
+#define portNVIC_SYSTICK_CLK_BIT			( 1UL << 2UL )
+#define portNVIC_SYSTICK_INT_BIT			( 1UL << 1UL )
+#define portNVIC_SYSTICK_ENABLE_BIT			( 1UL << 0UL )
+#define portNVIC_SYSTICK_COUNT_FLAG_BIT		( 1UL << 16UL )
+#define portNVIC_PENDSVSET_BIT				( 1UL << 28UL )
+#define portMIN_INTERRUPT_PRIORITY			( 255UL )
+#define portNVIC_PENDSV_PRI					( portMIN_INTERRUPT_PRIORITY << 16UL )
+#define portNVIC_SYSTICK_PRI				( portMIN_INTERRUPT_PRIORITY << 24UL )
 
 /* Constants required to set up the initial stack. */
 #define portINITIAL_XPSR			( 0x01000000 )
 
+/* The systick is a 24-bit counter. */
+#define portMAX_24_BIT_NUMBER		( 0xffffffUL )
+
+/* A fiddle factor to estimate the number of SysTick counts that would have
+ occurred while the SysTick counter is stopped during tickless idle
+ calculations. */
+#ifndef portMISSED_COUNTS_FACTOR
+	#define portMISSED_COUNTS_FACTOR	( 45UL )
+#endif
+
 /* Constants used with memory barrier intrinsics. */
 #define portSY_FULL_READ_WRITE		( 15 )
 
@@ -57,6 +68,24 @@
 variable. */
 static UBaseType_t uxCriticalNesting = 0xaaaaaaaa;
 
+/* The number of SysTick increments that make up one tick period. */
+#if( configUSE_TICKLESS_IDLE == 1 )
+	static uint32_t ulTimerCountsForOneTick = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+
+/* The maximum number of tick periods that can be suppressed is limited by the
+ 24 bit resolution of the SysTick timer. */
+#if( configUSE_TICKLESS_IDLE == 1 )
+	static uint32_t xMaximumPossibleSuppressedTicks = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+
+ /* Compensate for the CPU cycles that pass while the SysTick is stopped (low
+ power functionality only.
+*/
+#if( configUSE_TICKLESS_IDLE == 1 )
+	static uint32_t ulStoppedTimerCompensation = 0;
+#endif /* configUSE_TICKLESS_IDLE */
+
 /*
  * Setup the timer to generate the tick interrupts.
  */
@@ -157,9 +186,9 @@ __asm void prvPortStartFirstTask( void )
  */
 BaseType_t xPortStartScheduler( void )
 {
-	/* Make PendSV, CallSV and SysTick the same priroity as the kernel. */
-	*(portNVIC_SYSPRI2) |= portNVIC_PENDSV_PRI;
-	*(portNVIC_SYSPRI2) |= portNVIC_SYSTICK_PRI;
+	/* Make PendSV, CallSV and SysTick the same priority as the kernel. */
+	portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI;
+	portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI;
 
 	/* Start the timer that generates the tick ISR.  Interrupts are disabled
 	here already. */
@@ -187,7 +216,7 @@ void vPortEndScheduler( void )
 void vPortYield( void )
 {
 	/* Set a PendSV to request a context switch. */
-	*( portNVIC_INT_CTRL ) = portNVIC_PENDSVSET;
+	portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 
 	/* Barriers are normally not required but do ensure the code is completely
 	within the specified behaviour for the architecture. */
@@ -287,7 +316,7 @@ uint32_t ulPreviousMask;
 		if( xTaskIncrementTick() != pdFALSE )
 		{
 			/* Pend a context switch. */
-			*(portNVIC_INT_CTRL) = portNVIC_PENDSVSET;
+			portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT;
 		}
 	}
 	portCLEAR_INTERRUPT_MASK_FROM_ISR( ulPreviousMask );
@@ -300,13 +329,187 @@ uint32_t ulPreviousMask;
  */
 void prvSetupTimerInterrupt( void )
 {
+	/* Calculate the constants required to configure the tick interrupt. */
+	#if( configUSE_TICKLESS_IDLE == 1 )
+		ulTimerCountsForOneTick = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ );
+		xMaximumPossibleSuppressedTicks = portMAX_24_BIT_NUMBER / ulTimerCountsForOneTick;
+		ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR;
+	#endif /* configUSE_TICKLESS_IDLE */
+
 	/* Stop and reset the SysTick. */
-	*(portNVIC_SYSTICK_CTRL) = 0UL;
-	*(portNVIC_SYSTICK_CURRENT_VALUE) = 0UL;
+	portNVIC_SYSTICK_CTRL_REG = 0UL;
+	portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
 
 	/* Configure SysTick to interrupt at the requested rate. */
-	*(portNVIC_SYSTICK_LOAD) = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
-	*(portNVIC_SYSTICK_CTRL) = portNVIC_SYSTICK_CLK | portNVIC_SYSTICK_INT | portNVIC_SYSTICK_ENABLE;
+	portNVIC_SYSTICK_LOAD_REG = ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL;
+	portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT;
 }
 /*-----------------------------------------------------------*/
 
+#if( configUSE_TICKLESS_IDLE == 1 )
+
+__weak void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime )
+{
+uint32_t ulReloadValue, ulCompleteTickPeriods, ulCompletedSysTickDecrements;
+TickType_t xModifiableIdleTime;
+
+	/* Make sure the SysTick reload value does not overflow the counter. */
+	if( xExpectedIdleTime > xMaximumPossibleSuppressedTicks )
+	{
+		xExpectedIdleTime = xMaximumPossibleSuppressedTicks;
+	}
+
+	/* Stop the SysTick momentarily. The time the SysTick is stopped for
+	is accounted for as best it can be, but using the tickless mode will
+	inevitably result in some tiny drift of the time maintained by the
+	kernel with respect to calendar time. */
+	portNVIC_SYSTICK_CTRL_REG &= ~portNVIC_SYSTICK_ENABLE_BIT;
+
+	/* Calculate the reload value required to wait xExpectedIdleTime
+	tick periods.  -1 is used because this code will execute part way
+	through one of the tick periods. */
+	ulReloadValue = portNVIC_SYSTICK_CURRENT_VALUE_REG + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) );
+	if( ulReloadValue > ulStoppedTimerCompensation )
+	{
+		ulReloadValue -= ulStoppedTimerCompensation;
+	}
+
+	/* Enter a critical section but don't use the taskENTER_CRITICAL()
+	method as that will mask interrupts that should exit sleep mode. */
+	__disable_irq();
+	__dsb( portSY_FULL_READ_WRITE );
+	__isb( portSY_FULL_READ_WRITE );
+
+	/* If a context switch is pending or a task is waiting for the scheduler
+	to be unsuspended then abandon the low power entry. */
+	if( eTaskConfirmSleepModeStatus() == eAbortSleep )
+	{
+		/* Restart from whatever is left in the count register to complete
+		this tick period. */
+		portNVIC_SYSTICK_LOAD_REG = portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+		/* Restart SysTick. */
+		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+		/* Reset the reload register to the value required for normal tick
+		periods. */
+		portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+		/* Re-enable interrupts - see comments above __disable_irq() call
+		above. */
+		__enable_irq();
+	}
+	else
+	{
+		/* Set the new reload value. */
+		portNVIC_SYSTICK_LOAD_REG = ulReloadValue;
+
+		/* Clear the SysTick count flag and set the count value back to
+		zero. */
+		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+
+		/* Restart SysTick. */
+		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+
+		/* Sleep until something happens. configPRE_SLEEP_PROCESSING() can
+		set its parameter to 0 to indicate that its implementation contains
+		its own wait for interrupt or wait for event instruction, and so wfi
+		should not be executed again. However, the original expected idle
+		time variable must remain unmodified, so a copy is taken. */
+		xModifiableIdleTime = xExpectedIdleTime;
+		configPRE_SLEEP_PROCESSING( xModifiableIdleTime );
+		if( xModifiableIdleTime > 0 )
+		{
+			__dsb( portSY_FULL_READ_WRITE );
+			__wfi();
+			__isb( portSY_FULL_READ_WRITE );
+		}
+		configPOST_SLEEP_PROCESSING( xExpectedIdleTime );
+
+		/* Re-enable interrupts to allow the interrupt that brought the MCU
+		out of sleep mode to execute immediately. see comments above
+		__disable_interrupt() call above. */
+		__enable_irq();
+		__dsb( portSY_FULL_READ_WRITE );
+		__isb( portSY_FULL_READ_WRITE );
+
+		/* Disable interrupts again because the clock is about to be stopped
+		and interrupts that execute while the clock is stopped will increase
+		any slippage between the time maintained by the RTOS and calendar
+		time. */
+		__disable_irq();
+		__dsb( portSY_FULL_READ_WRITE );
+		__isb( portSY_FULL_READ_WRITE );
+
+		/* Disable the SysTick clock without reading the
+		portNVIC_SYSTICK_CTRL_REG register to ensure the
+		portNVIC_SYSTICK_COUNT_FLAG_BIT is not cleared if it is set.  Again,
+		the time the SysTick is stopped for is accounted for as best it can
+		be, but using the tickless mode will inevitably result in some tiny
+		drift of the time maintained by the kernel with respect to calendar
+		time*/
+		portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT );
+
+		/* Determine if the SysTick clock has already counted to zero and
+		been set back to the current reload value (the reload back being
+		correct for the entire expected idle time) or if the SysTick is yet
+		to count to zero (in which case an interrupt other than the SysTick
+		must have brought the system out of sleep mode). */
+		if( ( portNVIC_SYSTICK_CTRL_REG & portNVIC_SYSTICK_COUNT_FLAG_BIT ) != 0 )
+		{
+			uint32_t ulCalculatedLoadValue;
+
+			/* The tick interrupt is already pending, and the SysTick count
+			reloaded with ulReloadValue.  Reset the
+			portNVIC_SYSTICK_LOAD with whatever remains of this tick
+			period. */
+			ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CURRENT_VALUE_REG );
+
+			/* Don't allow a tiny value, or values that have somehow
+			underflowed because the post sleep hook did something
+			that took too long. */
+			if( ( ulCalculatedLoadValue < ulStoppedTimerCompensation ) || ( ulCalculatedLoadValue > ulTimerCountsForOneTick ) )
+			{
+				ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL );
+			}
+
+			portNVIC_SYSTICK_LOAD_REG = ulCalculatedLoadValue;
+
+			/* As the pending tick will be processed as soon as this
+			function exits, the tick value maintained by the tick is stepped
+			forward by one less than the time spent waiting. */
+			ulCompleteTickPeriods = xExpectedIdleTime - 1UL;
+		}
+		else
+		{
+			/* Something other than the tick interrupt ended the sleep.
+			Work out how long the sleep lasted rounded to complete tick
+			periods (not the ulReload value which accounted for part
+			ticks). */
+			ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - portNVIC_SYSTICK_CURRENT_VALUE_REG;
+
+			/* How many complete tick periods passed while the processor
+			was waiting? */
+			ulCompleteTickPeriods = ulCompletedSysTickDecrements / ulTimerCountsForOneTick;
+
+			/* The reload value is set to whatever fraction of a single tick
+			period remains. */
+			portNVIC_SYSTICK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDecrements;
+		}
+
+		/* Restart SysTick so it runs from portNVIC_SYSTICK_LOAD
+		again, then set portNVIC_SYSTICK_LOAD back to its standard
+		value. */
+		portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
+		portNVIC_SYSTICK_CTRL_REG |= portNVIC_SYSTICK_ENABLE_BIT;
+		vTaskStepTick( ulCompleteTickPeriods );
+		portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL;
+
+		/* Exit with interrpts enabled. */
+		__enable_irq();
+	}
+}
+
+#endif /* #if configUSE_TICKLESS_IDLE */
+
+/*-----------------------------------------------------------*/