X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=1ea397a35cadd7efcb7008e815ea13074320794c;hb=793ea947703899c36a51c30e477466c49a8e9657;hp=82224f75e4964a21d92a425eb12e9de6508b5a5a;hpb=122d805fd4bd478bb83536348291d34ae648364b;p=u-boot diff --git a/README b/README index 82224f75e4..1ea397a35c 100644 --- a/README +++ b/README @@ -690,6 +690,14 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply! + COUNTER_FREQUENCY + Generic timer clock source frequency. + + COUNTER_FREQUENCY_REAL + Generic timer clock source frequency if the real clock is + different from COUNTER_FREQUENCY, and can only be determined + at run time. + NOTE: The following can be machine specific errata. These do have ability to provide rudimentary version and machine specific checks, but expect no product checks. @@ -1865,12 +1873,6 @@ CBFS (Coreboot Filesystem) support boot. See the documentation file README.video for a description of this variable. - CONFIG_VIDEO_VGA - - Enable the VGA video / BIOS for x86. The alternative if you - are using coreboot is to use the coreboot frame buffer - driver. - - Keyboard Support: CONFIG_KEYBOARD @@ -2395,6 +2397,8 @@ CBFS (Coreboot Filesystem) support - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE If those defines are not set, default value is 100000 for speed, and 0 for slave. + - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3 + - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4 - drivers/i2c/rcar_i2c.c: - activate this driver with CONFIG_SYS_I2C_RCAR @@ -4871,6 +4875,9 @@ Low Level (hardware related) configuration options: - CONFIG_FSL_DDR_SYNC_REFRESH Enable sync of refresh for multiple controllers. +- CONFIG_FSL_DDR_BIST + Enable built-in memory test for Freescale DDR controllers. + - CONFIG_SYS_83XX_DDR_USES_CS0 Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. @@ -5466,7 +5473,7 @@ loaded to, and "Flash Location" gives the image's address in NOR flash or offset in NAND flash. *Note* - these variables don't have to be defined for all boards, some -boards currenlty use other variables for these purposes, and some +boards currently use other variables for these purposes, and some boards use these variables for other purposes. Image File Name RAM Address Flash Location