X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=246ae2badca47cefc8106de76bc2adfbbee859e4;hb=refs%2Fheads%2FGPL-Cleanup;hp=b10b539fa8d3362dc476a5e7b8dd20e4e5740e73;hpb=07f3d789b9beb7ce3278c974f4d5c8f51b6ab567;p=u-boot diff --git a/README b/README index b10b539fa8..246ae2badc 100644 --- a/README +++ b/README @@ -151,6 +151,7 @@ Directory Hierarchy: - arm926ejs Files specific to ARM 926 CPUs - arm1136 Files specific to ARM 1136 CPUs - at32ap Files specific to Atmel AVR32 AP CPUs + - blackfin Files specific to Analog Devices Blackfin CPUs - i386 Files specific to i386 CPUs - ixp Files specific to Intel XScale IXP CPUs - leon2 Files specific to Gaisler LEON2 SPARC CPU @@ -182,6 +183,7 @@ Directory Hierarchy: - include Header Files - lib_arm Files generic to ARM architecture - lib_avr32 Files generic to AVR32 architecture +- lib_blackfin Files generic to Blackfin architecture - lib_generic Files generic to all architectures - lib_i386 Files generic to i386 architecture - lib_m68k Files generic to m68k architecture @@ -210,7 +212,7 @@ There are two classes of configuration variables: * Configuration _SETTINGS_: These depend on the hardware etc. and should not be meddled with if you don't know what you're doing; they have names beginning with - "CFG_". + "CONFIG_SYS_". Later we will add a configuration tool - probably similar to or even identical to what's used for the Linux kernel. Right now, we have to @@ -284,10 +286,10 @@ The following options need to be configured: - Board flavour: (if CONFIG_MPC8260ADS is defined) CONFIG_ADSTYPE Possible values are: - CFG_8260ADS - original MPC8260ADS - CFG_8266ADS - MPC8266ADS - CFG_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR - CFG_8272ADS - MPC8272ADS + CONFIG_SYS_8260ADS - original MPC8260ADS + CONFIG_SYS_8266ADS - MPC8266ADS + CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR + CONFIG_SYS_8272ADS - MPC8272ADS - MPC824X Family Member (if CONFIG_MPC824X is defined) Define exactly one of @@ -302,28 +304,33 @@ The following options need to be configured: or XTAL/EXTAL) - 859/866/885 CPU options: (if using a MPC859 or MPC866 or MPC885 CPU): - CFG_8xx_CPUCLK_MIN - CFG_8xx_CPUCLK_MAX + CONFIG_SYS_8xx_CPUCLK_MIN + CONFIG_SYS_8xx_CPUCLK_MAX CONFIG_8xx_CPUCLK_DEFAULT See doc/README.MPC866 - CFG_MEASURE_CPUCLK + CONFIG_SYS_MEASURE_CPUCLK Define this to measure the actual CPU clock instead of relying on the correctness of the configured values. Mostly useful for board bringup to make sure the PLL is locked at the intended frequency. Note that this requires a (stable) reference clock (32 kHz - RTC clock or CFG_8XX_XIN) + RTC clock or CONFIG_SYS_8XX_XIN) + + CONFIG_SYS_DELAYED_ICACHE + + Define this option if you want to enable the + ICache only when Code runs from RAM. - Intel Monahans options: - CFG_MONAHANS_RUN_MODE_OSC_RATIO + CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO Defines the Monahans run mode to oscillator ratio. Valid values are 8, 16, 24, 31. The core frequency is this value multiplied by 13 MHz. - CFG_MONAHANS_TURBO_RUN_MODE_RATIO + CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO Defines the Monahans turbo mode to oscillator ratio. Valid values are 1 (default if undefined) and @@ -379,6 +386,24 @@ The following options need to be configured: This define fills in the correct boot CPU in the boot param header, the default value is zero if undefined. +- vxWorks boot parameters: + + bootvx constructs a valid bootline using the following + environments variables: bootfile, ipaddr, serverip, hostname. + It loads the vxWorks image pointed bootfile. + + CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name + CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address + CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server + CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters + + CONFIG_SYS_VXWORKS_ADD_PARAMS + + Add it at the end of the bootline. E.g "u=username pw=secret" + + Note: If a "bootargs" environment is defined, it will overwride + the defaults discussed just above. + - Serial Ports: CONFIG_PL010_SERIAL @@ -436,7 +461,7 @@ The following options need to be configured: CONFIG_CONSOLE_CURSOR cursor drawing on/off (requires blink timer cf. i8042.c) - CFG_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c) + CONFIG_SYS_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c) CONFIG_CONSOLE_TIME display time/date info in upper right corner (requires CONFIG_CMD_DATE) @@ -461,8 +486,16 @@ The following options need to be configured: - Console Baudrate: CONFIG_BAUDRATE - in bps Select one of the baudrates listed in - CFG_BAUDRATE_TABLE, see below. - CFG_BRGCLK_PRESCALE, baudrate prescale + CONFIG_SYS_BAUDRATE_TABLE, see below. + CONFIG_SYS_BRGCLK_PRESCALE, baudrate prescale + +- Console Rx buffer length + With CONFIG_SYS_SMC_RXBUFLEN it is possible to define + the maximum receive buffer length for the SMC. + This option is actual only for 82xx and 8xx possible. + If using CONFIG_SYS_SMC_RXBUFLEN also CONFIG_SYS_MAXIDLE + must be defined, to setup the maximum idle timeout for + the SMC. - Interrupt driven serial port input: CONFIG_SERIAL_SOFTWARE_FIFO @@ -546,7 +579,7 @@ The following options need to be configured: - Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined) CONFIG_KGDB_BAUDRATE Select one of the baudrates listed in - CFG_BAUDRATE_TABLE, see below. + CONFIG_SYS_BAUDRATE_TABLE, see below. - Monitor Functions: Monitor commands can be included or excluded @@ -560,7 +593,6 @@ The following options need to be configured: except those marked below with a "*". CONFIG_CMD_ASKENV * ask for env variable - CONFIG_CMD_AUTOSCRIPT Autoscript Support CONFIG_CMD_BDI bdinfo CONFIG_CMD_BEDBUG * Include BedBug Debugger CONFIG_CMD_BMP * BMP support @@ -571,12 +603,15 @@ The following options need to be configured: CONFIG_CMD_DATE * support for RTC, date/time... CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics - CONFIG_CMD_DOC * Disk-On-Chip Support + CONFIG_CMD_DS4510 * ds4510 I2C gpio commands + CONFIG_CMD_DS4510_INFO * ds4510 I2C info command + CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd + CONFIG_CMD_DS4510_RST * ds4510 I2C rst command CONFIG_CMD_DTT * Digital Therm and Thermostat CONFIG_CMD_ECHO echo arguments CONFIG_CMD_EEPROM * EEPROM read/write support CONFIG_CMD_ELF * bootelf, bootvx - CONFIG_CMD_ENV saveenv + CONFIG_CMD_SAVEENV saveenv CONFIG_CMD_FDC * Floppy Disk Support CONFIG_CMD_FAT * FAT partition support CONFIG_CMD_FDOS * Dos diskette Support @@ -594,13 +629,18 @@ The following options need to be configured: CONFIG_CMD_KGDB * kgdb CONFIG_CMD_LOADB loadb CONFIG_CMD_LOADS loads + CONFIG_CMD_MD5SUM print md5 message digest + (requires CONFIG_CMD_MEMORY and CONFIG_MD5) CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base, loop, loopw, mtest CONFIG_CMD_MISC Misc functions like sleep etc CONFIG_CMD_MMC * MMC memory mapped support CONFIG_CMD_MII * MII utility commands + CONFIG_CMD_MTDPARTS * MTD partition support CONFIG_CMD_NAND * NAND support CONFIG_CMD_NET bootp, tftpboot, rarpboot + CONFIG_CMD_PCA953X * PCA953x I2C gpio commands + CONFIG_CMD_PCA953X_INFO * PCA953x I2C gpio info command CONFIG_CMD_PCI * pciinfo CONFIG_CMD_PCMCIA * PCMCIA support CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network @@ -614,6 +654,9 @@ The following options need to be configured: (requires CONFIG_CMD_I2C) CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) + CONFIG_CMD_SHA1 print sha1 memory digest + (requires CONFIG_CMD_MEMORY) + CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support CONFIG_CMD_USB * USB support CONFIG_CMD_VFD * VFD support (TRAB) @@ -673,11 +716,18 @@ The following options need to be configured: CONFIG_RTC_DS164x - use Dallas DS164x RTC CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC - CFG_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 + CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 Note that if the RTC uses I2C, then the I2C interface must also be configured. See I2C Support, below. +- GPIO Support: + CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO + CONFIG_PCA953X_INFO - enable pca953x info command + + Note that if the GPIO device uses I2C, then the I2C interface + must also be configured. See I2C Support, below. + - Timestamp Support: When CONFIG_TIMESTAMP is selected, the timestamp @@ -711,11 +761,11 @@ The following options need to be configured: CONFIG_LBA48 Set this to enable support for disks larger than 137GB - Also look at CFG_64BIT_LBA ,CFG_64BIT_VSPRINTF and CFG_64BIT_STRTOUL + Also look at CONFIG_SYS_64BIT_LBA ,CONFIG_SYS_64BIT_VSPRINTF and CONFIG_SYS_64BIT_STRTOUL Whithout these , LBA48 support uses 32bit variables and will 'only' support disks up to 2.1TB. - CFG_64BIT_LBA: + CONFIG_SYS_64BIT_LBA: When enabled, makes the IDE subsystem use 64bit sector addresses. Default is 32bit. @@ -724,12 +774,12 @@ The following options need to be configured: SYM53C8XX SCSI controller; define CONFIG_SCSI_SYM53C8XX to enable it. - CFG_SCSI_MAX_LUN [8], CFG_SCSI_MAX_SCSI_ID [7] and - CFG_SCSI_MAX_DEVICE [CFG_SCSI_MAX_SCSI_ID * - CFG_SCSI_MAX_LUN] can be adjusted to define the + CONFIG_SYS_SCSI_MAX_LUN [8], CONFIG_SYS_SCSI_MAX_SCSI_ID [7] and + CONFIG_SYS_SCSI_MAX_DEVICE [CONFIG_SYS_SCSI_MAX_SCSI_ID * + CONFIG_SYS_SCSI_MAX_LUN] can be adjusted to define the maximum numbers of LUNs, SCSI ID's and target devices. - CFG_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz) + CONFIG_SYS_SCSI_SYM53C8XX_CCF to fix clock timing (80Mhz) - NETWORK Support (PCI): CONFIG_E1000 @@ -808,10 +858,14 @@ The following options need to be configured: MPC5200 USB requires additional defines: CONFIG_USB_CLOCK for 528 MHz Clock: 0x0001bbbb + CONFIG_PSC3_USB + for USB on PSC3 CONFIG_USB_CONFIG for differential drivers: 0x00001000 for single ended drivers: 0x00005000 - CFG_USB_EVENT_POLL + for differential drivers on PSC3: 0x00000100 + for single ended drivers on PSC3: 0x00004100 + CONFIG_SYS_USB_EVENT_POLL May be defined to allow interrupt polling instead of using asynchronous interrupts @@ -838,18 +892,18 @@ The following options need to be configured: Define this to have a tty type of device available to talk to the UDC device - CFG_CONSOLE_IS_IN_ENV + CONFIG_SYS_CONSOLE_IS_IN_ENV Define this if you want stdin, stdout &/or stderr to be set to usbtty. mpc8xx: - CFG_USB_EXTC_CLK 0xBLAH + CONFIG_SYS_USB_EXTC_CLK 0xBLAH Derive USB clock from external clock "blah" - - CFG_USB_EXTC_CLK 0x02 + - CONFIG_SYS_USB_EXTC_CLK 0x02 - CFG_USB_BRG_CLK 0xBLAH + CONFIG_SYS_USB_BRG_CLK 0xBLAH Derive USB clock from brgclk - - CFG_USB_BRG_CLK 0x04 + - CONFIG_SYS_USB_BRG_CLK 0x04 If you have a USB-IF assigned VendorID then you may wish to define your own vendor specific values either in BoardName.h @@ -891,16 +945,16 @@ The following options need to be configured: CONFIG_JFFS2_NAND_DEV Define these for a default partition on a NAND device - CFG_JFFS2_FIRST_SECTOR, - CFG_JFFS2_FIRST_BANK, CFG_JFFS2_NUM_BANKS + CONFIG_SYS_JFFS2_FIRST_SECTOR, + CONFIG_SYS_JFFS2_FIRST_BANK, CONFIG_SYS_JFFS2_NUM_BANKS Define these for a default partition on a NOR device - CFG_JFFS_CUSTOM_PART + CONFIG_SYS_JFFS_CUSTOM_PART Define this to create an own partition. You have to provide a function struct part_info* jffs2_part_info(int part_num) If you define only one JFFS2 partition you may also want to - #define CFG_JFFS_SINGLE_PART 1 + #define CONFIG_SYS_JFFS_SINGLE_PART 1 to disable the command chpart. This is the default when you have not defined a custom partition @@ -1014,7 +1068,7 @@ The following options need to be configured: 320x240. Black & white. Normally display is black on white background; define - CFG_WHITE_ON_BLACK to get it inverted. + CONFIG_SYS_WHITE_ON_BLACK to get it inverted. - Splash Screen Support: CONFIG_SPLASH_SCREEN @@ -1027,6 +1081,26 @@ The following options need to be configured: allows for a "silent" boot where a splash screen is loaded very quickly after power-on. + CONFIG_SPLASH_SCREEN_ALIGN + + If this option is set the splash image can be freely positioned + on the screen. Environment variable "splashpos" specifies the + position as "x,y". If a positive number is given it is used as + number of pixel from left/top. If a negative number is given it + is used as number of pixel from right/bottom. You can also + specify 'm' for centering the image. + + Example: + setenv splashpos m,m + => image at center of screen + + setenv splashpos 30,20 + => image at x = 30 and y = 20 + + setenv splashpos -10,m + => vertically centered image + at x = dspWidth - bmpWidth - 9 + - Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP If this option is set, additionally to standard BMP @@ -1041,7 +1115,7 @@ The following options need to be configured: compressed images are supported. NOTE: the bzip2 algorithm requires a lot of RAM, so - the malloc area (as defined by CFG_MALLOC_LEN) should + the malloc area (as defined by CONFIG_SYS_MALLOC_LEN) should be at least 4MB. CONFIG_LZMA @@ -1065,7 +1139,7 @@ The following options need to be configured: Use the lzmainfo tool to determinate the lc and lp values and then calculate the amount of needed dynamic memory (ensuring - the appropriate CFG_MALLOC_LEN value). + the appropriate CONFIG_SYS_MALLOC_LEN value). - MII/PHY support: CONFIG_PHY_ADDR @@ -1118,6 +1192,11 @@ The following options need to be configured: Defines a default value for the IP address of a TFTP server to contact when using the "tftboot" command. + CONFIG_KEEP_SERVERADDR + + Keeps the server's MAC address, in the env 'serveraddr' + for passing to bootargs (like Linux's netconsole option) + - Multicast TFTP Mode: CONFIG_MCAST_TFTP @@ -1268,11 +1347,6 @@ The following options need to be configured: clock chips. See common/cmd_i2c.c for a description of the command line interface. - CONFIG_I2C_CMD_TREE is a recommended option that places - all I2C commands under a single 'i2c' root command. The - older 'imm', 'imd', 'iprobe' etc. commands are considered - deprecated and may disappear in the future. - CONFIG_HARD_I2C selects a hardware I2C controller. CONFIG_SOFT_I2C configures u-boot to use a software (aka @@ -1282,15 +1356,15 @@ The following options need to be configured: There are several other quantities that must also be defined when you define CONFIG_HARD_I2C or CONFIG_SOFT_I2C. - In both cases you will need to define CFG_I2C_SPEED + In both cases you will need to define CONFIG_SYS_I2C_SPEED to be the frequency (in Hz) at which you wish your i2c bus - to run and CFG_I2C_SLAVE to be the address of this node (ie + to run and CONFIG_SYS_I2C_SLAVE to be the address of this node (ie the CPU's i2c node address). Now, the u-boot i2c code for the mpc8xx (cpu/mpc8xx/i2c.c) sets the CPU up as a master node and so its address should therefore be cleared to 0 (See, eg, MPC823e User's Manual - p.16-473). So, set CFG_I2C_SLAVE to 0. + p.16-473). So, set CONFIG_SYS_I2C_SLAVE to 0. That's all that's required for CONFIG_HARD_I2C. @@ -1361,7 +1435,7 @@ The following options need to be configured: #define I2C_DELAY udelay(2) - CFG_I2C_INIT_BOARD + CONFIG_SYS_I2C_INIT_BOARD When a board is reset during an i2c bus transfer chips might think that the current transfer is still @@ -1385,40 +1459,40 @@ The following options need to be configured: active. To switch to a different bus, use the 'i2c dev' command. Note that bus numbering is zero-based. - CFG_I2C_NOPROBES + CONFIG_SYS_I2C_NOPROBES This option specifies a list of I2C devices that will be skipped - when the 'i2c probe' command is issued (or 'iprobe' using the legacy - command). If CONFIG_I2C_MULTI_BUS is set, specify a list of bus-device - pairs. Otherwise, specify a 1D array of device addresses + when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS + is set, specify a list of bus-device pairs. Otherwise, specify + a 1D array of device addresses e.g. #undef CONFIG_I2C_MULTI_BUS - #define CFG_I2C_NOPROBES {0x50,0x68} + #define CONFIG_SYS_I2C_NOPROBES {0x50,0x68} will skip addresses 0x50 and 0x68 on a board with one I2C bus #define CONFIG_I2C_MULTI_BUS - #define CFG_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} + #define CONFIG_SYS_I2C_MULTI_NOPROBES {{0,0x50},{0,0x68},{1,0x54}} will skip addresses 0x50 and 0x68 on bus 0 and address 0x54 on bus 1 - CFG_SPD_BUS_NUM + CONFIG_SYS_SPD_BUS_NUM If defined, then this indicates the I2C bus number for DDR SPD. If not defined, then U-Boot assumes that SPD is on I2C bus 0. - CFG_RTC_BUS_NUM + CONFIG_SYS_RTC_BUS_NUM If defined, then this indicates the I2C bus number for the RTC. If not defined, then U-Boot assumes that RTC is on I2C bus 0. - CFG_DTT_BUS_NUM + CONFIG_SYS_DTT_BUS_NUM If defined, then this indicates the I2C bus number for the DTT. If not defined, then U-Boot assumes that DTT is on I2C bus 0. - CFG_I2C_DTT_ADDR: + CONFIG_SYS_I2C_DTT_ADDR: If defined, specifies the I2C address of the DTT device. If not defined, then U-Boot uses predefined value for @@ -1429,6 +1503,62 @@ The following options need to be configured: Define this option if you want to use Freescale's I2C driver in drivers/i2c/fsl_i2c.c. + CONFIG_I2C_MUX + + Define this option if you have I2C devices reached over 1 .. n + I2C Muxes like the pca9544a. This option addes a new I2C + Command "i2c bus [muxtype:muxaddr:muxchannel]" which adds a + new I2C Bus to the existing I2C Busses. If you select the + new Bus with "i2c dev", u-bbot sends first the commandos for + the muxes to activate this new "bus". + + CONFIG_I2C_MULTI_BUS must be also defined, to use this + feature! + + Example: + Adding a new I2C Bus reached over 2 pca9544a muxes + The First mux with address 70 and channel 6 + The Second mux with address 71 and channel 4 + + => i2c bus pca9544a:70:6:pca9544a:71:4 + + Use the "i2c bus" command without parameter, to get a list + of I2C Busses with muxes: + + => i2c bus + Busses reached over muxes: + Bus ID: 2 + reached over Mux(es): + pca9544a@70 ch: 4 + Bus ID: 3 + reached over Mux(es): + pca9544a@70 ch: 6 + pca9544a@71 ch: 4 + => + + If you now switch to the new I2C Bus 3 with "i2c dev 3" + u-boot sends First the Commando to the mux@70 to enable + channel 6, and then the Commando to the mux@71 to enable + the channel 4. + + After that, you can use the "normal" i2c commands as + usual, to communicate with your I2C devices behind + the 2 muxes. + + This option is actually implemented for the bitbanging + algorithm in common/soft_i2c.c and for the Hardware I2C + Bus on the MPC8260. But it should be not so difficult + to add this option to other architectures. + + CONFIG_SOFT_I2C_READ_REPEATED_START + + defining this will force the i2c_read() function in + the soft_i2c driver to perform an I2C repeated start + between writing the address pointer and reading the + data. If this define is omitted the default behaviour + of doing a stop-start sequence will be used. Most I2C + devices can use either method, but some require one or + the other. - SPI Support: CONFIG_SPI @@ -1482,11 +1612,11 @@ The following options need to be configured: Specify the number of FPGA devices to support. - CFG_FPGA_PROG_FEEDBACK + CONFIG_SYS_FPGA_PROG_FEEDBACK Enable printing of hash marks during FPGA configuration. - CFG_FPGA_CHECK_BUSY + CONFIG_SYS_FPGA_CHECK_BUSY Enable checks on FPGA configuration interface busy status by the configuration function. This option @@ -1498,29 +1628,29 @@ The following options need to be configured: If defined, a function that provides delays in the FPGA configuration driver. - CFG_FPGA_CHECK_CTRLC + CONFIG_SYS_FPGA_CHECK_CTRLC Allow Control-C to interrupt FPGA configuration - CFG_FPGA_CHECK_ERROR + CONFIG_SYS_FPGA_CHECK_ERROR Check for configuration errors during FPGA bitfile loading. For example, abort during Virtex II configuration if the INIT_B line goes low (which indicated a CRC error). - CFG_FPGA_WAIT_INIT + CONFIG_SYS_FPGA_WAIT_INIT Maximum time to wait for the INIT_B line to deassert after PROB_B has been deasserted during a Virtex II FPGA configuration sequence. The default time is 500 ms. - CFG_FPGA_WAIT_BUSY + CONFIG_SYS_FPGA_WAIT_BUSY Maximum time to wait for BUSY to deassert during Virtex II FPGA configuration. The default is 5 ms. - CFG_FPGA_WAIT_CONFIG + CONFIG_SYS_FPGA_WAIT_CONFIG Time to wait after FPGA configuration. The default is 200 ms. @@ -1618,7 +1748,7 @@ The following options need to be configured: for the "hush" shell. - CFG_HUSH_PARSER + CONFIG_SYS_HUSH_PARSER Define this variable to enable the "hush" shell (from Busybox) as command line interpreter, thus enabling @@ -1630,7 +1760,7 @@ The following options need to be configured: with a somewhat smaller memory footprint. - CFG_PROMPT_HUSH_PS2 + CONFIG_SYS_PROMPT_HUSH_PS2 This defines the secondary prompt string, which is printed when the command interpreter needs more input @@ -1686,7 +1816,7 @@ The following options need to be configured: Note: overly (ab)use of the default environment is discouraged. Make sure to check other ways to preset - the environment like the autoscript function or the + the environment like the "source" command or the boot command first. - DataFlash Support: @@ -1702,10 +1832,10 @@ The following options need to be configured: Adding this option adds support for Xilinx SystemACE chips attached via some sort of local bus. The address of the chip must also be defined in the - CFG_SYSTEMACE_BASE macro. For example: + CONFIG_SYS_SYSTEMACE_BASE macro. For example: #define CONFIG_SYSTEMACE - #define CFG_SYSTEMACE_BASE 0xf0000000 + #define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000 When SystemACE support is added, the "ace" device type becomes available to the fat commands, i.e. fatls. @@ -1748,6 +1878,17 @@ The following options need to be configured: These options enable and control the auto-update feature; for a more detailed description refer to doc/README.update. +- MTD Support (mtdparts command, UBI support) + CONFIG_MTD_DEVICE + + Adds the MTD device infrastructure from the Linux kernel. + Needed for mtdparts command support. + + CONFIG_MTD_PARTITIONS + + Adds the MTD partitioning infrastructure from the Linux + kernel. Needed for UBI support. + Legacy uImage format: Arg Where When @@ -1845,8 +1986,8 @@ Legacy uImage format: 81 common/cmd_net.c NetLoop() back without error -82 common/cmd_net.c size == 0 (File with size 0 loaded) 82 common/cmd_net.c trying automatic boot - 83 common/cmd_net.c running autoscript - -83 common/cmd_net.c some error in automatic boot or autoscript + 83 common/cmd_net.c running "source" command + -83 common/cmd_net.c some error in automatic boot or "source" command 84 common/cmd_net.c end without errors FIT uImage format: @@ -1953,53 +2094,56 @@ Modem Support: Configuration Settings: ----------------------- -- CFG_LONGHELP: Defined when you want long help messages included; +- CONFIG_SYS_LONGHELP: Defined when you want long help messages included; undefine this when you're short of memory. -- CFG_PROMPT: This is what U-Boot prints on the console to +- CONFIG_SYS_HELP_CMD_WIDTH: Defined when you want to override the default + width of the commands listed in the 'help' command output. + +- CONFIG_SYS_PROMPT: This is what U-Boot prints on the console to prompt for user input. -- CFG_CBSIZE: Buffer size for input from the Console +- CONFIG_SYS_CBSIZE: Buffer size for input from the Console -- CFG_PBSIZE: Buffer size for Console output +- CONFIG_SYS_PBSIZE: Buffer size for Console output -- CFG_MAXARGS: max. Number of arguments accepted for monitor commands +- CONFIG_SYS_MAXARGS: max. Number of arguments accepted for monitor commands -- CFG_BARGSIZE: Buffer size for Boot Arguments which are passed to +- CONFIG_SYS_BARGSIZE: Buffer size for Boot Arguments which are passed to the application (usually a Linux kernel) when it is booted -- CFG_BAUDRATE_TABLE: +- CONFIG_SYS_BAUDRATE_TABLE: List of legal baudrate settings for this board. -- CFG_CONSOLE_INFO_QUIET +- CONFIG_SYS_CONSOLE_INFO_QUIET Suppress display of console information at boot. -- CFG_CONSOLE_IS_IN_ENV +- CONFIG_SYS_CONSOLE_IS_IN_ENV If the board specific function extern int overwrite_console (void); returns 1, the stdin, stderr and stdout are switched to the serial port, else the settings in the environment are used. -- CFG_CONSOLE_OVERWRITE_ROUTINE +- CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE Enable the call to overwrite_console(). -- CFG_CONSOLE_ENV_OVERWRITE +- CONFIG_SYS_CONSOLE_ENV_OVERWRITE Enable overwrite of previous console environment settings. -- CFG_MEMTEST_START, CFG_MEMTEST_END: +- CONFIG_SYS_MEMTEST_START, CONFIG_SYS_MEMTEST_END: Begin and End addresses of the area used by the simple memory test. -- CFG_ALT_MEMTEST: +- CONFIG_SYS_ALT_MEMTEST: Enable an alternate, more extensive memory test. -- CFG_MEMTEST_SCRATCH: +- CONFIG_SYS_MEMTEST_SCRATCH: Scratch address used by the alternate memory test You only need to set this if address zero isn't writeable -- CFG_MEM_TOP_HIDE (PPC only): - If CFG_MEM_TOP_HIDE is defined in the board config header, +- CONFIG_SYS_MEM_TOP_HIDE (PPC only): + If CONFIG_SYS_MEM_TOP_HIDE is defined in the board config header, this specified memory area will get subtracted from the top (end) of RAM and won't get "touched" at all by U-Boot. By fixing up gd->ram_size the Linux kernel should gets passed @@ -2019,75 +2163,75 @@ Configuration Settings: non page size aligned address and this could cause major problems. -- CFG_TFTP_LOADADDR: +- CONFIG_SYS_TFTP_LOADADDR: Default load address for network file downloads -- CFG_LOADS_BAUD_CHANGE: +- CONFIG_SYS_LOADS_BAUD_CHANGE: Enable temporary baudrate change while serial download -- CFG_SDRAM_BASE: +- CONFIG_SYS_SDRAM_BASE: Physical start address of SDRAM. _Must_ be 0 here. -- CFG_MBIO_BASE: +- CONFIG_SYS_MBIO_BASE: Physical start address of Motherboard I/O (if using a Cogent motherboard) -- CFG_FLASH_BASE: +- CONFIG_SYS_FLASH_BASE: Physical start address of Flash memory. -- CFG_MONITOR_BASE: +- CONFIG_SYS_MONITOR_BASE: Physical start address of boot monitor code (set by make config files to be same as the text base address (TEXT_BASE) used when linking) - same as - CFG_FLASH_BASE when booting from flash. + CONFIG_SYS_FLASH_BASE when booting from flash. -- CFG_MONITOR_LEN: +- CONFIG_SYS_MONITOR_LEN: Size of memory reserved for monitor code, used to determine _at_compile_time_ (!) if the environment is embedded within the U-Boot image, or in a separate flash sector. -- CFG_MALLOC_LEN: +- CONFIG_SYS_MALLOC_LEN: Size of DRAM reserved for malloc() use. -- CFG_BOOTM_LEN: +- CONFIG_SYS_BOOTM_LEN: Normally compressed uImages are limited to an uncompressed size of 8 MBytes. If this is not enough, - you can define CFG_BOOTM_LEN in your board config file + you can define CONFIG_SYS_BOOTM_LEN in your board config file to adjust this setting to your needs. -- CFG_BOOTMAPSZ: +- CONFIG_SYS_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by the Linux kernel (bd_info, boot arguments, FDT blob if used) must be put below this limit, unless "bootm_low" enviroment variable is defined and non-zero. In such case all data for the Linux kernel must be between "bootm_low" - and "bootm_low" + CFG_BOOTMAPSZ. + and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. -- CFG_MAX_FLASH_BANKS: +- CONFIG_SYS_MAX_FLASH_BANKS: Max number of Flash memory banks -- CFG_MAX_FLASH_SECT: +- CONFIG_SYS_MAX_FLASH_SECT: Max number of sectors on a Flash chip -- CFG_FLASH_ERASE_TOUT: +- CONFIG_SYS_FLASH_ERASE_TOUT: Timeout for Flash erase operations (in ms) -- CFG_FLASH_WRITE_TOUT: +- CONFIG_SYS_FLASH_WRITE_TOUT: Timeout for Flash write operations (in ms) -- CFG_FLASH_LOCK_TOUT +- CONFIG_SYS_FLASH_LOCK_TOUT Timeout for Flash set sector lock bit operation (in ms) -- CFG_FLASH_UNLOCK_TOUT +- CONFIG_SYS_FLASH_UNLOCK_TOUT Timeout for Flash clear lock bits operation (in ms) -- CFG_FLASH_PROTECTION +- CONFIG_SYS_FLASH_PROTECTION If defined, hardware flash sectors protection is used instead of U-Boot software protection. -- CFG_DIRECT_FLASH_TFTP: +- CONFIG_SYS_DIRECT_FLASH_TFTP: Enable TFTP transfers directly to flash memory; without this option such a download has to be @@ -2100,7 +2244,7 @@ Configuration Settings: too limited to allow for a temporary copy of the downloaded image) this option may be very useful. -- CFG_FLASH_CFI: +- CONFIG_SYS_FLASH_CFI: Define if the flash driver uses extra elements in the common flash structure for storing flash geometry. @@ -2108,14 +2252,19 @@ Configuration Settings: This option also enables the building of the cfi_flash driver in the drivers directory -- CFG_FLASH_USE_BUFFER_WRITE +- CONFIG_FLASH_CFI_MTD + This option enables the building of the cfi_mtd driver + in the drivers directory. The driver exports CFI flash + to the MTD layer. + +- CONFIG_SYS_FLASH_USE_BUFFER_WRITE Use buffered writes to flash. - CONFIG_FLASH_SPANSION_S29WS_N s29ws-n MirrorBit flash has non-standard addresses for buffered write commands. -- CFG_FLASH_QUIET_TEST +- CONFIG_SYS_FLASH_QUIET_TEST If this option is defined, the common CFI flash doesn't print it's warning upon not recognized FLASH banks. This is useful, if some of the configured banks are only @@ -2126,7 +2275,7 @@ Configuration Settings: digits and dots. Recommended value: 45 (9..1) for 80 column displays, 15 (3..1) for 40 column displays. -- CFG_RX_ETH_BUFFER: +- CONFIG_SYS_RX_ETH_BUFFER: Defines the number of Ethernet receive buffers. On some Ethernet controllers it is recommended to set this value to 8 or even higher (EEPRO100 or 405 EMAC), since all @@ -2161,7 +2310,7 @@ following configurations: type flash chips the second sector can be used: the offset for this sector is given here. - CONFIG_ENV_OFFSET is used relative to CFG_FLASH_BASE. + CONFIG_ENV_OFFSET is used relative to CONFIG_SYS_FLASH_BASE. - CONFIG_ENV_ADDR: @@ -2244,24 +2393,24 @@ to save the current settings. These two #defines specify the offset and size of the environment area within the total memory of your EEPROM. - - CFG_I2C_EEPROM_ADDR: + - CONFIG_SYS_I2C_EEPROM_ADDR: If defined, specified the chip address of the EEPROM device. The default address is zero. - - CFG_EEPROM_PAGE_WRITE_BITS: + - CONFIG_SYS_EEPROM_PAGE_WRITE_BITS: If defined, the number of bits used to address bytes in a single page in the EEPROM device. A 64 byte page, for example would require six bits. - - CFG_EEPROM_PAGE_WRITE_DELAY_MS: + - CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS: If defined, the number of milliseconds to delay between page writes. The default is zero milliseconds. - - CFG_I2C_EEPROM_ADDR_LEN: + - CONFIG_SYS_I2C_EEPROM_ADDR_LEN: The length in bytes of the EEPROM memory array address. Note that this is NOT the chip address length! - - CFG_I2C_EEPROM_ADDR_OVERFLOW: + - CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW: EEPROM chips that implement "address overflow" are ones like Catalyst 24WC04/08/16 which has 9/10/11 bits of address and the extra bits end up in the "chip address" bit @@ -2272,7 +2421,7 @@ to save the current settings. still be one byte because the extra address bits are hidden in the chip address. - - CFG_EEPROM_SIZE: + - CONFIG_SYS_EEPROM_SIZE: The size in bytes of the EEPROM device. @@ -2311,7 +2460,13 @@ to save the current settings. to a block boundary, and CONFIG_ENV_SIZE must be a multiple of the NAND devices block size. -- CFG_SPI_INIT_OFFSET +- CONFIG_NAND_ENV_DST + + Defines address in RAM to which the nand_spl code should copy the + environment. If redundant environment is used, it will be copied to + CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE. + +- CONFIG_SYS_SPI_INIT_OFFSET Defines offset to the initial SPI buffer area in DPRAM. The area is used at an early stage (ROM part) if the environment @@ -2337,29 +2492,36 @@ Note: once the monitor has been relocated, then it will complain if the default environment is used; a new CRC is computed as soon as you use the "saveenv" command to store a valid environment. -- CFG_FAULT_ECHO_LINK_DOWN: +- CONFIG_SYS_FAULT_ECHO_LINK_DOWN: Echo the inverted Ethernet link state to the fault LED. - Note: If this option is active, then CFG_FAULT_MII_ADDR + Note: If this option is active, then CONFIG_SYS_FAULT_MII_ADDR also needs to be defined. -- CFG_FAULT_MII_ADDR: +- CONFIG_SYS_FAULT_MII_ADDR: MII address of the PHY to check for the Ethernet link state. -- CFG_64BIT_VSPRINTF: +- CONFIG_SYS_64BIT_VSPRINTF: Makes vsprintf (and all *printf functions) support printing of 64bit values by using the L quantifier -- CFG_64BIT_STRTOUL: +- CONFIG_SYS_64BIT_STRTOUL: Adds simple_strtoull that returns a 64bit value +- CONFIG_NS16550_MIN_FUNCTIONS: + Define this if you desire to only have use of the NS16550_init + and NS16550_putc functions for the serial driver located at + drivers/serial/ns16550.c. This option is useful for saving + space for already greatly restricted images, including but not + limited to NAND_SPL configurations. + Low Level (hardware related) configuration options: --------------------------------------------------- -- CFG_CACHELINE_SIZE: +- CONFIG_SYS_CACHELINE_SIZE: Cache Line Size of the CPU. -- CFG_DEFAULT_IMMR: +- CONFIG_SYS_DEFAULT_IMMR: Default address of the IMMR after system reset. Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU, @@ -2367,36 +2529,36 @@ Low Level (hardware related) configuration options: the IMMR register after a reset. - Floppy Disk Support: - CFG_FDC_DRIVE_NUMBER + CONFIG_SYS_FDC_DRIVE_NUMBER the default drive number (default value 0) - CFG_ISA_IO_STRIDE + CONFIG_SYS_ISA_IO_STRIDE defines the spacing between FDC chipset registers (default value 1) - CFG_ISA_IO_OFFSET + CONFIG_SYS_ISA_IO_OFFSET defines the offset of register from address. It depends on which part of the data bus is connected to the FDC chipset. (default value 0) - If CFG_ISA_IO_STRIDE CFG_ISA_IO_OFFSET and - CFG_FDC_DRIVE_NUMBER are undefined, they take their + If CONFIG_SYS_ISA_IO_STRIDE CONFIG_SYS_ISA_IO_OFFSET and + CONFIG_SYS_FDC_DRIVE_NUMBER are undefined, they take their default value. - if CFG_FDC_HW_INIT is defined, then the function + if CONFIG_SYS_FDC_HW_INIT is defined, then the function fdc_hw_init() is called at the beginning of the FDC setup. fdc_hw_init() must be provided by the board source code. It is used to make hardware dependant initializations. -- CFG_IMMR: Physical address of the Internal Memory. +- CONFIG_SYS_IMMR: Physical address of the Internal Memory. DO NOT CHANGE unless you know exactly what you're doing! (11-4) [MPC8xx/82xx systems only] -- CFG_INIT_RAM_ADDR: +- CONFIG_SYS_INIT_RAM_ADDR: Start address of memory area that can be used for initial data and stack; please note that this must be @@ -2411,93 +2573,97 @@ Low Level (hardware related) configuration options: - MPC824X: data cache - PPC4xx: data cache -- CFG_GBL_DATA_OFFSET: +- CONFIG_SYS_GBL_DATA_OFFSET: Offset of the initial data structure in the memory - area defined by CFG_INIT_RAM_ADDR. Usually - CFG_GBL_DATA_OFFSET is chosen such that the initial + area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually + CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial data is located at the end of the available space - (sometimes written as (CFG_INIT_RAM_END - - CFG_INIT_DATA_SIZE), and the initial stack is just - below that area (growing from (CFG_INIT_RAM_ADDR + - CFG_GBL_DATA_OFFSET) downward. + (sometimes written as (CONFIG_SYS_INIT_RAM_END - + CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just + below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + + CONFIG_SYS_GBL_DATA_OFFSET) downward. Note: On the MPC824X (or other systems that use the data cache for initial memory) the address chosen for - CFG_INIT_RAM_ADDR is basically arbitrary - it must + CONFIG_SYS_INIT_RAM_ADDR is basically arbitrary - it must point to an otherwise UNUSED address space between the top of RAM and the start of the PCI space. -- CFG_SIUMCR: SIU Module Configuration (11-6) +- CONFIG_SYS_SIUMCR: SIU Module Configuration (11-6) -- CFG_SYPCR: System Protection Control (11-9) +- CONFIG_SYS_SYPCR: System Protection Control (11-9) -- CFG_TBSCR: Time Base Status and Control (11-26) +- CONFIG_SYS_TBSCR: Time Base Status and Control (11-26) -- CFG_PISCR: Periodic Interrupt Status and Control (11-31) +- CONFIG_SYS_PISCR: Periodic Interrupt Status and Control (11-31) -- CFG_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30) +- CONFIG_SYS_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30) -- CFG_SCCR: System Clock and reset Control Register (15-27) +- CONFIG_SYS_SCCR: System Clock and reset Control Register (15-27) -- CFG_OR_TIMING_SDRAM: +- CONFIG_SYS_OR_TIMING_SDRAM: SDRAM timing -- CFG_MAMR_PTA: +- CONFIG_SYS_MAMR_PTA: periodic timer for refresh -- CFG_DER: Debug Event Register (37-47) +- CONFIG_SYS_DER: Debug Event Register (37-47) -- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CFG_REMAP_OR_AM, - CFG_PRELIM_OR_AM, CFG_OR_TIMING_FLASH, CFG_OR0_REMAP, - CFG_OR0_PRELIM, CFG_BR0_PRELIM, CFG_OR1_REMAP, CFG_OR1_PRELIM, - CFG_BR1_PRELIM: +- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CONFIG_SYS_REMAP_OR_AM, + CONFIG_SYS_PRELIM_OR_AM, CONFIG_SYS_OR_TIMING_FLASH, CONFIG_SYS_OR0_REMAP, + CONFIG_SYS_OR0_PRELIM, CONFIG_SYS_BR0_PRELIM, CONFIG_SYS_OR1_REMAP, CONFIG_SYS_OR1_PRELIM, + CONFIG_SYS_BR1_PRELIM: Memory Controller Definitions: BR0/1 and OR0/1 (FLASH) - SDRAM_BASE2_PRELIM, SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE, - CFG_OR_TIMING_SDRAM, CFG_OR2_PRELIM, CFG_BR2_PRELIM, - CFG_OR3_PRELIM, CFG_BR3_PRELIM: + CONFIG_SYS_OR_TIMING_SDRAM, CONFIG_SYS_OR2_PRELIM, CONFIG_SYS_BR2_PRELIM, + CONFIG_SYS_OR3_PRELIM, CONFIG_SYS_BR3_PRELIM: Memory Controller Definitions: BR2/3 and OR2/3 (SDRAM) -- CFG_MAMR_PTA, CFG_MPTPR_2BK_4K, CFG_MPTPR_1BK_4K, CFG_MPTPR_2BK_8K, - CFG_MPTPR_1BK_8K, CFG_MAMR_8COL, CFG_MAMR_9COL: +- CONFIG_SYS_MAMR_PTA, CONFIG_SYS_MPTPR_2BK_4K, CONFIG_SYS_MPTPR_1BK_4K, CONFIG_SYS_MPTPR_2BK_8K, + CONFIG_SYS_MPTPR_1BK_8K, CONFIG_SYS_MAMR_8COL, CONFIG_SYS_MAMR_9COL: Machine Mode Register and Memory Periodic Timer Prescaler definitions (SDRAM timing) -- CFG_I2C_UCODE_PATCH, CFG_I2C_DPMEM_OFFSET [0x1FC0]: +- CONFIG_SYS_I2C_UCODE_PATCH, CONFIG_SYS_I2C_DPMEM_OFFSET [0x1FC0]: enable I2C microcode relocation patch (MPC8xx); define relocation offset in DPRAM [DSP2] -- CFG_SMC_UCODE_PATCH, CFG_SMC_DPMEM_OFFSET [0x1FC0]: +- CONFIG_SYS_SMC_UCODE_PATCH, CONFIG_SYS_SMC_DPMEM_OFFSET [0x1FC0]: enable SMC microcode relocation patch (MPC8xx); define relocation offset in DPRAM [SMC1] -- CFG_SPI_UCODE_PATCH, CFG_SPI_DPMEM_OFFSET [0x1FC0]: +- CONFIG_SYS_SPI_UCODE_PATCH, CONFIG_SYS_SPI_DPMEM_OFFSET [0x1FC0]: enable SPI microcode relocation patch (MPC8xx); define relocation offset in DPRAM [SCC4] -- CFG_USE_OSCCLK: +- CONFIG_SYS_USE_OSCCLK: Use OSCM clock mode on MBX8xx board. Be careful, wrong setting might damage your board. Read doc/README.MBX before setting this variable! -- CFG_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only) +- CONFIG_SYS_CPM_POST_WORD_ADDR: (MPC8xx, MPC8260 only) Offset of the bootmode word in DPRAM used by post (Power On Self Tests). This definition overrides #define'd default value in commproc.h resp. cpm_8260.h. -- CFG_PCI_SLV_MEM_LOCAL, CFG_PCI_SLV_MEM_BUS, CFG_PICMR0_MASK_ATTRIB, - CFG_PCI_MSTR0_LOCAL, CFG_PCIMSK0_MASK, CFG_PCI_MSTR1_LOCAL, - CFG_PCIMSK1_MASK, CFG_PCI_MSTR_MEM_LOCAL, CFG_PCI_MSTR_MEM_BUS, - CFG_CPU_PCI_MEM_START, CFG_PCI_MSTR_MEM_SIZE, CFG_POCMR0_MASK_ATTRIB, - CFG_PCI_MSTR_MEMIO_LOCAL, CFG_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START, - CFG_PCI_MSTR_MEMIO_SIZE, CFG_POCMR1_MASK_ATTRIB, CFG_PCI_MSTR_IO_LOCAL, - CFG_PCI_MSTR_IO_BUS, CFG_CPU_PCI_IO_START, CFG_PCI_MSTR_IO_SIZE, - CFG_POCMR2_MASK_ATTRIB: (MPC826x only) +- CONFIG_SYS_PCI_SLV_MEM_LOCAL, CONFIG_SYS_PCI_SLV_MEM_BUS, CONFIG_SYS_PICMR0_MASK_ATTRIB, + CONFIG_SYS_PCI_MSTR0_LOCAL, CONFIG_SYS_PCIMSK0_MASK, CONFIG_SYS_PCI_MSTR1_LOCAL, + CONFIG_SYS_PCIMSK1_MASK, CONFIG_SYS_PCI_MSTR_MEM_LOCAL, CONFIG_SYS_PCI_MSTR_MEM_BUS, + CONFIG_SYS_CPU_PCI_MEM_START, CONFIG_SYS_PCI_MSTR_MEM_SIZE, CONFIG_SYS_POCMR0_MASK_ATTRIB, + CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL, CONFIG_SYS_PCI_MSTR_MEMIO_BUS, CPU_PCI_MEMIO_START, + CONFIG_SYS_PCI_MSTR_MEMIO_SIZE, CONFIG_SYS_POCMR1_MASK_ATTRIB, CONFIG_SYS_PCI_MSTR_IO_LOCAL, + CONFIG_SYS_PCI_MSTR_IO_BUS, CONFIG_SYS_CPU_PCI_IO_START, CONFIG_SYS_PCI_MSTR_IO_SIZE, + CONFIG_SYS_POCMR2_MASK_ATTRIB: (MPC826x only) Overrides the default PCI memory map in cpu/mpc8260/pci.c if set. +- CONFIG_PCI_DISABLE_PCIE: + Disable PCI-Express on systems where it is supported but not + required. + - CONFIG_SPD_EEPROM Get DDR timing information from an I2C EEPROM. Common with pluggable memory modules such as SODIMMs @@ -2505,16 +2671,12 @@ Low Level (hardware related) configuration options: SPD_EEPROM_ADDRESS I2C address of the SPD EEPROM -- CFG_SPD_BUS_NUM +- CONFIG_SYS_SPD_BUS_NUM If SPD EEPROM is on an I2C bus other than the first one, specify here. Note that the value must resolve to something your driver can deal with. -- CFG_83XX_DDR_USES_CS0 - Only for 83xx systems. If specified, then DDR should - be configured using CS0 and CS1 instead of CS2 and CS3. - -- CFG_83XX_DDR_USES_CS0 +- CONFIG_SYS_83XX_DDR_USES_CS0 Only for 83xx systems. If specified, then DDR should be configured using CS0 and CS1 instead of CS2 and CS3. @@ -2578,6 +2740,11 @@ Low Level (hardware related) configuration options: some other boot loader or by a debugger which performs these initializations itself. +- CONFIG_PRELOADER + + Modifies the behaviour of start.S when compiling a loader + that is executed before the actual U-Boot. E.g. when + compiling a NAND SPL. Building the Software: ====================== @@ -2598,6 +2765,16 @@ necessary. For example using the ELDK on a 4xx CPU, please enter: $ CROSS_COMPILE=ppc_4xx- $ export CROSS_COMPILE +Note: If you wish to generate Windows versions of the utilities in + the tools directory you can use the MinGW toolchain + (http://www.mingw.org). Set your HOST tools to the MinGW + toolchain and execute 'make tools'. For example: + + $ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools + + Binaries such as tools/mkimage.exe will be created which can + be executed on computers running Windows. + U-Boot is intended to be simple to build. After installing the sources you must configure U-Boot for one specific board type. This is done by typing: @@ -2743,14 +2920,7 @@ mw - memory write (fill) cp - memory copy cmp - memory compare crc32 - checksum calculation -imd - i2c memory display -imm - i2c memory modify (auto-incrementing) -inm - i2c memory modify (constant address) -imw - i2c memory write (fill) -icrc32 - i2c checksum calculation -iprobe - probe to discover valid I2C chip addresses -iloop - infinite loop on address range -isdram - print SDRAM configuration information +i2c - I2C sub-system sspi - SPI utility commands base - print or set address offset printenv- print environment variables @@ -2814,7 +2984,7 @@ Some configuration options can be set using Environment Variables: for use by the bootm command. See also "bootm_size" environment variable. Address defined by "bootm_low" is also the base of the initial memory mapping for the Linux - kernel -- see the description of CFG_BOOTMAPSZ. + kernel -- see the description of CONFIG_SYS_BOOTMAPSZ. bootm_size - Memory range available for image processing in the bootm command can be restricted. This variable is given as @@ -2834,7 +3004,7 @@ Some configuration options can be set using Environment Variables: autoscript - if set to "yes" commands like "loadb", "loady", "bootp", "tftpb", "rarpboot" and "nfs" will attempt to automatically run script images (by internally - calling "autoscript"). + calling "source"). autoscript_uname - if script image is in a format (FIT) this variable is used to get script subimage unit name. @@ -2862,7 +3032,7 @@ Some configuration options can be set using Environment Variables: is usually what you want since it allows for maximum initrd size. If for some reason you want to make sure that the initrd image is loaded below the - CFG_BOOTMAPSZ limit, you can set this environment + CONFIG_SYS_BOOTMAPSZ limit, you can set this environment variable to a value of "no" or "off" or "0". Alternatively, you can set it to a maximum upper address to use (U-Boot will still check that it @@ -2924,8 +3094,7 @@ Some configuration options can be set using Environment Variables: Useful on scripts which control the retry operation themselves. - npe_ucode - see CONFIG_IXP4XX_NPE_EXT_UCOD - if set load address for the NPE microcode + npe_ucode - set load address for the NPE microcode tftpsrcport - If this is set, the value is used for TFTP's UDP source port. @@ -3136,7 +3305,7 @@ Just make sure your machine specific header file (for instance include/asm-ppc/tqm8xx.h) includes the same definition of the Board Information structure as we define in include/asm-/u-boot.h, and make sure that your definition of IMAP_ADDR uses the same value -as your U-Boot configuration in CFG_IMMR. +as your U-Boot configuration in CONFIG_SYS_IMMR. Configuring the Linux kernel: @@ -3659,7 +3828,7 @@ MPC826x processors), on others (parts of) the data cache can be locked as (mis-) used as memory, etc. Chris Hallinan posted a good summary of these issues to the - u-boot-users mailing list: + U-Boot mailing list: Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)? From: "Chris Hallinan" @@ -3683,7 +3852,7 @@ locked as (mis-) used as memory, etc. cause you grief during the initial boot! It is frequently not used. - CFG_INIT_RAM_ADDR should be somewhere that won't interfere + CONFIG_SYS_INIT_RAM_ADDR should be somewhere that won't interfere with your processor/board/system design. The default value you will find in any recent u-boot distribution in walnut.h should work for you. I'd set it to a value larger @@ -3780,7 +3949,7 @@ U-Boot is installed in the first 128 kB of the first Flash bank (on TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After booting and sizing and initializing DRAM, the code relocates itself to the upper end of DRAM. Immediately below the U-Boot code some -memory is reserved for use by malloc() [see CFG_MALLOC_LEN +memory is reserved for use by malloc() [see CONFIG_SYS_MALLOC_LEN configuration setting]. Below that, a structure with global Board Info data is placed, followed by the stack (growing downward). @@ -3855,51 +4024,63 @@ U-Boot Porting Guide: list, October 2002] -int main (int argc, char *argv[]) +int main(int argc, char *argv[]) { sighandler_t no_more_time; - signal (SIGALRM, no_more_time); - alarm (PROJECT_DEADLINE - toSec (3 * WEEK)); + signal(SIGALRM, no_more_time); + alarm(PROJECT_DEADLINE - toSec (3 * WEEK)); if (available_money > available_manpower) { - pay consultant to port U-Boot; + Pay consultant to port U-Boot; return 0; } Download latest U-Boot source; - Subscribe to u-boot-users mailing list; + Subscribe to u-boot mailing list; - if (clueless) { - email ("Hi, I am new to U-Boot, how do I get started?"); - } + if (clueless) + email("Hi, I am new to U-Boot, how do I get started?"); while (learning) { Read the README file in the top level directory; - Read http://www.denx.de/twiki/bin/view/DULG/Manual ; + Read http://www.denx.de/twiki/bin/view/DULG/Manual; + Read applicable doc/*.README; Read the source, Luke; + /* find . -name "*.[chS]" | xargs grep -i */ } - if (available_money > toLocalCurrency ($2500)) { - Buy a BDI2000; - } else { + if (available_money > toLocalCurrency ($2500)) + Buy a BDI3000; + else Add a lot of aggravation and time; - } - - Create your own board support subdirectory; - Create your own board config file; - - while (!running) { - do { - Add / modify source code; - } until (compiles); - Debug; - if (clueless) - email ("Hi, I am having problems..."); + if (a similar board exists) { /* hopefully... */ + cp -a board/ board/ + cp include/configs/.h include/configs/.h + } else { + Create your own board support subdirectory; + Create your own board include/configs/.h file; + } + Edit new board/ files + Edit new include/configs/.h + + while (!accepted) { + while (!running) { + do { + Add / modify source code; + } until (compiles); + Debug; + if (clueless) + email("Hi, I am having problems..."); + } + Send patch file to the U-Boot email list; + if (reasonable critiques) + Incorporate improvements from email list code review; + else + Defend code as written; } - Send patch file to Wolfgang; return 0; } @@ -3946,10 +4127,11 @@ Since the number of patches for U-Boot is growing, we need to establish some rules. Submissions which do not conform to these rules may be rejected, even when they contain important and valuable stuff. -Patches shall be sent to the u-boot-users mailing list. - Please see http://www.denx.de/wiki/U-Boot/Patches for details. +Patches shall be sent to the u-boot mailing list ; +see http://lists.denx.de/mailman/listinfo/u-boot + When you send a patch, please include the following information with it: @@ -4012,7 +4194,7 @@ Notes: disabled must not need more memory than the old code without your modification. -* Remember that there is a size limit of 40 kB per message on the - u-boot-users mailing list. Bigger patches will be moderated. If - they are reasonable and not bigger than 100 kB, they will be - acknowledged. Even bigger patches should be avoided. +* Remember that there is a size limit of 100 kB per message on the + u-boot mailing list. Bigger patches will be moderated. If they are + reasonable and not too big, they will be acknowledged. But patches + bigger than the size limit should be avoided.