X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=4ac73996983add08d11a15875fa203a5f8fd3393;hb=9f847b82019e14068337a6928755b05f7fae8b85;hp=0c98545a0d174e6fd0daeed9d11d08de2dd620a6;hpb=d1db76f1494492fc1c13e3bfe036c6dfb942e8be;p=u-boot

diff --git a/README b/README
index 0c98545a0d..4ac7399698 100644
--- a/README
+++ b/README
@@ -2288,6 +2288,21 @@ CBFS (Coreboot Filesystem) support
 		    9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
 		    with a fix speed from 100000 and the slave addr 0!
 
+		- drivers/i2c/ihs_i2c.c
+		  - activate this driver with CONFIG_SYS_I2C_IHS
+		  - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
+		  - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
+		  - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
+		  - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
+		  - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
+		  - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
+		  - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
+		  - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
+		  - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
+		  - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
+		  - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
+		  - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
+
 		additional defines:
 
 		CONFIG_SYS_NUM_I2C_BUSES
@@ -3254,6 +3269,11 @@ FIT uImage format:
 		disabled. If a board need legacy image format support
 		enable this through CONFIG_IMAGE_FORMAT_LEGACY
 
+		CONFIG_FIT_DISABLE_SHA256
+		Supporting SHA256 hashes has quite an impact on binary size.
+		For constrained systems sha256 hash support can be disabled
+		with this option.
+
 - Standalone program support:
 		CONFIG_STANDALONE_LOAD_ADDR
 
@@ -4069,6 +4089,43 @@ to save the current settings.
 	  environment area within the total memory of your DataFlash placed
 	  at the specified address.
 
+- CONFIG_ENV_IS_IN_SPI_FLASH:
+
+	Define this if you have a SPI Flash memory device which you
+	want to use for the environment.
+
+	- CONFIG_ENV_OFFSET:
+	- CONFIG_ENV_SIZE:
+
+	  These two #defines specify the offset and size of the
+	  environment area within the SPI Flash. CONFIG_ENV_OFFSET must be
+	  aligned to an erase sector boundary.
+
+	- CONFIG_ENV_SECT_SIZE:
+
+	  Define the SPI flash's sector size.
+
+	- CONFIG_ENV_OFFSET_REDUND (optional):
+
+	  This setting describes a second storage area of CONFIG_ENV_SIZE
+	  size used to hold a redundant copy of the environment data, so
+	  that there is a valid backup copy in case there is a power failure
+	  during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
+	  aligned to an erase sector boundary.
+
+	- CONFIG_ENV_SPI_BUS (optional):
+	- CONFIG_ENV_SPI_CS (optional):
+
+	  Define the SPI bus and chip select. If not defined they will be 0.
+
+	- CONFIG_ENV_SPI_MAX_HZ (optional):
+
+	  Define the SPI max work clock. If not defined then use 1MHz.
+
+	- CONFIG_ENV_SPI_MODE (optional):
+
+	  Define the SPI work mode. If not defined then use SPI_MODE_3.
+
 - CONFIG_ENV_IS_IN_REMOTE:
 
 	Define this if you have a remote memory space which you