X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=4ac73996983add08d11a15875fa203a5f8fd3393;hb=9f847b82019e14068337a6928755b05f7fae8b85;hp=2bc0d3560c7735d87d38df157d03005700b75bd0;hpb=bd83b5921201a61eb74ed7faa04c3f237d5323a2;p=u-boot

diff --git a/README b/README
index 2bc0d3560c..4ac7399698 100644
--- a/README
+++ b/README
@@ -2288,6 +2288,21 @@ CBFS (Coreboot Filesystem) support
 		    9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
 		    with a fix speed from 100000 and the slave addr 0!
 
+		- drivers/i2c/ihs_i2c.c
+		  - activate this driver with CONFIG_SYS_I2C_IHS
+		  - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0
+		  - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0
+		  - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0
+		  - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1
+		  - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1
+		  - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1
+		  - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2
+		  - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2
+		  - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2
+		  - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3
+		  - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3
+		  - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3
+
 		additional defines:
 
 		CONFIG_SYS_NUM_I2C_BUSES
@@ -3254,6 +3269,11 @@ FIT uImage format:
 		disabled. If a board need legacy image format support
 		enable this through CONFIG_IMAGE_FORMAT_LEGACY
 
+		CONFIG_FIT_DISABLE_SHA256
+		Supporting SHA256 hashes has quite an impact on binary size.
+		For constrained systems sha256 hash support can be disabled
+		with this option.
+
 - Standalone program support:
 		CONFIG_STANDALONE_LOAD_ADDR