X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=89646725a0b884c5b8b10e4262a1682478788a29;hb=7b06b66cd7f9f4d33cfd3e68046c094a43024cda;hp=07f1d11e5feb2565df5422f3ccf940f1174a747d;hpb=fdbe8b9a2d1858ba35dd6214315563ad44d4a0e3;p=u-boot diff --git a/README b/README index 07f1d11e5f..89646725a0 100644 --- a/README +++ b/README @@ -1,5 +1,5 @@ # -# (C) Copyright 2000 - 2011 +# (C) Copyright 2000 - 2012 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # # See file CREDITS for list of people who contributed to this @@ -420,6 +420,12 @@ The following options need to be configured: XWAY SoCs for booting from NOR flash. The U-Boot image needs to be swapped if a flash programmer is used. +- ARM options: + CONFIG_SYS_EXCEPTION_VECTORS_HIGH + + Select high exception vectors of the ARM core, e.g., do not + clear the V bit of the c1 register of CP15. + - Linux Kernel Interface: CONFIG_CLOCKS_IN_MHZ @@ -564,7 +570,7 @@ The following options need to be configured: CONFIG_CFB_CONSOLE Enables console device for a color framebuffer. Needs following - defines (cf. smiLynxEM, i8042, board/eltec/bab7xx) + defines (cf. smiLynxEM, i8042) VIDEO_FB_LITTLE_ENDIAN graphic memory organisation (default big endian) VIDEO_HW_RECTFILL graphic chip supports @@ -638,6 +644,32 @@ The following options need to be configured: 'Sane' compilers will generate smaller code if CONFIG_PRE_CON_BUF_SZ is a power of 2 +- Pre-console putc(): + Prior to the console being initialised, console output is + normally silently discarded. This can be annoying if a + panic() happens in this time. + + If the CONFIG_PRE_CONSOLE_PUTC option is defined, then + U-Boot will call board_pre_console_putc() for each output + character in this case, This function should try to output + the character if possible, perhaps on all available UARTs + (it will need to do this directly, since the console code + is not functional yet). Note that if the panic happens + early enough, then it is possible that board_init_f() + (or even arch_cpu_init() on ARM) has not been called yet. + You should init all clocks, GPIOs, etc. that are needed + to get the character out. Baud rates will need to default + to something sensible. + +- Safe printf() functions + Define CONFIG_SYS_VSNPRINTF to compile in safe versions of + the printf() functions. These are defined in + include/vsprintf.h and include snprintf(), vsnprintf() and + so on. Code size increase is approximately 300-500 bytes. + If this option is not given then these functions will + silently discard their buffer size argument - this means + you are not getting any overflow checking in this case. + - Boot Delay: CONFIG_BOOTDELAY - in seconds Delay before automatically booting the default image; set to -1 to disable autoboot. @@ -783,6 +815,7 @@ The following options need to be configured: (requires CONFIG_CMD_I2C) CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) + CONFIG_CMD_SF * Read/write/erase SPI NOR flash CONFIG_CMD_SHA1SUM print sha1 memory digest (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOURCE "source" command Support @@ -1003,6 +1036,9 @@ The following options need to be configured: If this defined, the driver is quiet. The driver doen't show link status messages. + CONFIG_CALXEDA_XGMAC + Support for the Calxeda XGMAC device + CONFIG_DRIVER_LAN91C96 Support for SMSC's LAN91C96 chips. @@ -1072,6 +1108,16 @@ The following options need to be configured: CONFIG_SH_ETHER_CACHE_WRITEBACK If this option is set, the driver enables cache flush. +- TPM Support: + CONFIG_GENERIC_LPC_TPM + Support for generic parallel port TPM devices. Only one device + per system is supported at this time. + + CONFIG_TPM_TIS_BASE_ADDRESS + Base address where the generic TPM device is mapped + to. Contemporary x86 systems usually map it at + 0xfed40000. + - USB Support: At the moment only the UHCI host controller is supported (PIP405, MIP405, MPC5200); define @@ -1158,6 +1204,14 @@ The following options need to be configured: for your device - CONFIG_USBD_PRODUCTID 0xFFFF +- ULPI Layer Support: + The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via + the generic ULPI layer. The generic layer accesses the ULPI PHY + via the platform viewport, so you need both the genric layer and + the viewport enabled. Currently only Chipidea/ARC based + viewport is supported. + To enable the ULPI layer support, define CONFIG_USB_ULPI and + CONFIG_USB_ULPI_VIEWPORT in your board configuration file. - MMC Support: The MMC controller on the Intel PXA is supported. To @@ -2144,6 +2198,25 @@ The following options need to be configured: allows to read/write in Dataflash via the standard commands cp, md... +- Serial Flash support + CONFIG_CMD_SF + + Defining this option enables SPI flash commands + 'sf probe/read/write/erase/update'. + + Usage requires an initial 'probe' to define the serial + flash parameters, followed by read/write/erase/update + commands. + + The following defaults may be provided by the platform + to handle the common case when only a single serial + flash is present on the system. + + CONFIG_SF_DEFAULT_BUS Bus identifier + CONFIG_SF_DEFAULT_CS Chip-select + CONFIG_SF_DEFAULT_MODE (see include/spi.h) + CONFIG_SF_DEFAULT_SPEED in Hz + - SystemACE Support: CONFIG_SYSTEMACE @@ -3274,6 +3347,44 @@ Low Level (hardware related) configuration options: be used if available. These functions may be faster under some conditions but may increase the binary size. +Freescale QE/FMAN Firmware Support: +----------------------------------- + +The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the +loading of "firmware", which is encoded in the QE firmware binary format. +This firmware often needs to be loaded during U-Boot booting, so macros +are used to identify the storage device (NOR flash, SPI, etc) and the address +within that device. + +- CONFIG_SYS_QE_FMAN_FW_ADDR + The address in the storage device where the firmware is located. The + meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro + is also specified. + +- CONFIG_SYS_QE_FMAN_FW_LENGTH + The maximum possible size of the firmware. The firmware binary format + has a field that specifies the actual size of the firmware, but it + might not be possible to read any part of the firmware unless some + local storage is allocated to hold the entire firmware first. + +- CONFIG_SYS_QE_FMAN_FW_IN_NOR + Specifies that QE/FMAN firmware is located in NOR flash, mapped as + normal addressable memory via the LBC. CONFIG_SYS_FMAN_FW_ADDR is the + virtual address in NOR flash. + +- CONFIG_SYS_QE_FMAN_FW_IN_NAND + Specifies that QE/FMAN firmware is located in NAND flash. + CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash. + +- CONFIG_SYS_QE_FMAN_FW_IN_MMC + Specifies that QE/FMAN firmware is located on the primary SD/MMC + device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. + +- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH + Specifies that QE/FMAN firmware is located on the primary SPI + device. CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device. + + Building the Software: ====================== @@ -3554,6 +3665,14 @@ List of environment variables (most likely not complete): fdt_high - if set this restricts the maximum address that the flattened device tree will be copied into upon boot. + For example, if you have a system with 1 GB memory + at physical address 0x10000000, while Linux kernel + only recognizes the first 704 MB as low memory, you + may need to set fdt_high as 0x3C000000 to have the + device tree blob be copied to the maximum address + of the 704 MB low memory, so that Linux kernel can + access it during the boot procedure. + If this is set to the special value 0xFFFFFFFF then the fdt will not be copied at all on boot. For this to work it must reside in writable memory, have