X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=cdbb9de02c68c8ef8ec94be2d2748463b00d2486;hb=70d8c9446fe1d99dd4148dc39ceb5dc6ce39a934;hp=a52f3bf9a830eb5dde84c75310728bcf4d6468c0;hpb=14d0a02a168b36e87665b8d7f42fa3e88263d26d;p=u-boot diff --git a/README b/README index a52f3bf9a8..cdbb9de02c 100644 --- a/README +++ b/README @@ -164,7 +164,7 @@ Directory Hierarchy: /blackfin Files generic to Analog Devices Blackfin architecture /cpu CPU specific files /lib Architecture specific library files - /i386 Files generic to i386 architecture + /x86 Files generic to x86 architecture /cpu CPU specific files /lib Architecture specific library files /m68k Files generic to m68k architecture @@ -319,6 +319,11 @@ The following options need to be configured: CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR CONFIG_SYS_8272ADS - MPC8272ADS +- Marvell Family Member + CONFIG_SYS_MVFS - define it if you want to enable + multiple fs option at one time + for marvell soc family + - MPC824X Family Member (if CONFIG_MPC824X is defined) Define exactly one of CONFIG_MPC8240, CONFIG_MPC8245 @@ -620,6 +625,7 @@ The following options need to be configured: CONFIG_CMD_BOOTD bootd CONFIG_CMD_CACHE * icache, dcache CONFIG_CMD_CONSOLE coninfo + CONFIG_CMD_CRC32 * crc32 CONFIG_CMD_DATE * support for RTC, date/time... CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics @@ -632,22 +638,26 @@ The following options need to be configured: CONFIG_CMD_EDITENV edit env variable CONFIG_CMD_EEPROM * EEPROM read/write support CONFIG_CMD_ELF * bootelf, bootvx + CONFIG_CMD_EXPORTENV * export the environment CONFIG_CMD_SAVEENV saveenv CONFIG_CMD_FDC * Floppy Disk Support CONFIG_CMD_FAT * FAT partition support CONFIG_CMD_FDOS * Dos diskette Support CONFIG_CMD_FLASH flinfo, erase, protect CONFIG_CMD_FPGA FPGA device initialization support + CONFIG_CMD_GO * the 'go' command (exec code) CONFIG_CMD_HWFLOW * RTS/CTS hw flow control CONFIG_CMD_I2C * I2C serial bus support CONFIG_CMD_IDE * IDE harddisk support CONFIG_CMD_IMI iminfo CONFIG_CMD_IMLS List all found images CONFIG_CMD_IMMAP * IMMR dump support + CONFIG_CMD_IMPORTENV * import an environment CONFIG_CMD_IRQ * irqinfo CONFIG_CMD_ITEST Integer/string test of 2 values CONFIG_CMD_JFFS2 * JFFS2 Support CONFIG_CMD_KGDB * kgdb + CONFIG_CMD_LDRINFO ldrinfo (display Blackfin loader) CONFIG_CMD_LOADB loadb CONFIG_CMD_LOADS loads CONFIG_CMD_MD5SUM print md5 message digest @@ -675,7 +685,7 @@ The following options need to be configured: (requires CONFIG_CMD_I2C) CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) - CONFIG_CMD_SHA1 print sha1 memory digest + CONFIG_CMD_SHA1SUM print sha1 memory digest (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support @@ -738,6 +748,8 @@ The following options need to be configured: CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC CONFIG_SYS_RTC_DS1337_NOOSC - Turn off the OSC output for DS1337 + CONFIG_SYS_RV3029_TCR - enable trickle charger on + RV3029 RTC. Note that if the RTC uses I2C, then the I2C interface must also be configured. See I2C Support, below. @@ -746,6 +758,10 @@ The following options need to be configured: CONFIG_PCA953X - use NXP's PCA953X series I2C GPIO CONFIG_PCA953X_INFO - enable pca953x info command + The CONFIG_SYS_I2C_PCA953X_WIDTH option specifies a list of + chip-ngpio pairs that tell the PCA953X driver the number of + pins supported by a particular chip. + Note that if the GPIO device uses I2C, then the I2C interface must also be configured. See I2C Support, below. @@ -861,6 +877,18 @@ The following options need to be configured: Define this to use i/o functions instead of macros (some hardware wont work with macros) + CONFIG_FTGMAC100 + Support for Faraday's FTGMAC100 Gigabit SoC Ethernet + + CONFIG_FTGMAC100_EGIGA + Define this to use GE link update with gigabit PHY. + Define this if FTGMAC100 is connected to gigabit PHY. + If your system has 10/100 PHY only, it might not occur + wrong behavior. Because PHY usually return timeout or + useless data when polling gigabit status and gigabit + control registers. This behavior won't affect the + correctnessof 10/100 link speed update. + CONFIG_SMC911X Support for SMSC's LAN911x and LAN921x chips @@ -876,6 +904,18 @@ The following options need to be configured: automatically converts one 32 bit word to two 16 bit words you may also try CONFIG_SMC911X_32_BIT. + CONFIG_SH_ETHER + Support for Renesas on-chip Ethernet controller + + CONFIG_SH_ETHER_USE_PORT + Define the number of ports to be used + + CONFIG_SH_ETHER_PHY_ADDR + Define the ETH PHY's address + + CONFIG_SH_ETHER_CACHE_WRITEBACK + If this option is set, the driver enables cache flush. + - USB Support: At the moment only the UHCI host controller is supported (PIP405, MIP405, MPC5200); define @@ -1041,6 +1081,28 @@ The following options need to be configured: and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP or CONFIG_VIDEO_SED13806_16BPP + CONFIG_FSL_DIU_FB + Enable the Freescale DIU video driver. Reference boards for + SOCs that have a DIU should define this macro to enable DIU + support, and should also define these other macros: + + CONFIG_SYS_DIU_ADDR + CONFIG_VIDEO + CONFIG_CMD_BMP + CONFIG_CFB_CONSOLE + CONFIG_VIDEO_SW_CURSOR + CONFIG_VGA_AS_SINGLE_DEVICE + CONFIG_VIDEO_LOGO + CONFIG_VIDEO_BMP_LOGO + + The DIU driver will look for the 'monitor' environment variable, + and if defined, enable the DIU as a console during boot. This + variable should be set to one of these values: + + '0' Output video to the DVI connector + '1' Output video to the LVDS connector + '2' Output video to the Dual-Link LVDS connector + - Keyboard Support: CONFIG_KEYBOARD @@ -1632,6 +1694,11 @@ The following options need to be configured: SPI EEPROM, also an instance works with Crystal A/D and D/As on the SACSng board) + CONFIG_SH_SPI + + Enables the driver for SPI controller on SuperH. Currently + only SH7757 is supported. + CONFIG_SPI_X Enables extended (16-bit) SPI EEPROM addressing. @@ -1936,6 +2003,14 @@ The following options need to be configured: example, some LED's) on your board. At the moment, the following checkpoints are implemented: +- Standalone program support: + CONFIG_STANDALONE_LOAD_ADDR + + This option allows to define board specific values + for the address where standalone program gets loaded, + thus overwriting the architecutre dependent default + settings. + Legacy uImage format: Arg Where When @@ -2275,6 +2350,19 @@ Configuration Settings: all data for the Linux kernel must be between "bootm_low" and "bootm_low" + CONFIG_SYS_BOOTMAPSZ. +- CONFIG_SYS_BOOT_RAMDISK_HIGH: + Enable initrd_high functionality. If defined then the + initrd_high feature is enabled and the bootm ramdisk subcommand + is enabled. + +- CONFIG_SYS_BOOT_GET_CMDLINE: + Enables allocating and saving kernel cmdline in space between + "bootm_low" and "bootm_low" + BOOTMAPSZ. + +- CONFIG_SYS_BOOT_GET_KBD: + Enables allocating and saving a kernel copy of the bd_info in + space between "bootm_low" and "bootm_low" + BOOTMAPSZ. + - CONFIG_SYS_MAX_FLASH_BANKS: Max number of Flash memory banks @@ -2351,11 +2439,11 @@ Configuration Settings: - CONFIG_ENV_MAX_ENTRIES - Maximum number of entries in the hash table that is used - internally to store the environment settings. The default - setting is supposed to be generous and should work in most - cases. This setting can be used to tune behaviour; see - lib/hashtable.c for details. + Maximum number of entries in the hash table that is used + internally to store the environment settings. The default + setting is supposed to be generous and should work in most + cases. This setting can be used to tune behaviour; see + lib/hashtable.c for details. The following definitions that deal with the placement and management of environment data (variable area); in general, we support the @@ -2673,7 +2761,7 @@ Low Level (hardware related) configuration options: area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial data is located at the end of the available space - (sometimes written as (CONFIG_SYS_INIT_RAM_END - + (sometimes written as (CONFIG_SYS_INIT_RAM_SIZE - CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) downward. @@ -2758,6 +2846,24 @@ Low Level (hardware related) configuration options: Disable PCI-Express on systems where it is supported but not required. +- CONFIG_SYS_SRIO: + Chip has SRIO or not + +- CONFIG_SRIO1: + Board has SRIO 1 port available + +- CONFIG_SRIO2: + Board has SRIO 2 port available + +- CONFIG_SYS_SRIOn_MEM_VIRT: + Virtual Address of SRIO port 'n' memory region + +- CONFIG_SYS_SRIOn_MEM_PHYS: + Physical Address of SRIO port 'n' memory region + +- CONFIG_SYS_SRIOn_MEM_SIZE: + Size of SRIO port 'n' memory region + - CONFIG_SPD_EEPROM Get DDR timing information from an I2C EEPROM. Common with pluggable memory modules such as SODIMMs @@ -2823,19 +2929,17 @@ Low Level (hardware related) configuration options: globally (CONFIG_CMD_MEM). - CONFIG_SKIP_LOWLEVEL_INIT -- CONFIG_SKIP_RELOCATE_UBOOT + [ARM only] If this variable is defined, then certain + low level initializations (like setting up the memory + controller) are omitted and/or U-Boot does not + relocate itself into RAM. - [ARM only] If these variables are defined, then - certain low level initializations (like setting up - the memory controller) are omitted and/or U-Boot does - not relocate itself into RAM. - Normally these variables MUST NOT be defined. The - only exception is when U-Boot is loaded (to RAM) by - some other boot loader or by a debugger which - performs these initializations itself. + Normally this variable MUST NOT be defined. The only + exception is when U-Boot is loaded (to RAM) by some + other boot loader or by a debugger which performs + these initializations itself. - CONFIG_PRELOADER - Modifies the behaviour of start.S when compiling a loader that is executed before the actual U-Boot. E.g. when compiling a NAND SPL.