X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=d18df54ec9a14d662f4a6495b45aa92c61aa9962;hb=70676cb3b503bea970eb4e1dd7ea902ec8ac2ea1;hp=1bcb63c7e39b8316ca8642dce640f543a5f6b012;hpb=7a1af7a79bd79ded6a78d0c1afdbc3353669e313;p=u-boot

diff --git a/README b/README
index 1bcb63c7e3..d18df54ec9 100644
--- a/README
+++ b/README
@@ -681,8 +681,10 @@ The following options need to be configured:
 		CONFIG_ARM_ERRATA_742230
 		CONFIG_ARM_ERRATA_743622
 		CONFIG_ARM_ERRATA_751472
-		CONFIG_ARM_ERRATA_794072
 		CONFIG_ARM_ERRATA_761320
+		CONFIG_ARM_ERRATA_773022
+		CONFIG_ARM_ERRATA_774769
+		CONFIG_ARM_ERRATA_794072
 
 		If set, the workarounds for these ARM errata are applied early
 		during U-Boot startup. Note that these options force the
@@ -705,6 +707,7 @@ The following options need to be configured:
 		CONFIG_ARM_ERRATA_454179
 		CONFIG_ARM_ERRATA_621766
 		CONFIG_ARM_ERRATA_798870
+		CONFIG_ARM_ERRATA_801819
 
 - Tegra SoC options:
 		CONFIG_TEGRA_SUPPORT_NON_SECURE
@@ -793,18 +796,10 @@ The following options need to be configured:
 - vxWorks boot parameters:
 
 		bootvx constructs a valid bootline using the following
-		environments variables: bootfile, ipaddr, serverip, hostname.
+		environments variables: bootdev, bootfile, ipaddr, netmask,
+		serverip, gatewayip, hostname, othbootargs.
 		It loads the vxWorks image pointed bootfile.
 
-		CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
-		CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
-		CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
-		CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
-
-		CONFIG_SYS_VXWORKS_ADD_PARAMS
-
-		Add it at the end of the bootline. E.g "u=username pw=secret"
-
 		Note: If a "bootargs" environment is defined, it will overwride
 		the defaults discussed just above.
 
@@ -839,18 +834,6 @@ The following options need to be configured:
 		define this to a list of base addresses for each (supported)
 		port. See e.g. include/configs/versatile.h
 
-		CONFIG_PL011_SERIAL_RLCR
-
-		Some vendor versions of PL011 serial ports (e.g. ST-Ericsson U8500)
-		have separate receive and transmit line control registers.  Set
-		this variable to initialize the extra register.
-
-		CONFIG_PL011_SERIAL_FLUSH_ON_INIT
-
-		On some platforms (e.g. U8500) U-Boot is loaded by a second stage
-		boot loader that has already initialized the UART.  Define this
-		variable to flush the UART at init time.
-
 		CONFIG_SERIAL_HW_FLOW_CONTROL
 
 		Define this variable to enable hw flow control in serial driver.
@@ -1381,9 +1364,6 @@ The following options need to be configured:
 		Management command for E1000 devices.  When used on devices
 		with SPI support you can reprogram the EEPROM from U-Boot.
 
-		CONFIG_E1000_FALLBACK_MAC
-		default MAC for empty EEPROM after production.
-
 		CONFIG_EEPRO100
 		Support for Intel 82557/82559/82559ER chips.
 		Optional CONFIG_EEPRO100_SROM_WRITE enables EEPROM
@@ -1496,12 +1476,6 @@ The following options need to be configured:
 		Support for i2c bus TPM devices. Only one device
 		per system is supported at this time.
 
-			CONFIG_TPM_TIS_I2C_BUS_NUMBER
-			Define the the i2c bus number for the TPM device
-
-			CONFIG_TPM_TIS_I2C_SLAVE_ADDRESS
-			Define the TPM's address on the i2c bus
-
 			CONFIG_TPM_TIS_I2C_BURST_LIMITATION
 			Define the burst count bytes upper limit
 
@@ -2379,16 +2353,20 @@ CBFS (Coreboot Filesystem) support
 
 		- drivers/i2c/i2c_mxc.c
 		  - activate this driver with CONFIG_SYS_I2C_MXC
+		  - enable bus 1 with CONFIG_SYS_I2C_MXC_I2C1
+		  - enable bus 2 with CONFIG_SYS_I2C_MXC_I2C2
+		  - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
+		  - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
 		  - define speed for bus 1 with CONFIG_SYS_MXC_I2C1_SPEED
 		  - define slave for bus 1 with CONFIG_SYS_MXC_I2C1_SLAVE
 		  - define speed for bus 2 with CONFIG_SYS_MXC_I2C2_SPEED
 		  - define slave for bus 2 with CONFIG_SYS_MXC_I2C2_SLAVE
 		  - define speed for bus 3 with CONFIG_SYS_MXC_I2C3_SPEED
 		  - define slave for bus 3 with CONFIG_SYS_MXC_I2C3_SLAVE
+		  - define speed for bus 4 with CONFIG_SYS_MXC_I2C4_SPEED
+		  - define slave for bus 4 with CONFIG_SYS_MXC_I2C4_SLAVE
 		If those defines are not set, default value is 100000
 		for speed, and 0 for slave.
-		  - enable bus 3 with CONFIG_SYS_I2C_MXC_I2C3
-		  - enable bus 4 with CONFIG_SYS_I2C_MXC_I2C4
 
 		- drivers/i2c/rcar_i2c.c:
 		  - activate this driver with CONFIG_SYS_I2C_RCAR