X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=README;h=e7cd1bcb436dff45feb2be387eaee30323cc15ae;hb=0bd51251331a341dae8c19ae2e36a3262ae2ef72;hp=ff4926040b5dea46117edb7d34a8d798b1c44390;hpb=eeb72e67619b98d2502fe634a3a5d9953de92ad0;p=u-boot diff --git a/README b/README index ff4926040b..e7cd1bcb43 100644 --- a/README +++ b/README @@ -132,6 +132,10 @@ Directory Hierarchy: ==================== /arch Architecture specific files + /arc Files generic to ARC architecture + /cpu CPU specific files + /arc700 Files specific to ARC 700 CPUs + /lib Architecture specific library files /arm Files generic to ARM architecture /cpu CPU specific files /arm720t Files specific to ARM 720 CPUs @@ -164,7 +168,7 @@ Directory Hierarchy: /mips Files generic to MIPS architecture /cpu CPU specific files /mips32 Files specific to MIPS32 CPUs - /xburst Files specific to Ingenic XBurst CPUs + /mips64 Files specific to MIPS64 CPUs /lib Architecture specific library files /nds32 Files generic to NDS32 architecture /cpu CPU specific files @@ -248,18 +252,29 @@ Selection of Processor Architecture and Board Type: --------------------------------------------------- For all supported boards there are ready-to-use default -configurations available; just type "make _config". +configurations available; just type "make _defconfig". Example: For a TQM823L module type: cd u-boot - make TQM823L_config + make TQM823L_defconfig For the Cogent platform, you need to specify the CPU type as well; -e.g. "make cogent_mpc8xx_config". And also configure the cogent +e.g. "make cogent_mpc8xx_defconfig". And also configure the cogent directory according to the instructions in cogent/README. +Sandbox Environment: +-------------------- + +U-Boot can be built natively to run on a Linux host using the 'sandbox' +board. This allows feature development which is not board- or architecture- +specific to be undertaken on a native platform. The sandbox is also used to +run some of U-Boot's tests. + +See board/sandbox/README.sandbox for more details. + + Configuration Options: ---------------------- @@ -306,14 +321,6 @@ The following options need to be configured: the LCD display every second with a "rotator" |\-/|\-/ -- Board flavour: (if CONFIG_MPC8260ADS is defined) - CONFIG_ADSTYPE - Possible values are: - CONFIG_SYS_8260ADS - original MPC8260ADS - CONFIG_SYS_8266ADS - MPC8266ADS - CONFIG_SYS_PQ2FADS - PQ2FADS-ZU or PQ2FADS-VR - CONFIG_SYS_8272ADS - MPC8272ADS - - Marvell Family Member CONFIG_SYS_MVFS - define it if you want to enable multiple fs option at one time @@ -427,7 +434,21 @@ The following options need to be configured: In this mode, a single differential clock is used to supply clocks to the sysclock, ddrclock and usbclock. + CONFIG_SYS_CPC_REINIT_F + This CONFIG is defined when the CPC is configured as SRAM at the + time of U-boot entry and is required to be re-initialized. + + CONFIG_DEEP_SLEEP + Inidcates this SoC supports deep sleep feature. If deep sleep is + supported, core will start to execute uboot when wakes up. + - Generic CPU options: + CONFIG_SYS_GENERIC_GLOBAL_DATA + Defines global data is initialized in generic board board_init_f(). + If this macro is defined, global data is created and cleared in + generic board board_init_f(). Without this macro, architecture/board + should initialize global data before calling board_init_f(). + CONFIG_SYS_BIG_ENDIAN, CONFIG_SYS_LITTLE_ENDIAN Defines the endianess of the CPU. Implementation of those @@ -454,6 +475,9 @@ The following options need to be configured: CONFIG_SYS_FSL_DDRC_GEN3 Freescale DDR3 controller. + CONFIG_SYS_FSL_DDRC_GEN4 + Freescale DDR4 controller. + CONFIG_SYS_FSL_DDRC_ARM_GEN3 Freescale DDR3 controller for ARM-based SoCs. @@ -469,7 +493,15 @@ The following options need to be configured: CONFIG_SYS_FSL_DDR3 Board config to use DDR3. It can be enabled for SoCs with - Freescale DDR3 controllers. + Freescale DDR3 or DDR3L controllers. + + CONFIG_SYS_FSL_DDR3L + Board config to use DDR3L. It can be enabled for SoCs with + DDR3L controllers. + + CONFIG_SYS_FSL_DDR4 + Board config to use DDR4. It can be enabled for SoCs with + DDR4 controllers. CONFIG_SYS_FSL_IFC_BE Defines the IFC controller register space as Big Endian @@ -486,6 +518,10 @@ The following options need to be configured: PBI commands can be used to configure SoC before it starts the execution. Please refer doc/README.pblimage for more details + CONFIG_SPL_FSL_PBL + It adds a target to create boot binary having SPL binary in PBI format + concatenated with u-boot binary. + CONFIG_SYS_FSL_DDR_BE Defines the DDR controller register space as Big Endian @@ -502,6 +538,18 @@ The following options need to be configured: interleaving mode, handled by Dickens for Freescale layerscape SoCs with ARM core. + CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS + Number of controllers used as main memory. + + CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS + Number of controllers used for other than main memory. + + CONFIG_SYS_FSL_SEC_BE + Defines the SEC controller register space as Big Endian + + CONFIG_SYS_FSL_SEC_LE + Defines the SEC controller register space as Little Endian + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO @@ -566,6 +614,8 @@ The following options need to be configured: CONFIG_ARM_ERRATA_742230 CONFIG_ARM_ERRATA_743622 CONFIG_ARM_ERRATA_751472 + CONFIG_ARM_ERRATA_794072 + CONFIG_ARM_ERRATA_761320 If set, the workarounds for these ARM errata are applied early during U-Boot startup. Note that these options force the @@ -573,12 +623,119 @@ The following options need to be configured: exists, unlike the similar options in the Linux kernel. Do not set these options unless they apply! -- CPU timer options: - CONFIG_SYS_HZ +- Driver Model + Driver model is a new framework for devices in U-Boot + introduced in early 2014. U-Boot is being progressively + moved over to this. It offers a consistent device structure, + supports grouping devices into classes and has built-in + handling of platform data and device tree. + + To enable transition to driver model in a relatively + painful fashion, each subsystem can be independently + switched between the legacy/ad-hoc approach and the new + driver model using the options below. Also, many uclass + interfaces include compatibility features which may be + removed once the conversion of that subsystem is complete. + As a result, the API provided by the subsystem may in fact + not change with driver model. + + See doc/driver-model/README.txt for more information. + + CONFIG_DM + + Enable driver model. This brings in the core support, + including scanning of platform data on start-up. If + CONFIG_OF_CONTROL is enabled, the device tree will be + scanned also when available. + + CONFIG_CMD_DM + + Enable driver model test commands. These allow you to print + out the driver model tree and the uclasses. + + CONFIG_DM_DEMO + + Enable some demo devices and the 'demo' command. These are + really only useful for playing around while trying to + understand driver model in sandbox. + + CONFIG_SPL_DM + + Enable driver model in SPL. You will need to provide a + suitable malloc() implementation. If you are not using the + full malloc() enabled by CONFIG_SYS_SPL_MALLOC_START, + consider using CONFIG_SYS_MALLOC_SIMPLE. In that case you + must provide CONFIG_SYS_MALLOC_F_LEN to set the size. + In most cases driver model will only allocate a few uclasses + and devices in SPL, so 1KB should be enable. See + CONFIG_SYS_MALLOC_F_LEN for more details on how to enable + it. + + CONFIG_DM_SERIAL + + Enable driver model for serial. This replaces + drivers/serial/serial.c with the serial uclass, which + implements serial_putc() etc. The uclass interface is + defined in include/serial.h. + + CONFIG_DM_GPIO + + Enable driver model for GPIO access. The standard GPIO + interface (gpio_get_value(), etc.) is then implemented by + the GPIO uclass. Drivers provide methods to query the + particular GPIOs that they provide. The uclass interface + is defined in include/asm-generic/gpio.h. + + CONFIG_DM_SPI + + Enable driver model for SPI. The SPI slave interface + (spi_setup_slave(), spi_xfer(), etc.) is then implemented by + the SPI uclass. Drivers provide methods to access the SPI + buses that they control. The uclass interface is defined in + include/spi.h. The existing spi_slave structure is attached + as 'parent data' to every slave on each bus. Slaves + typically use driver-private data instead of extending the + spi_slave structure. + + CONFIG_DM_SPI_FLASH + + Enable driver model for SPI flash. This SPI flash interface + (spi_flash_probe(), spi_flash_write(), etc.) is then + implemented by the SPI flash uclass. There is one standard + SPI flash driver which knows how to probe most chips + supported by U-Boot. The uclass interface is defined in + include/spi_flash.h, but is currently fully compatible + with the old interface to avoid confusion and duplication + during the transition parent. SPI and SPI flash must be + enabled together (it is not possible to use driver model + for one and not the other). + + CONFIG_DM_CROS_EC + + Enable driver model for the Chrome OS EC interface. This + allows the cros_ec SPI driver to operate with CONFIG_DM_SPI + but otherwise makes few changes. Since cros_ec also supports + I2C and LPC (which don't support driver model yet), a full + conversion is not yet possible. + + + ** Code size options: The following options are enabled by + default except in SPL. Enable them explicitly to get these + features in SPL. + + CONFIG_DM_WARN + + Enable the dm_warn() function. This can use up quite a bit + of space for its strings. + + CONFIG_DM_STDIO + + Enable registering a serial device with the stdio library. + + CONFIG_DM_DEVICE_REMOVE + + Enable removing of devices. - The frequency of the timer returned by get_timer(). - get_timer() must operate in milliseconds and this CONFIG - option must be set to 1000. - Linux Kernel Interface: CONFIG_CLOCKS_IN_MHZ @@ -711,6 +868,10 @@ The following options need to be configured: boot loader that has already initialized the UART. Define this variable to flush the UART at init time. + CONFIG_SERIAL_HW_FLOW_CONTROL + + Define this variable to enable hw flow control in serial driver. + Current user of this option is drivers/serial/nsl16550.c driver - Console Interface: Depending on board, define exactly one serial port @@ -910,12 +1071,14 @@ The following options need to be configured: The default command configuration includes all commands except those marked below with a "*". + CONFIG_CMD_AES AES 128 CBC encrypt/decrypt CONFIG_CMD_ASKENV * ask for env variable CONFIG_CMD_BDI bdinfo CONFIG_CMD_BEDBUG * Include BedBug Debugger CONFIG_CMD_BMP * BMP support CONFIG_CMD_BSP * Board specific commands CONFIG_CMD_BOOTD bootd + CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support CONFIG_CMD_CACHE * icache, dcache CONFIG_CMD_CLK * clock command support CONFIG_CMD_CONSOLE coninfo @@ -940,6 +1103,7 @@ The following options need to be configured: CONFIG_CMD_EXT4 * ext4 command support CONFIG_CMD_FS_GENERIC * filesystem commands (e.g. load, ls) that work for multiple fs types + CONFIG_CMD_FS_UUID * Look up a filesystem UUID CONFIG_CMD_SAVEENV saveenv CONFIG_CMD_FDC * Floppy Disk Support CONFIG_CMD_FAT * FAT command support @@ -957,6 +1121,7 @@ The following options need to be configured: CONFIG_CMD_IMLS List all images found in NOR flash CONFIG_CMD_IMLS_NAND * List all images found in NAND flash CONFIG_CMD_IMMAP * IMMR dump support + CONFIG_CMD_IOTRACE * I/O tracing for debugging CONFIG_CMD_IMPORTENV * import an environment CONFIG_CMD_INI * import data from an ini file into the env CONFIG_CMD_IRQ * irqinfo @@ -1012,7 +1177,7 @@ The following options need to be configured: CONFIG_CMD_CDP * Cisco Discover Protocol support CONFIG_CMD_MFSL * Microblaze FSL support CONFIG_CMD_XIMG Load part of Multi Image - + CONFIG_CMD_UUID * Generate random UUID or GUID string EXAMPLE: If you want all functions except of network support you can write: @@ -1108,6 +1273,7 @@ The following options need to be configured: CONFIG_RTC_DS1307 - use Maxim, Inc. DS1307 RTC CONFIG_RTC_DS1337 - use Maxim, Inc. DS1337 RTC CONFIG_RTC_DS1338 - use Maxim, Inc. DS1338 RTC + CONFIG_RTC_DS1339 - use Maxim, Inc. DS1339 RTC CONFIG_RTC_DS164x - use Dallas DS164x RTC CONFIG_RTC_ISL1208 - use Intersil ISL1208 RTC CONFIG_RTC_MAX6900 - use Maxim, Inc. MAX6900 RTC @@ -1128,6 +1294,28 @@ The following options need to be configured: Note that if the GPIO device uses I2C, then the I2C interface must also be configured. See I2C Support, below. +- I/O tracing: + When CONFIG_IO_TRACE is selected, U-Boot intercepts all I/O + accesses and can checksum them or write a list of them out + to memory. See the 'iotrace' command for details. This is + useful for testing device drivers since it can confirm that + the driver behaves the same way before and after a code + change. Currently this is supported on sandbox and arm. To + add support for your architecture, add '#include ' + to the bottom of arch//include/asm/io.h and test. + + Example output from the 'iotrace stats' command is below. + Note that if the trace buffer is exhausted, the checksum will + still continue to operate. + + iotrace is enabled + Start: 10000000 (buffer start address) + Size: 00010000 (buffer size) + Offset: 00000120 (current buffer offset) + Output: 10000120 (start + offset) + Count: 00000018 (number of trace records) + CRC32: 9526fb66 (CRC32 of all trace records) + - Timestamp Support: When CONFIG_TIMESTAMP is selected, the timestamp @@ -1311,6 +1499,10 @@ The following options need to be configured: CONFIG_SH_ETHER_CACHE_WRITEBACK If this option is set, the driver enables cache flush. +- PWM Support: + CONFIG_PWM_IMX + Support for PWM modul on the imx6. + - TPM Support: CONFIG_TPM Support TPM devices. @@ -1381,8 +1573,8 @@ The following options need to be configured: CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning field in the EHCI controller on reset. - CONFIG_USB_HUB_MIN_POWER_ON_DELAY defines the minimum - interval for usb hub power-on delay.(minimum 100msec) + CONFIG_USB_DWC2_REG_ADDR the physical CPU address of the DWC2 + HW module registers. - USB Device: Define the below if you wish to use the USB console. @@ -1454,13 +1646,6 @@ The following options need to be configured: for your device - CONFIG_USBD_PRODUCTID 0xFFFF - Some USB device drivers may need to check USB cable attachment. - In this case you can enable following config in BoardName.h: - CONFIG_USB_CABLE_CHECK - This enables function definition: - - usb_cable_connected() in include/usb.h - Implementation of this function is board-specific. - - ULPI Layer Support: The ULPI (UTMI Low Pin (count) Interface) PHYs are supported via the generic ULPI layer. The generic layer accesses the ULPI PHY @@ -1490,6 +1675,16 @@ The following options need to be configured: CONFIG_SH_MMCIF_CLK Define the clock frequency for MMCIF + CONFIG_GENERIC_MMC + Enable the generic MMC driver + + CONFIG_SUPPORT_EMMC_BOOT + Enable some additional features of the eMMC boot partitions. + + CONFIG_SUPPORT_EMMC_RPMB + Enable the commands for reading, writing and programming the + key for the Replay Protection Memory Block partition in eMMC. + - USB Device Firmware Update (DFU) class support: CONFIG_DFU_FUNCTION This enables the USB portion of the DFU USB class @@ -1525,6 +1720,48 @@ The following options need to be configured: this to the maximum filesize (in bytes) for the buffer. Default is 4 MiB if undefined. + DFU_DEFAULT_POLL_TIMEOUT + Poll timeout [ms], is the timeout a device can send to the + host. The host must wait for this timeout before sending + a subsequent DFU_GET_STATUS request to the device. + + DFU_MANIFEST_POLL_TIMEOUT + Poll timeout [ms], which the device sends to the host when + entering dfuMANIFEST state. Host waits this timeout, before + sending again an USB request to the device. + +- USB Device Android Fastboot support: + CONFIG_CMD_FASTBOOT + This enables the command "fastboot" which enables the Android + fastboot mode for the platform's USB device. Fastboot is a USB + protocol for downloading images, flashing and device control + used on Android devices. + See doc/README.android-fastboot for more information. + + CONFIG_ANDROID_BOOT_IMAGE + This enables support for booting images which use the Android + image format header. + + CONFIG_USB_FASTBOOT_BUF_ADDR + The fastboot protocol requires a large memory buffer for + downloads. Define this to the starting RAM address to use for + downloaded images. + + CONFIG_USB_FASTBOOT_BUF_SIZE + The fastboot protocol requires a large memory buffer for + downloads. This buffer should be as large as possible for a + platform. Define this to the size available RAM for fastboot. + + CONFIG_FASTBOOT_FLASH + The fastboot protocol includes a "flash" command for writing + the downloaded image to a non-volatile storage device. Define + this to enable the "fastboot flash" command. + + CONFIG_FASTBOOT_FLASH_MMC_DEV + The fastboot "flash" command requires additional information + regarding the non-volatile storage device. Define this to + the eMMC device that fastboot should use to store the image. + - Journaling Flash filesystem support: CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, CONFIG_JFFS2_NAND_DEV @@ -1559,6 +1796,12 @@ CBFS (Coreboot Filesystem) support filesystem. Available commands are cbfsinit, cbfsinfo, cbfsls and cbfsload. +- FAT(File Allocation Table) filesystem cluster size: + CONFIG_FS_FAT_MAX_CLUSTSIZE + + Define the max cluster size for fat operations else + a default value of 65536 will be defined. + - Keyboard Support: CONFIG_ISA_KEYBOARD @@ -1932,6 +2175,24 @@ CBFS (Coreboot Filesystem) support 4th and following BOOTP requests: delay 0 ... 8 sec + CONFIG_BOOTP_ID_CACHE_SIZE + + BOOTP packets are uniquely identified using a 32-bit ID. The + server will copy the ID from client requests to responses and + U-Boot will use this to determine if it is the destination of + an incoming response. Some servers will check that addresses + aren't in use before handing them out (usually using an ARP + ping) and therefore take up to a few hundred milliseconds to + respond. Network congestion may also influence the time it + takes for a response to make it back to the client. If that + time is too long, U-Boot will retransmit requests. In order + to allow earlier responses to still be accepted after these + retransmissions, U-Boot's BOOTP client keeps a small cache of + IDs. The CONFIG_BOOTP_ID_CACHE_SIZE controls the size of this + cache. The default is to keep IDs for up to four outstanding + requests. Increasing this will allow U-Boot to accept offers + from a BOOTP client in networks with unusually high latency. + - DHCP Advanced Options: You can fine tune the DHCP functionality by defining CONFIG_BOOTP_* symbols: @@ -2184,6 +2445,21 @@ CBFS (Coreboot Filesystem) support 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung) with a fix speed from 100000 and the slave addr 0! + - drivers/i2c/ihs_i2c.c + - activate this driver with CONFIG_SYS_I2C_IHS + - CONFIG_SYS_I2C_IHS_CH0 activate hardware channel 0 + - CONFIG_SYS_I2C_IHS_SPEED_0 speed channel 0 + - CONFIG_SYS_I2C_IHS_SLAVE_0 slave addr channel 0 + - CONFIG_SYS_I2C_IHS_CH1 activate hardware channel 1 + - CONFIG_SYS_I2C_IHS_SPEED_1 speed channel 1 + - CONFIG_SYS_I2C_IHS_SLAVE_1 slave addr channel 1 + - CONFIG_SYS_I2C_IHS_CH2 activate hardware channel 2 + - CONFIG_SYS_I2C_IHS_SPEED_2 speed channel 2 + - CONFIG_SYS_I2C_IHS_SLAVE_2 slave addr channel 2 + - CONFIG_SYS_I2C_IHS_CH3 activate hardware channel 3 + - CONFIG_SYS_I2C_IHS_SPEED_3 speed channel 3 + - CONFIG_SYS_I2C_IHS_SLAVE_3 slave addr channel 3 + additional defines: CONFIG_SYS_NUM_I2C_BUSES @@ -2478,6 +2754,10 @@ CBFS (Coreboot Filesystem) support Enables the driver for the SPI controllers on i.MX and MXC SoCs. Currently i.MX31/35/51 are supported. + CONFIG_SYS_SPI_MXC_WAIT + Timeout for waiting until spi transfer completed. + default: (CONFIG_SYS_HZ/100) /* 10 ms */ + - FPGA Support: CONFIG_FPGA Enables FPGA subsystem. @@ -2496,6 +2776,19 @@ CBFS (Coreboot Filesystem) support Specify the number of FPGA devices to support. + CONFIG_CMD_FPGA_LOADMK + + Enable support for fpga loadmk command + + CONFIG_CMD_FPGA_LOADP + + Enable support for fpga loadp command - load partial bitstream + + CONFIG_CMD_FPGA_LOADBP + + Enable support for fpga loadbp command - load partial bitstream + (Xilinx only) + CONFIG_SYS_FPGA_PROG_FEEDBACK Enable printing of hash marks during FPGA configuration. @@ -2540,6 +2833,14 @@ CBFS (Coreboot Filesystem) support 200 ms. - Configuration Management: + CONFIG_BUILD_TARGET + + Some SoCs need special image types (e.g. U-Boot binary + with a special header) as build targets. By defining + CONFIG_BUILD_TARGET in the SoC / board header, this + special image will be automatically built upon calling + make / MAKEALL. + CONFIG_IDENT_STRING If defined, this string will be added to the U-Boot @@ -2648,22 +2949,6 @@ CBFS (Coreboot Filesystem) support Enable auto completion of commands using TAB. - Note that this feature has NOT been implemented yet - for the "hush" shell. - - - CONFIG_SYS_HUSH_PARSER - - Define this variable to enable the "hush" shell (from - Busybox) as command line interpreter, thus enabling - powerful command line syntax like - if...then...else...fi conditionals or `&&' and '||' - constructs ("shell scripts"). - - If undefined, you get the old, much simpler behaviour - with a somewhat smaller memory footprint. - - CONFIG_SYS_PROMPT_HUSH_PS2 This defines the secondary prompt string, which is @@ -2794,6 +3079,17 @@ CBFS (Coreboot Filesystem) support memories can be connected with a given cs line. currently Xilinx Zynq qspi support these type of connections. + CONFIG_SYS_SPI_ST_ENABLE_WP_PIN + enable the W#/Vpp signal to disable writing to the status + register on ST MICRON flashes like the N25Q128. + The status register write enable/disable bit, combined with + the W#/VPP signal provides hardware data protection for the + device as follows: When the enable/disable bit is set to 1, + and the W#/VPP signal is driven LOW, the status register + nonvolatile bits become read-only and the WRITE STATUS REGISTER + operation will not execute. The only way to exit this + hardware-protected mode is to drive W#/VPP HIGH. + - SystemACE Support: CONFIG_SYSTEMACE @@ -3103,6 +3399,19 @@ FIT uImage format: -150 common/cmd_nand.c Incorrect FIT image format 151 common/cmd_nand.c FIT image format OK +- legacy image format: + CONFIG_IMAGE_FORMAT_LEGACY + enables the legacy image format support in U-Boot. + + Default: + enabled if CONFIG_FIT_SIGNATURE is not defined. + + CONFIG_DISABLE_IMAGE_LEGACY + disable the legacy image format + + This define is introduced, as the legacy image format is + enabled per default for backward compatibility. + - FIT image support: CONFIG_FIT Enable support for the FIT uImage format. @@ -3119,6 +3428,16 @@ FIT uImage format: using a hash signed and verified using RSA. See doc/uImage.FIT/signature.txt for more details. + WARNING: When relying on signed FIT images with required + signature check the legacy image format is default + disabled. If a board need legacy image format support + enable this through CONFIG_IMAGE_FORMAT_LEGACY + + CONFIG_FIT_DISABLE_SHA256 + Supporting SHA256 hashes has quite an impact on binary size. + For constrained systems sha256 hash support can be disabled + with this option. + - Standalone program support: CONFIG_STANDALONE_LOAD_ADDR @@ -3160,6 +3479,9 @@ FIT uImage format: Adds the MTD partitioning infrastructure from the Linux kernel. Needed for UBI support. + CONFIG_MTD_NAND_VERIFY_WRITE + verify if the written data is correct reread. + - UBI support CONFIG_CMD_UBI @@ -3173,6 +3495,64 @@ FIT uImage format: Make the verbose messages from UBI stop printing. This leaves warnings and errors enabled. + + CONFIG_MTD_UBI_WL_THRESHOLD + This parameter defines the maximum difference between the highest + erase counter value and the lowest erase counter value of eraseblocks + of UBI devices. When this threshold is exceeded, UBI starts performing + wear leveling by means of moving data from eraseblock with low erase + counter to eraseblocks with high erase counter. + + The default value should be OK for SLC NAND flashes, NOR flashes and + other flashes which have eraseblock life-cycle 100000 or more. + However, in case of MLC NAND flashes which typically have eraseblock + life-cycle less than 10000, the threshold should be lessened (e.g., + to 128 or 256, although it does not have to be power of 2). + + default: 4096 + + CONFIG_MTD_UBI_BEB_LIMIT + This option specifies the maximum bad physical eraseblocks UBI + expects on the MTD device (per 1024 eraseblocks). If the + underlying flash does not admit of bad eraseblocks (e.g. NOR + flash), this value is ignored. + + NAND datasheets often specify the minimum and maximum NVM + (Number of Valid Blocks) for the flashes' endurance lifetime. + The maximum expected bad eraseblocks per 1024 eraseblocks + then can be calculated as "1024 * (1 - MinNVB / MaxNVB)", + which gives 20 for most NANDs (MaxNVB is basically the total + count of eraseblocks on the chip). + + To put it differently, if this value is 20, UBI will try to + reserve about 1.9% of physical eraseblocks for bad blocks + handling. And that will be 1.9% of eraseblocks on the entire + NAND chip, not just the MTD partition UBI attaches. This means + that if you have, say, a NAND flash chip admits maximum 40 bad + eraseblocks, and it is split on two MTD partitions of the same + size, UBI will reserve 40 eraseblocks when attaching a + partition. + + default: 20 + + CONFIG_MTD_UBI_FASTMAP + Fastmap is a mechanism which allows attaching an UBI device + in nearly constant time. Instead of scanning the whole MTD device it + only has to locate a checkpoint (called fastmap) on the device. + The on-flash fastmap contains all information needed to attach + the device. Using fastmap makes only sense on large devices where + attaching by scanning takes long. UBI will not automatically install + a fastmap on old images, but you can set the UBI parameter + CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT to 1 if you want so. Please note + that fastmap-enabled images are still usable with UBI implementations + without fastmap support. On typical flash devices the whole fastmap + fits into one PEB. UBI will reserve PEBs to hold two fastmaps. + + CONFIG_MTD_UBI_FASTMAP_AUTOCONVERT + Set this parameter to enable fastmap automatically on images + without a fastmap. + default: 0 + - UBIFS support CONFIG_CMD_UBIFS @@ -3242,6 +3622,10 @@ FIT uImage format: supports MMC, NAND and YMODEM loading of U-Boot and NAND NAND loading of the Linux Kernel. + CONFIG_SPL_OS_BOOT + Enable booting directly to an OS from SPL. + See also: doc/README.falcon + CONFIG_SPL_DISPLAY_PRINT For ARM, enable an optional function to print more information about the running system. @@ -3266,7 +3650,7 @@ FIT uImage format: CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS, - CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION + CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION Address, size and partition on the MMC to load U-Boot from when the MMC is being used in raw mode. @@ -3283,16 +3667,19 @@ FIT uImage format: CONFIG_SPL_FAT_SUPPORT Support for fs/fat/libfat.o in SPL binary - CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME - Filename to read to load U-Boot when reading from FAT + CONFIG_SPL_EXT_SUPPORT + Support for EXT filesystem in SPL binary - CONFIG_SPL_FAT_LOAD_KERNEL_NAME + CONFIG_SPL_FS_LOAD_PAYLOAD_NAME + Filename to read to load U-Boot when reading from filesystem + + CONFIG_SPL_FS_LOAD_KERNEL_NAME Filename to read to load kernel uImage when reading - from FAT (for Falcon mode) + from filesystem (for Falcon mode) - CONFIG_SPL_FAT_LOAD_ARGS_NAME + CONFIG_SPL_FS_LOAD_ARGS_NAME Filename to read to load kernel argument parameters - when reading from FAT (for Falcon mode) + when reading from filesystem (for Falcon mode) CONFIG_SPL_MPC83XX_WAIT_FOR_NAND Set this for NAND SPL on PPC mpc83xx targets, so that @@ -3300,6 +3687,9 @@ FIT uImage format: continuing (the hardware starts execution after just loading the first page rather than the full 4K). + CONFIG_SPL_SKIP_RELOCATE + Avoid SPL relocation + CONFIG_SPL_NAND_BASE Include nand_base.c in the SPL. Requires CONFIG_SPL_NAND_DRIVERS. @@ -3314,6 +3704,14 @@ FIT uImage format: Support for NAND boot using simple NAND drivers that expose the cmd_ctrl() interface. + CONFIG_SPL_MTD_SUPPORT + Support for the MTD subsystem within SPL. Useful for + environment on NAND support within SPL. + + CONFIG_SPL_NAND_RAW_ONLY + Support to boot only raw u-boot.bin images. Use this only + if you need to save space. + CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT Set for the SPL on PPC mpc8xxx targets, support for drivers/ddr/fsl/libddr.o in SPL binary. @@ -3470,6 +3868,9 @@ typically in board_init_f() and board_init_r(). Configuration Settings: ----------------------- +- CONFIG_SYS_SUPPORT_64BIT_DATA: Defined automatically if compiled as 64-bit. + Optionally it can be defined to support 64-bit memory commands. + - CONFIG_SYS_LONGHELP: Defined when you want long help messages included; undefine this when you're short of memory. @@ -3567,6 +3968,27 @@ Configuration Settings: - CONFIG_SYS_MALLOC_LEN: Size of DRAM reserved for malloc() use. +- CONFIG_SYS_MALLOC_F_LEN + Size of the malloc() pool for use before relocation. If + this is defined, then a very simple malloc() implementation + will become available before relocation. The address is just + below the global data, and the stack is moved down to make + space. + + This feature allocates regions with increasing addresses + within the region. calloc() is supported, but realloc() + is not available. free() is supported but does nothing. + The memory will be freed (or in fact just forgotton) when + U-Boot relocates itself. + + Pre-relocation malloc() is only supported on ARM and sandbox + at present but is fairly easy to enable for other archs. + +- CONFIG_SYS_MALLOC_SIMPLE + Provides a simple and small malloc() and calloc() for those + boards which do not use the full malloc in SPL (which is + enabled with CONFIG_SYS_SPL_MALLOC_START). + - CONFIG_SYS_BOOTM_LEN: Normally compressed uImages are limited to an uncompressed size of 8 MBytes. If this is not enough, @@ -3747,6 +4169,11 @@ Configuration Settings: be asserted. See doc/README.omap-reset-time for details on how the value can be calulated on a given board. +- CONFIG_USE_STDINT + If stdint.h is available with your toolchain you can define this + option to enable it. You can provide option 'USE_STDINT=1' when + building U-Boot to enable this. + The following definitions that deal with the placement and management of environment data (variable area); in general, we support the following configurations: @@ -3920,6 +4347,43 @@ to save the current settings. environment area within the total memory of your DataFlash placed at the specified address. +- CONFIG_ENV_IS_IN_SPI_FLASH: + + Define this if you have a SPI Flash memory device which you + want to use for the environment. + + - CONFIG_ENV_OFFSET: + - CONFIG_ENV_SIZE: + + These two #defines specify the offset and size of the + environment area within the SPI Flash. CONFIG_ENV_OFFSET must be + aligned to an erase sector boundary. + + - CONFIG_ENV_SECT_SIZE: + + Define the SPI flash's sector size. + + - CONFIG_ENV_OFFSET_REDUND (optional): + + This setting describes a second storage area of CONFIG_ENV_SIZE + size used to hold a redundant copy of the environment data, so + that there is a valid backup copy in case there is a power failure + during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be + aligned to an erase sector boundary. + + - CONFIG_ENV_SPI_BUS (optional): + - CONFIG_ENV_SPI_CS (optional): + + Define the SPI bus and chip select. If not defined they will be 0. + + - CONFIG_ENV_SPI_MAX_HZ (optional): + + Define the SPI max work clock. If not defined then use 1MHz. + + - CONFIG_ENV_SPI_MODE (optional): + + Define the SPI work mode. If not defined then use SPI_MODE_3. + - CONFIG_ENV_IS_IN_REMOTE: Define this if you have a remote memory space which you @@ -4007,6 +4471,37 @@ but it can not erase, write this NOR flash by SRIO or PCIE interface. You will probably want to define these to avoid a really noisy system when storing the env in UBI. +- CONFIG_ENV_IS_IN_FAT: + Define this if you want to use the FAT file system for the environment. + + - FAT_ENV_INTERFACE: + + Define this to a string that is the name of the block device. + + - FAT_ENV_DEV_AND_PART: + + Define this to a string to specify the partition of the device. It can + be as following: + + "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1) + - "D:P": device D partition P. Error occurs if device D has no + partition table. + - "D:0": device D. + - "D" or "D:": device D partition 1 if device D has partition + table, or the whole device D if has no partition + table. + - "D:auto": first partition in device D with bootable flag set. + If none, first valid paratition in device D. If no + partition table then means device D. + + - FAT_ENV_FILE: + + It's a string of the FAT file name. This file use to store the + envrionment. + + - CONFIG_FAT_WRITE: + This should be defined. Otherwise it cannot save the envrionment file. + - CONFIG_ENV_IS_IN_MMC: Define this if you have an MMC device which you want to use for the @@ -4110,6 +4605,11 @@ use the "saveenv" command to store a valid environment. later, once stdio is running and output goes to the LCD, if present. +- CONFIG_BOARD_SIZE_LIMIT: + Maximum size of the U-Boot image. When defined, the + build system checks that the actual size does not + exceed it. + Low Level (hardware related) configuration options: --------------------------------------------------- @@ -4473,6 +4973,11 @@ Low Level (hardware related) configuration options: - CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC: Enables the RTC32K OSC on AM33xx based plattforms +- CONFIG_SYS_NAND_NO_SUBPAGE_WRITE + Option to disable subpage write in NAND driver + driver that uses this: + drivers/mtd/nand/davinci_nand.c + Freescale QE/FMAN Firmware Support: ----------------------------------- @@ -4482,8 +4987,13 @@ This firmware often needs to be loaded during U-Boot booting, so macros are used to identify the storage device (NOR flash, SPI, etc) and the address within that device. -- CONFIG_SYS_QE_FMAN_FW_ADDR - The address in the storage device where the firmware is located. The +- CONFIG_SYS_FMAN_FW_ADDR + The address in the storage device where the FMAN microcode is located. The + meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro + is also specified. + +- CONFIG_SYS_QE_FW_ADDR + The address in the storage device where the QE microcode is located. The meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro is also specified. @@ -4517,6 +5027,33 @@ within that device. window->master inbound window->master LAW->the ucode address in master's memory space. +Freescale Layerscape Management Complex Firmware Support: +--------------------------------------------------------- +The Freescale Layerscape Management Complex (MC) supports the loading of +"firmware". +This firmware often needs to be loaded during U-Boot booting, so macros +are used to identify the storage device (NOR flash, SPI, etc) and the address +within that device. + +- CONFIG_FSL_MC_ENET + Enable the MC driver for Layerscape SoCs. + +- CONFIG_SYS_LS_MC_FW_ADDR + The address in the storage device where the firmware is located. The + meaning of this address depends on which CONFIG_SYS_LS_MC_FW_IN_xxx macro + is also specified. + +- CONFIG_SYS_LS_MC_FW_LENGTH + The maximum possible size of the firmware. The firmware binary format + has a field that specifies the actual size of the firmware, but it + might not be possible to read any part of the firmware unless some + local storage is allocated to hold the entire firmware first. + +- CONFIG_SYS_LS_MC_FW_IN_NOR + Specifies that MC firmware is located in NOR flash, mapped as + normal addressable memory via the LBC. CONFIG_SYS_LS_MC_FW_ADDR is the + virtual address in NOR flash. + Building the Software: ====================== @@ -4550,9 +5087,9 @@ U-Boot is intended to be simple to build. After installing the sources you must configure U-Boot for one specific board type. This is done by typing: - make NAME_config + make NAME_defconfig -where "NAME_config" is the name of one of the existing configu- +where "NAME_defconfig" is the name of one of the existing configu- rations; see boards.cfg for supported names. Note: for some board special configuration names may exist; check if @@ -4561,10 +5098,10 @@ Note: for some board special configuration names may exist; check if or with LCD support. You can select such additional "features" when choosing the configuration, i. e. - make TQM823L_config + make TQM823L_defconfig - will configure for a plain TQM823L, i. e. no LCD support - make TQM823L_LCD_config + make TQM823L_LCD_defconfig - will configure for a TQM823L with U-Boot console on LCD etc. @@ -4584,17 +5121,17 @@ this behavior and build U-Boot to some external directory: 1. Add O= to the make command line invocations: make O=/tmp/build distclean - make O=/tmp/build NAME_config + make O=/tmp/build NAME_defconfig make O=/tmp/build all -2. Set environment variable BUILD_DIR to point to the desired location: +2. Set environment variable KBUILD_OUTPUT to point to the desired location: - export BUILD_DIR=/tmp/build + export KBUILD_OUTPUT=/tmp/build make distclean - make NAME_config + make NAME_defconfig make all -Note that the command line "O=" setting overrides the BUILD_DIR environment +Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment variable. @@ -4617,7 +5154,7 @@ steps: your board 3. If you're porting U-Boot to a new CPU, then also create a new directory to hold your CPU specific code. Add any files you need. -4. Run "make _config" with your new name. +4. Run "make _defconfig" with your new name. 5. Type "make", and you should get a working "u-boot.srec" file to be installed on your target system. 6. Debug and solve any problems that might arise. @@ -5172,6 +5709,11 @@ Information structure as we define in include/asm-/u-boot.h, and make sure that your definition of IMAP_ADDR uses the same value as your U-Boot configuration in CONFIG_SYS_IMMR. +Note that U-Boot now has a driver model, a unified model for drivers. +If you are adding a new driver, plumb it into driver model. If there +is no uclass available, you are encouraged to create one. See +doc/driver-model. + Configuring the Linux kernel: ----------------------------- @@ -5192,7 +5734,7 @@ which was introduced for our predecessor project PPCBoot and uses a Example: - make TQM850L_config + make TQM850L_defconfig make oldconfig make dep make uImage