X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=Source%2Fportable%2FGCC%2FCORTUS_APS3%2Fportmacro.h;h=6ee5a7bdfde4074577c6dc2668cb45afed3997e7;hb=3a04d257889ad12051af5e20d697be26450c7f95;hp=975759ce0bd3bfe0377580dac241af6c0cfbcad1;hpb=7afe63866dac8fcfa2cc89c49bdd7b2f4e46d77d;p=freertos

diff --git a/Source/portable/GCC/CORTUS_APS3/portmacro.h b/Source/portable/GCC/CORTUS_APS3/portmacro.h
index 975759ce0..6ee5a7bdf 100644
--- a/Source/portable/GCC/CORTUS_APS3/portmacro.h
+++ b/Source/portable/GCC/CORTUS_APS3/portmacro.h
@@ -96,19 +96,13 @@ extern "C" {
 #define portCRITICAL_NESTING_IN_TCB					1
 #define portIRQ_TRAP_YIELD							31
 #define portKERNEL_INTERRUPT_PRIORITY_LEVEL			0
-#define portSYSTEM_INTERRUPT_PRIORITY_LEVEL			1
+#define portSYSTEM_INTERRUPT_PRIORITY_LEVEL			0
 /*-----------------------------------------------------------*/
 
 /* Task utilities. */
 
 extern void vPortYield( void );
 
-/**
- * Interrupt Handlers that access RTOS API functions use a separate interrupt stack
- * and so the nesting depth needs to be recorded to know when to switch from the
- * interrupt stack back to the Task stack.
- */
-extern volatile unsigned portBASE_TYPE uxInterruptNestingCount;
 /*---------------------------------------------------------------------------*/
 
 #define portYIELD()		asm __volatile__( " trap #%0 "::"i"(portIRQ_TRAP_YIELD):"memory")
@@ -124,98 +118,39 @@ extern void vTaskExitCritical( void );
 #define portDISABLE_INTERRUPTS() ic->cpl = ( portSYSTEM_INTERRUPT_PRIORITY_LEVEL + 1 )
 #define portENABLE_INTERRUPTS() ic->cpl = portKERNEL_INTERRUPT_PRIORITY_LEVEL
 
-#define portSET_INTERRUPT_MASK_FROM_ISR() ic->cpl; portDISABLE_INTERRUPTS()
-#define portRESTORE_INTERRUPT_MASK_FROM_ISR( uxSavedInterruptStatus ) ic->cpl = uxSavedInterruptStatus
 /*---------------------------------------------------------------------------*/
 
-#define portYIELD_FROM_ISR()																\
-	{																						\
-		asm __volatile__(																	\
-			" sub		r1, #4			\n"		/* Make space on the stack. */				\
-			" movhi		r2, #16384		\n"		/* Load the pointer to the IC. */			\
-			" ldub		r3, [r2]+2		\n"		/* Copy the Current Priority Level. */		\
-			" st		r3, [r1]		\n"		/* Store it on the stack. */				\
-			" mov 		r3, #%0			\n"		/* Load the highest priority level. */		\
-			" stb		r3, [r2]+2		\n"		/* Set the CPL to the highest level. */		\
-			" call		vTaskSwitchContext	\n"	/* Select a new pxCurrentTCB. */			\
-			" ld		r3, [r1]		\n"		/* Load the previous CPL from the stack. */	\
-			" movhi		r2, #16384		\n"		/* Load the pointer to the IC. */			\
-			" stb		r3, [r2]+2		\n"		/* Set the CPL to the previous CPL. */		\
-			" add		r1, #4			"		/* Fix the stack. */						\
-			:																				\
-			:"i"(portSYSTEM_INTERRUPT_PRIORITY_LEVEL+1)										\
-			:"r2","r3");																	\
-	}
+#define portYIELD_FROM_ISR() vTaskSwitchContext()
 
 /*---------------------------------------------------------------------------*/
 
-#define portSAVE_CONTEXT_REDUCED()				\
-	{											\
-		asm __volatile__(						\
-			/* "sub	r1, #0x28"		*/			/* Prologue generated by the compiler. */ \
-			/* "stq	r4, [r1]+0x8"	*/			\
-			/* "mov	r6, psr"		*/			\
-			/* "mov	r7, rtt"		*/			\
-			/* "std	r6, [r1]+0x20"	*/			\
-			/* "std	r14, [r1]+0x18"	*/			\
-			/* "std	r2, [r1]"	*/				\
-			/* "mov	r14, r1"	*/				\
-			"sub	r1, #0x1c				\n"	/* Make space on the stack. */	\
-			"stq	r8, [r1]				\n"	/* Store the remaining context registers. */	\
-			"std	r12, [r1]+0x10			\n"	\
-			"movhi	r2, #16384				\n"	/* Set the pointer to the IC. */	\
-			"ldub	r3, [r2]+2				\n"	/* Load the current priority level. */	\
-			"st		r3, [r1]+0x18			\n"	/* Store the current priority level on the stack. */ \
-			"ldub	r3, [r2]+3				\n"	/* Load the interrupt priority level. */	\
-			"add	r3, #1					\n"	/* Increase the priority by one. */	\
-			"stb	r3, [r2]+2				\n" /* Set the current priority level to be above this one. */	\
-			"ld		r4, [r0]+short(puxInterruptNestingCount)	\n"	/*[r0]+short(puxInterruptNestingCount) */ \
-			"ld		r5, [r4]				\n"	\
-			"add	r5, #1					\n"	/* Increment the interrupt nesting count. */	\
-			"st		r5, [r4]				\n"	\
-			"cmp	r5, #1					\n"	/* Is this the first interrupt? */	\
-			"bne.s	12						\n" /* If it is then save the stack pointer to the current TCB? */	\
-			"ld		r2, [r0]+short(pxCurrentTCB)	\n"	/* Load the pointer to the TCB. */	\
-			"st		r1, [r2]				\n"	/* Save the stack pointer into the TCB. */	\
-			"ld		r1, [r0]+short(puxTopOfInterruptStack)		\n"	/* Switch to the dedicated interrupt stack. */	/* [r0]+short(uxInterruptStack) */	\
-			"mov	r14, r1					\n"	/* Compiler expects r14 to be set to the function stack. */	\
-			"movhi	r2, #3					\n"	/* Re-enable interrupts (re-enable breakpoints). */	\
-			"mov	psr, r2					\n"	\
-			:::"r2","r3","r4","r5","r15"	);	/* Clobber list includes all of the caller saved registers so that they are saved as part of the Interrupt handler pre-amble. */	\
-	}
+#define portSAVE_CONTEXT()				\
+	asm __volatile__(						\
+		"sub	r1, #0x1c				\n"	/* Make space on the stack. */	\
+		"stq	r8, [r1]				\n"	/* Store the remaining context registers. */	\
+		"std	r12, [r1]+0x10			\n"	\
+		"movhi	r2, #16384				\n"	/* Set the pointer to the IC. */	\
+		"ldub	r3, [r2]+2				\n"	/* Load the current interrupt mask. */	\
+		"st		r3, [r1]+0x18			\n"	/* Store the interrupt mask on the stack. */ \
+		"ld		r2, [r0]+short(pxCurrentTCB)	\n"	/* Load the pointer to the TCB. */	\
+		"st		r1, [r2]				\n"	/* Save the stack pointer into the TCB. */	\
+		"mov	r14, r1					\n"	/* Compiler expects r14 to be set to the function stack. */	\
+		:::"r2","r3","r4","r5","r15"	);	/* Clobber list includes all of the caller saved registers so that they are saved as part of the Interrupt handler pre-amble. */
 /*---------------------------------------------------------------------------*/
 
-#define portRESTORE_CONTEXT_REDUCED()			\
-	{											\
-		asm __volatile__(						\
-			"movhi	r2, #2					\n"	/* Disable interrupts (disable breakpoints). */	\
-			"mov	psr, r2					\n"	\
-			"ld		r2, [r0]+short(puxInterruptNestingCount)	\n"	\
-			"ld		r3, [r2]				\n"	\
-			"sub	r3, #1					\n"	/* Decrement the interrupt nesting count. */	\
-			"st		r3, [r2]				\n"	\
-			"cmp	r3, r0					\n"	/* Is this the first interrupt? */	\
-			"bne.s	8						\n"	/* Are we at the end of unrolling the interrupt nesting? */	\
-			"ld		r2, [r0]+short(pxCurrentTCB)	\n"	/* Load the TCB to find the stack pointer and context. */	\
-			"ld		r1, [r2]				\n"	\
-			"movhi	r2, #16384				\n"	/* Set the pointer to the IC. */	\
-			"ld		r3, [r1]+0x18			\n"	/* Load the previous current priority level. */	\
-			"stb	r3, [r2]+2  			\n"	/* Set the current priority level to be the previous. */	\
-			"ldd	r12, [r1]+0x10			\n"	/* Restore the callee saved registers. Caller saved registers are restored by the function exit. */	\
-			"ldq	r8, [r1]				\n"	\
-			"add	r1, #0x1c				\n"	\
-			"mov	r14, r1					\n"	\
-			/* "mov	r1, r14"		*/		/* Epilogue generated by the compiler. */	\
-			/* "ldd	r6, [r1]+0x20"	*/			\
-			/* "mov	psr, r6"		*/			\
-			/* "mov	rtt, r7"		*/			\
-			/* "ldd	r14, [r1]+0x18"	*/			\
-			/* "ldq	r4, [r1]+0x8"	*/			\
-			/* "ldd	r2, [r1]"		*/			\
-			/* "add	r1, #0x28"		*/			\
-			/* "rti"				*/			\
-			);									\
-	}
+#define portRESTORE_CONTEXT()		\
+	asm __volatile__(						\
+		"ld		r2, [r0]+short(pxCurrentTCB)	\n"	/* Load the TCB to find the stack pointer and context. */	\
+		"ld		r1, [r2]				\n"	\
+		"movhi	r2, #16384				\n"	/* Set the pointer to the IC. */	\
+		"ld		r3, [r1]+0x18			\n"	/* Load the previous interrupt mask. */	\
+		"stb	r3, [r2]+2  			\n"	/* Set the current interrupt mask to be the previous. */	\
+		"ldd	r12, [r1]+0x10			\n"	/* Restore the callee saved registers. Caller saved registers are restored by the function exit. */	\
+		"ldq	r8, [r1]				\n"	\
+		"add	r1, #0x1c				\n"	\
+		"mov	r14, r1					\n"	\
+		);
+
 /*---------------------------------------------------------------------------*/
 
 /* Task function macros as described on the FreeRTOS.org WEB site. */