X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farm1136%2Fstart.S;h=2f8fd6acc20e52b1e18d5049a1db78e9f09bc425;hb=ac6e5fed31ccd1da18b8ef10542c3534bd2dbd38;hp=1cfcca9fa6d3cb32355d628982d959f351f409c2;hpb=638b3e8342e4b395f9e961bfac200420f29874a3;p=u-boot diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index 1cfcca9fa6..2f8fd6acc2 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -14,7 +14,6 @@ #include #include -#include /* ************************************************************************* @@ -79,10 +78,11 @@ cpu_init_crit: mrc p15, 0, r0, c1, c0, 0 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) - orr r0, r0, #0x00000002 @ set bit 2 (A) Align + orr r0, r0, #0x00000002 @ set bit 1 (A) Align orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache mcr p15, 0, r0, c1, c0, 0 +#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* * Jump to board specific initialization... The Mask ROM will have already initialized * basic memory. Go here to bump up clock rate and handle wake up conditions. @@ -90,5 +90,6 @@ cpu_init_crit: mov ip, lr /* persevere link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, ip /* restore link */ +#endif mov pc, lr /* back to my caller */ #endif /* CONFIG_SKIP_LOWLEVEL_INIT */