X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farm720t%2Finterrupts.c;h=464dd3046626540e5e3e487f9d1608cc20441821;hb=9da752e97f6546b66af6b250b43af164521a0138;hp=eb8d4253181c12a6136ce9ac8bec21a069c49f38;hpb=83653121d7382fccfe329cb732f77f116341ef1d;p=u-boot

diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index eb8d425318..464dd30466 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -149,18 +149,6 @@ int timer_init (void)
 
 	/* set timer 2 counter */
 	lastdec = TIMER_LOAD_VAL;
-#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
-	/* disable all interrupts */
-	IO_INTMR1 = 0;
-
-	/* operate timer 1 in prescale mode */
-	IO_SYSCON1 |= SYSCON1_TC1M;
-
-	/* select 2kHz clock source for timer 1 */
-	IO_SYSCON1 &= ~SYSCON1_TC1S;
-
-	/* set timer 1 counter */
-	lastdec = IO_TC1D = TIMER_LOAD_VAL;
 #elif defined(CONFIG_S3C4510B)
 	/* configure free running timer 0 */
 	PUT_REG( REG_TMOD, 0x0);
@@ -207,23 +195,13 @@ int timer_init (void)
  */
 
 
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292)
-
-void reset_timer (void)
-{
-	reset_timer_masked ();
-}
+#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
 
 ulong get_timer (ulong base)
 {
 	return get_timer_masked () - base;
 }
 
-void set_timer (ulong t)
-{
-	timestamp = t;
-}
-
 void __udelay (unsigned long usec)
 {
 	ulong tmo;
@@ -243,13 +221,6 @@ void __udelay (unsigned long usec)
 #endif
 }
 
-void reset_timer_masked (void)
-{
-	/* reset time */
-	lastdec = READ_TIMER;
-	timestamp = 0;
-}
-
 ulong get_timer_masked (void)
 {
 	ulong now = READ_TIMER;