X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farm720t%2Finterrupts.c;h=464dd3046626540e5e3e487f9d1608cc20441821;hb=9da752e97f6546b66af6b250b43af164521a0138;hp=fa9c5a20bd1f0006c9836c24f9187b3eea491b6d;hpb=1902692aa0b2dcbb9351172be03c57d1e82447e4;p=u-boot

diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index fa9c5a20bd..464dd30466 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -149,18 +149,6 @@ int timer_init (void)
 
 	/* set timer 2 counter */
 	lastdec = TIMER_LOAD_VAL;
-#elif defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_ARMADILLO)
-	/* disable all interrupts */
-	IO_INTMR1 = 0;
-
-	/* operate timer 1 in prescale mode */
-	IO_SYSCON1 |= SYSCON1_TC1M;
-
-	/* select 2kHz clock source for timer 1 */
-	IO_SYSCON1 &= ~SYSCON1_TC1S;
-
-	/* set timer 1 counter */
-	lastdec = IO_TC1D = TIMER_LOAD_VAL;
 #elif defined(CONFIG_S3C4510B)
 	/* configure free running timer 0 */
 	PUT_REG( REG_TMOD, 0x0);
@@ -207,7 +195,7 @@ int timer_init (void)
  */
 
 
-#if defined(CONFIG_IMPA7) || defined(CONFIG_EP7312) || defined(CONFIG_NETARM) || defined(CONFIG_ARMADILLO) || defined(CONFIG_LPC2292)
+#if defined(CONFIG_NETARM) || defined(CONFIG_LPC2292)
 
 ulong get_timer (ulong base)
 {