X-Git-Url: https://git.sur5r.net/?a=blobdiff_plain;f=arch%2Farm%2Fcpu%2Farmv7%2Fmx7%2Fsoc.c;h=a6224afedc11b70683ba3510f30da1a625c818dd;hb=5f5620ab2679608f94b3a77e51c77d0a770103bd;hp=8d50149582faf54ddfe71c9a64df64588c083601;hpb=c5752f73a53a8396aae1efa51c5af14b21210b3a;p=u-boot diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c index 8d50149582..a6224afedc 100644 --- a/arch/arm/cpu/armv7/mx7/soc.c +++ b/arch/arm/cpu/armv7/mx7/soc.c @@ -11,12 +11,11 @@ #include #include #include +#include #include #include #include -struct src *src_reg = (struct src *)SRC_BASE_ADDR; - #if defined(CONFIG_IMX_THERMAL) static const struct imx_thermal_plat imx7_thermal_plat = { .regs = (void *)ANATOP_BASE_ADDR, @@ -30,6 +29,13 @@ U_BOOT_DEVICE(imx7_thermal) = { }; #endif +#if defined(CONFIG_SECURE_BOOT) +struct imx_sec_config_fuse_t const imx_sec_config_fuse = { + .bank = 1, + .word = 3, +}; +#endif + /* * OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440) * defines a 2-bit SPEED_GRADING @@ -81,7 +87,7 @@ u32 get_cpu_temp_grade(int *minc, int *maxc) val &= 0x3; if (minc && maxc) { - if ( val == TEMP_AUTOMOTIVE) { + if (val == TEMP_AUTOMOTIVE) { *minc = -40; *maxc = 125; } else if (val == TEMP_INDUSTRIAL) {